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  1. //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //
  10. // This file declares the CCState and CCValAssign classes, used for lowering
  11. // and implementing calling conventions.
  12. //
  13. //===----------------------------------------------------------------------===//
  14. #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
  15. #define LLVM_CODEGEN_CALLINGCONVLOWER_H
  16. #include "llvm/ADT/SmallVector.h"
  17. #include "llvm/CodeGen/MachineFrameInfo.h"
  18. #include "llvm/CodeGen/MachineFunction.h"
  19. #include "llvm/CodeGen/ValueTypes.h"
  20. #include "llvm/IR/CallingConv.h"
  21. #include "llvm/Target/TargetCallingConv.h"
  22. namespace llvm {
  23. class TargetRegisterInfo;
  24. class TargetMachine;
  25. class CCState;
  26. /// CCValAssign - Represent assignment of one arg/retval to a location.
  27. class CCValAssign {
  28. public:
  29. enum LocInfo {
  30. Full, // The value fills the full location.
  31. SExt, // The value is sign extended in the location.
  32. ZExt, // The value is zero extended in the location.
  33. AExt, // The value is extended with undefined upper bits.
  34. BCvt, // The value is bit-converted in the location.
  35. VExt, // The value is vector-widened in the location.
  36. // FIXME: Not implemented yet. Code that uses AExt to mean
  37. // vector-widen should be fixed to use VExt instead.
  38. Indirect // The location contains pointer to the value.
  39. // TODO: a subset of the value is in the location.
  40. };
  41. private:
  42. /// ValNo - This is the value number begin assigned (e.g. an argument number).
  43. unsigned ValNo;
  44. /// Loc is either a stack offset or a register number.
  45. unsigned Loc;
  46. /// isMem - True if this is a memory loc, false if it is a register loc.
  47. unsigned isMem : 1;
  48. /// isCustom - True if this arg/retval requires special handling.
  49. unsigned isCustom : 1;
  50. /// Information about how the value is assigned.
  51. LocInfo HTP : 6;
  52. /// ValVT - The type of the value being assigned.
  53. MVT ValVT;
  54. /// LocVT - The type of the location being assigned to.
  55. MVT LocVT;
  56. public:
  57. static CCValAssign getReg(unsigned ValNo, MVT ValVT,
  58. unsigned RegNo, MVT LocVT,
  59. LocInfo HTP) {
  60. CCValAssign Ret;
  61. Ret.ValNo = ValNo;
  62. Ret.Loc = RegNo;
  63. Ret.isMem = false;
  64. Ret.isCustom = false;
  65. Ret.HTP = HTP;
  66. Ret.ValVT = ValVT;
  67. Ret.LocVT = LocVT;
  68. return Ret;
  69. }
  70. static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
  71. unsigned RegNo, MVT LocVT,
  72. LocInfo HTP) {
  73. CCValAssign Ret;
  74. Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
  75. Ret.isCustom = true;
  76. return Ret;
  77. }
  78. static CCValAssign getMem(unsigned ValNo, MVT ValVT,
  79. unsigned Offset, MVT LocVT,
  80. LocInfo HTP) {
  81. CCValAssign Ret;
  82. Ret.ValNo = ValNo;
  83. Ret.Loc = Offset;
  84. Ret.isMem = true;
  85. Ret.isCustom = false;
  86. Ret.HTP = HTP;
  87. Ret.ValVT = ValVT;
  88. Ret.LocVT = LocVT;
  89. return Ret;
  90. }
  91. static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
  92. unsigned Offset, MVT LocVT,
  93. LocInfo HTP) {
  94. CCValAssign Ret;
  95. Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
  96. Ret.isCustom = true;
  97. return Ret;
  98. }
  99. unsigned getValNo() const { return ValNo; }
  100. MVT getValVT() const { return ValVT; }
  101. bool isRegLoc() const { return !isMem; }
  102. bool isMemLoc() const { return isMem; }
  103. bool needsCustom() const { return isCustom; }
  104. unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
  105. unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
  106. MVT getLocVT() const { return LocVT; }
  107. LocInfo getLocInfo() const { return HTP; }
  108. bool isExtInLoc() const {
  109. return (HTP == AExt || HTP == SExt || HTP == ZExt);
  110. }
  111. };
  112. /// CCAssignFn - This function assigns a location for Val, updating State to
  113. /// reflect the change. It returns 'true' if it failed to handle Val.
  114. typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
  115. MVT LocVT, CCValAssign::LocInfo LocInfo,
  116. ISD::ArgFlagsTy ArgFlags, CCState &State);
  117. /// CCCustomFn - This function assigns a location for Val, possibly updating
  118. /// all args to reflect changes and indicates if it handled it. It must set
  119. /// isCustom if it handles the arg and returns true.
  120. typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
  121. MVT &LocVT, CCValAssign::LocInfo &LocInfo,
  122. ISD::ArgFlagsTy &ArgFlags, CCState &State);
  123. /// ParmContext - This enum tracks whether calling convention lowering is in
  124. /// the context of prologue or call generation. Not all backends make use of
  125. /// this information.
  126. typedef enum { Unknown, Prologue, Call } ParmContext;
  127. /// CCState - This class holds information needed while lowering arguments and
  128. /// return values. It captures which registers are already assigned and which
  129. /// stack slots are used. It provides accessors to allocate these values.
  130. class CCState {
  131. private:
  132. CallingConv::ID CallingConv;
  133. bool IsVarArg;
  134. MachineFunction &MF;
  135. const TargetMachine &TM;
  136. const TargetRegisterInfo &TRI;
  137. SmallVector<CCValAssign, 16> &Locs;
  138. LLVMContext &Context;
  139. unsigned StackOffset;
  140. SmallVector<uint32_t, 16> UsedRegs;
  141. unsigned FirstByValReg;
  142. bool FirstByValRegValid;
  143. protected:
  144. ParmContext CallOrPrologue;
  145. public:
  146. CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
  147. const TargetMachine &TM, SmallVector<CCValAssign, 16> &locs,
  148. LLVMContext &C);
  149. void addLoc(const CCValAssign &V) {
  150. Locs.push_back(V);
  151. }
  152. LLVMContext &getContext() const { return Context; }
  153. const TargetMachine &getTarget() const { return TM; }
  154. MachineFunction &getMachineFunction() const { return MF; }
  155. CallingConv::ID getCallingConv() const { return CallingConv; }
  156. bool isVarArg() const { return IsVarArg; }
  157. unsigned getNextStackOffset() const { return StackOffset; }
  158. /// isAllocated - Return true if the specified register (or an alias) is
  159. /// allocated.
  160. bool isAllocated(unsigned Reg) const {
  161. return UsedRegs[Reg/32] & (1 << (Reg&31));
  162. }
  163. /// AnalyzeFormalArguments - Analyze an array of argument values,
  164. /// incorporating info about the formals into this state.
  165. void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
  166. CCAssignFn Fn);
  167. /// AnalyzeReturn - Analyze the returned values of a return,
  168. /// incorporating info about the result values into this state.
  169. void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
  170. CCAssignFn Fn);
  171. /// CheckReturn - Analyze the return values of a function, returning
  172. /// true if the return can be performed without sret-demotion, and
  173. /// false otherwise.
  174. bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
  175. CCAssignFn Fn);
  176. /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
  177. /// incorporating info about the passed values into this state.
  178. void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
  179. CCAssignFn Fn);
  180. /// AnalyzeCallOperands - Same as above except it takes vectors of types
  181. /// and argument flags.
  182. void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
  183. SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
  184. CCAssignFn Fn);
  185. /// AnalyzeCallResult - Analyze the return values of a call,
  186. /// incorporating info about the passed values into this state.
  187. void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
  188. CCAssignFn Fn);
  189. /// AnalyzeCallResult - Same as above except it's specialized for calls which
  190. /// produce a single value.
  191. void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
  192. /// getFirstUnallocated - Return the first unallocated register in the set, or
  193. /// NumRegs if they are all allocated.
  194. unsigned getFirstUnallocated(const uint16_t *Regs, unsigned NumRegs) const {
  195. for (unsigned i = 0; i != NumRegs; ++i)
  196. if (!isAllocated(Regs[i]))
  197. return i;
  198. return NumRegs;
  199. }
  200. /// AllocateReg - Attempt to allocate one register. If it is not available,
  201. /// return zero. Otherwise, return the register, marking it and any aliases
  202. /// as allocated.
  203. unsigned AllocateReg(unsigned Reg) {
  204. if (isAllocated(Reg)) return 0;
  205. MarkAllocated(Reg);
  206. return Reg;
  207. }
  208. /// Version of AllocateReg with extra register to be shadowed.
  209. unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
  210. if (isAllocated(Reg)) return 0;
  211. MarkAllocated(Reg);
  212. MarkAllocated(ShadowReg);
  213. return Reg;
  214. }
  215. /// AllocateReg - Attempt to allocate one of the specified registers. If none
  216. /// are available, return zero. Otherwise, return the first one available,
  217. /// marking it and any aliases as allocated.
  218. unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) {
  219. unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
  220. if (FirstUnalloc == NumRegs)
  221. return 0; // Didn't find the reg.
  222. // Mark the register and any aliases as allocated.
  223. unsigned Reg = Regs[FirstUnalloc];
  224. MarkAllocated(Reg);
  225. return Reg;
  226. }
  227. /// Version of AllocateReg with list of registers to be shadowed.
  228. unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs,
  229. unsigned NumRegs) {
  230. unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
  231. if (FirstUnalloc == NumRegs)
  232. return 0; // Didn't find the reg.
  233. // Mark the register and any aliases as allocated.
  234. unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
  235. MarkAllocated(Reg);
  236. MarkAllocated(ShadowReg);
  237. return Reg;
  238. }
  239. /// AllocateStack - Allocate a chunk of stack space with the specified size
  240. /// and alignment.
  241. unsigned AllocateStack(unsigned Size, unsigned Align) {
  242. assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
  243. StackOffset = ((StackOffset + Align-1) & ~(Align-1));
  244. unsigned Result = StackOffset;
  245. StackOffset += Size;
  246. MF.getFrameInfo()->ensureMaxAlignment(Align);
  247. return Result;
  248. }
  249. /// Version of AllocateStack with extra register to be shadowed.
  250. unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
  251. MarkAllocated(ShadowReg);
  252. return AllocateStack(Size, Align);
  253. }
  254. // HandleByVal - Allocate a stack slot large enough to pass an argument by
  255. // value. The size and alignment information of the argument is encoded in its
  256. // parameter attribute.
  257. void HandleByVal(unsigned ValNo, MVT ValVT,
  258. MVT LocVT, CCValAssign::LocInfo LocInfo,
  259. int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
  260. // First GPR that carries part of a byval aggregate that's split
  261. // between registers and memory.
  262. unsigned getFirstByValReg() const { return FirstByValRegValid ? FirstByValReg : 0; }
  263. void setFirstByValReg(unsigned r) { FirstByValReg = r; FirstByValRegValid = true; }
  264. void clearFirstByValReg() { FirstByValReg = 0; FirstByValRegValid = false; }
  265. bool isFirstByValRegValid() const { return FirstByValRegValid; }
  266. ParmContext getCallOrPrologue() const { return CallOrPrologue; }
  267. private:
  268. /// MarkAllocated - Mark a register and all of its aliases as allocated.
  269. void MarkAllocated(unsigned Reg);
  270. };
  271. } // end namespace llvm
  272. #endif