Counter Strike : Global Offensive Source Code
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  1. //===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //
  10. // This file declares codegen opcodes and related utilities.
  11. //
  12. //===----------------------------------------------------------------------===//
  13. #ifndef LLVM_CODEGEN_ISDOPCODES_H
  14. #define LLVM_CODEGEN_ISDOPCODES_H
  15. namespace llvm {
  16. /// ISD namespace - This namespace contains an enum which represents all of the
  17. /// SelectionDAG node types and value types.
  18. ///
  19. namespace ISD {
  20. //===--------------------------------------------------------------------===//
  21. /// ISD::NodeType enum - This enum defines the target-independent operators
  22. /// for a SelectionDAG.
  23. ///
  24. /// Targets may also define target-dependent operator codes for SDNodes. For
  25. /// example, on x86, these are the enum values in the X86ISD namespace.
  26. /// Targets should aim to use target-independent operators to model their
  27. /// instruction sets as much as possible, and only use target-dependent
  28. /// operators when they have special requirements.
  29. ///
  30. /// Finally, during and after selection proper, SNodes may use special
  31. /// operator codes that correspond directly with MachineInstr opcodes. These
  32. /// are used to represent selected instructions. See the isMachineOpcode()
  33. /// and getMachineOpcode() member functions of SDNode.
  34. ///
  35. enum NodeType {
  36. /// DELETED_NODE - This is an illegal value that is used to catch
  37. /// errors. This opcode is not a legal opcode for any node.
  38. DELETED_NODE,
  39. /// EntryToken - This is the marker used to indicate the start of a region.
  40. EntryToken,
  41. /// TokenFactor - This node takes multiple tokens as input and produces a
  42. /// single token result. This is used to represent the fact that the operand
  43. /// operators are independent of each other.
  44. TokenFactor,
  45. /// AssertSext, AssertZext - These nodes record if a register contains a
  46. /// value that has already been zero or sign extended from a narrower type.
  47. /// These nodes take two operands. The first is the node that has already
  48. /// been extended, and the second is a value type node indicating the width
  49. /// of the extension
  50. AssertSext, AssertZext,
  51. /// Various leaf nodes.
  52. BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask,
  53. Constant, ConstantFP,
  54. GlobalAddress, GlobalTLSAddress, FrameIndex,
  55. JumpTable, ConstantPool, ExternalSymbol, BlockAddress,
  56. /// The address of the GOT
  57. GLOBAL_OFFSET_TABLE,
  58. /// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
  59. /// llvm.returnaddress on the DAG. These nodes take one operand, the index
  60. /// of the frame or return address to return. An index of zero corresponds
  61. /// to the current function's frame or return address, an index of one to
  62. /// the parent's frame or return address, and so on.
  63. FRAMEADDR, RETURNADDR,
  64. /// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
  65. /// first (possible) on-stack argument. This is needed for correct stack
  66. /// adjustment during unwind.
  67. FRAME_TO_ARGS_OFFSET,
  68. /// RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the
  69. /// address of the exception block on entry to an landing pad block.
  70. EXCEPTIONADDR,
  71. /// RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the
  72. /// address of the Language Specific Data Area for the enclosing function.
  73. LSDAADDR,
  74. /// RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node
  75. /// represents the selection index of the exception thrown.
  76. EHSELECTION,
  77. /// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
  78. /// 'eh_return' gcc dwarf builtin, which is used to return from
  79. /// exception. The general meaning is: adjust stack by OFFSET and pass
  80. /// execution to HANDLER. Many platform-related details also :)
  81. EH_RETURN,
  82. /// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer)
  83. /// This corresponds to the eh.sjlj.setjmp intrinsic.
  84. /// It takes an input chain and a pointer to the jump buffer as inputs
  85. /// and returns an outchain.
  86. EH_SJLJ_SETJMP,
  87. /// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer)
  88. /// This corresponds to the eh.sjlj.longjmp intrinsic.
  89. /// It takes an input chain and a pointer to the jump buffer as inputs
  90. /// and returns an outchain.
  91. EH_SJLJ_LONGJMP,
  92. /// TargetConstant* - Like Constant*, but the DAG does not do any folding,
  93. /// simplification, or lowering of the constant. They are used for constants
  94. /// which are known to fit in the immediate fields of their users, or for
  95. /// carrying magic numbers which are not values which need to be
  96. /// materialized in registers.
  97. TargetConstant,
  98. TargetConstantFP,
  99. /// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
  100. /// anything else with this node, and this is valid in the target-specific
  101. /// dag, turning into a GlobalAddress operand.
  102. TargetGlobalAddress,
  103. TargetGlobalTLSAddress,
  104. TargetFrameIndex,
  105. TargetJumpTable,
  106. TargetConstantPool,
  107. TargetExternalSymbol,
  108. TargetBlockAddress,
  109. /// TargetIndex - Like a constant pool entry, but with completely
  110. /// target-dependent semantics. Holds target flags, a 32-bit index, and a
  111. /// 64-bit index. Targets can use this however they like.
  112. TargetIndex,
  113. /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
  114. /// This node represents a target intrinsic function with no side effects.
  115. /// The first operand is the ID number of the intrinsic from the
  116. /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The
  117. /// node returns the result of the intrinsic.
  118. INTRINSIC_WO_CHAIN,
  119. /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
  120. /// This node represents a target intrinsic function with side effects that
  121. /// returns a result. The first operand is a chain pointer. The second is
  122. /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The
  123. /// operands to the intrinsic follow. The node has two results, the result
  124. /// of the intrinsic and an output chain.
  125. INTRINSIC_W_CHAIN,
  126. /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
  127. /// This node represents a target intrinsic function with side effects that
  128. /// does not return a result. The first operand is a chain pointer. The
  129. /// second is the ID number of the intrinsic from the llvm::Intrinsic
  130. /// namespace. The operands to the intrinsic follow.
  131. INTRINSIC_VOID,
  132. /// CopyToReg - This node has three operands: a chain, a register number to
  133. /// set to this value, and a value.
  134. CopyToReg,
  135. /// CopyFromReg - This node indicates that the input value is a virtual or
  136. /// physical register that is defined outside of the scope of this
  137. /// SelectionDAG. The register is available from the RegisterSDNode object.
  138. CopyFromReg,
  139. /// UNDEF - An undefined node.
  140. UNDEF,
  141. /// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
  142. /// a Constant, which is required to be operand #1) half of the integer or
  143. /// float value specified as operand #0. This is only for use before
  144. /// legalization, for values that will be broken into multiple registers.
  145. EXTRACT_ELEMENT,
  146. /// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
  147. /// Given two values of the same integer value type, this produces a value
  148. /// twice as big. Like EXTRACT_ELEMENT, this can only be used before
  149. /// legalization.
  150. BUILD_PAIR,
  151. /// MERGE_VALUES - This node takes multiple discrete operands and returns
  152. /// them all as its individual results. This nodes has exactly the same
  153. /// number of inputs and outputs. This node is useful for some pieces of the
  154. /// code generator that want to think about a single node with multiple
  155. /// results, not multiple nodes.
  156. MERGE_VALUES,
  157. /// Simple integer binary arithmetic operators.
  158. ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
  159. /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
  160. /// a signed/unsigned value of type i[2*N], and return the full value as
  161. /// two results, each of type iN.
  162. SMUL_LOHI, UMUL_LOHI,
  163. /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
  164. /// remainder result.
  165. SDIVREM, UDIVREM,
  166. /// CARRY_FALSE - This node is used when folding other nodes,
  167. /// like ADDC/SUBC, which indicate the carry result is always false.
  168. CARRY_FALSE,
  169. /// Carry-setting nodes for multiple precision addition and subtraction.
  170. /// These nodes take two operands of the same value type, and produce two
  171. /// results. The first result is the normal add or sub result, the second
  172. /// result is the carry flag result.
  173. ADDC, SUBC,
  174. /// Carry-using nodes for multiple precision addition and subtraction. These
  175. /// nodes take three operands: The first two are the normal lhs and rhs to
  176. /// the add or sub, and the third is the input carry flag. These nodes
  177. /// produce two results; the normal result of the add or sub, and the output
  178. /// carry flag. These nodes both read and write a carry flag to allow them
  179. /// to them to be chained together for add and sub of arbitrarily large
  180. /// values.
  181. ADDE, SUBE,
  182. /// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
  183. /// These nodes take two operands: the normal LHS and RHS to the add. They
  184. /// produce two results: the normal result of the add, and a boolean that
  185. /// indicates if an overflow occurred (*not* a flag, because it may be store
  186. /// to memory, etc.). If the type of the boolean is not i1 then the high
  187. /// bits conform to getBooleanContents.
  188. /// These nodes are generated from llvm.[su]add.with.overflow intrinsics.
  189. SADDO, UADDO,
  190. /// Same for subtraction.
  191. SSUBO, USUBO,
  192. /// Same for multiplication.
  193. SMULO, UMULO,
  194. /// Simple binary floating point operators.
  195. FADD, FSUB, FMUL, FMA, FDIV, FREM,
  196. /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
  197. /// DAG node does not require that X and Y have the same type, just that the
  198. /// are both floating point. X and the result must have the same type.
  199. /// FCOPYSIGN(f32, f64) is allowed.
  200. FCOPYSIGN,
  201. /// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
  202. /// value as an integer 0/1 value.
  203. FGETSIGN,
  204. /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
  205. /// specified, possibly variable, elements. The number of elements is
  206. /// required to be a power of two. The types of the operands must all be
  207. /// the same and must match the vector element type, except that integer
  208. /// types are allowed to be larger than the element type, in which case
  209. /// the operands are implicitly truncated.
  210. BUILD_VECTOR,
  211. /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
  212. /// at IDX replaced with VAL. If the type of VAL is larger than the vector
  213. /// element type then VAL is truncated before replacement.
  214. INSERT_VECTOR_ELT,
  215. /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
  216. /// identified by the (potentially variable) element number IDX. If the
  217. /// return type is an integer type larger than the element type of the
  218. /// vector, the result is extended to the width of the return type.
  219. EXTRACT_VECTOR_ELT,
  220. /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
  221. /// vector type with the same length and element type, this produces a
  222. /// concatenated vector result value, with length equal to the sum of the
  223. /// lengths of the input vectors.
  224. CONCAT_VECTORS,
  225. /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector
  226. /// with VECTOR2 inserted into VECTOR1 at the (potentially
  227. /// variable) element number IDX, which must be a multiple of the
  228. /// VECTOR2 vector length. The elements of VECTOR1 starting at
  229. /// IDX are overwritten with VECTOR2. Elements IDX through
  230. /// vector_length(VECTOR2) must be valid VECTOR1 indices.
  231. INSERT_SUBVECTOR,
  232. /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
  233. /// vector value) starting with the element number IDX, which must be a
  234. /// constant multiple of the result vector length.
  235. EXTRACT_SUBVECTOR,
  236. /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
  237. /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
  238. /// values that indicate which value (or undef) each result element will
  239. /// get. These constant ints are accessible through the
  240. /// ShuffleVectorSDNode class. This is quite similar to the Altivec
  241. /// 'vperm' instruction, except that the indices must be constants and are
  242. /// in terms of the element size of VEC1/VEC2, not in terms of bytes.
  243. VECTOR_SHUFFLE,
  244. /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
  245. /// scalar value into element 0 of the resultant vector type. The top
  246. /// elements 1 to N-1 of the N-element vector are undefined. The type
  247. /// of the operand must match the vector element type, except when they
  248. /// are integer types. In this case the operand is allowed to be wider
  249. /// than the vector element type, and is implicitly truncated to it.
  250. SCALAR_TO_VECTOR,
  251. /// MULHU/MULHS - Multiply high - Multiply two integers of type iN,
  252. /// producing an unsigned/signed value of type i[2*N], then return the top
  253. /// part.
  254. MULHU, MULHS,
  255. /// Bitwise operators - logical and, logical or, logical xor.
  256. AND, OR, XOR,
  257. /// Shift and rotation operations. After legalization, the type of the
  258. /// shift amount is known to be TLI.getShiftAmountTy(). Before legalization
  259. /// the shift amount can be any type, but care must be taken to ensure it is
  260. /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before
  261. /// legalization, types like i1024 can occur and i8 doesn't have enough bits
  262. /// to represent the shift amount.
  263. /// When the 1st operand is a vector, the shift amount must be in the same
  264. /// type. (TLI.getShiftAmountTy() will return the same type when the input
  265. /// type is a vector.)
  266. SHL, SRA, SRL, ROTL, ROTR,
  267. /// Byte Swap and Counting operators.
  268. BSWAP, CTTZ, CTLZ, CTPOP,
  269. /// Bit counting operators with an undefined result for zero inputs.
  270. CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF,
  271. /// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
  272. /// i1 then the high bits must conform to getBooleanContents.
  273. SELECT,
  274. /// Select with a vector condition (op #0) and two vector operands (ops #1
  275. /// and #2), returning a vector result. All vectors have the same length.
  276. /// Much like the scalar select and setcc, each bit in the condition selects
  277. /// whether the corresponding result element is taken from op #1 or op #2.
  278. /// At first, the VSELECT condition is of vXi1 type. Later, targets may
  279. /// change the condition type in order to match the VSELECT node using a
  280. /// pattern. The condition follows the BooleanContent format of the target.
  281. VSELECT,
  282. /// Select with condition operator - This selects between a true value and
  283. /// a false value (ops #2 and #3) based on the boolean result of comparing
  284. /// the lhs and rhs (ops #0 and #1) of a conditional expression with the
  285. /// condition code in op #4, a CondCodeSDNode.
  286. SELECT_CC,
  287. /// SetCC operator - This evaluates to a true value iff the condition is
  288. /// true. If the result value type is not i1 then the high bits conform
  289. /// to getBooleanContents. The operands to this are the left and right
  290. /// operands to compare (ops #0, and #1) and the condition code to compare
  291. /// them with (op #2) as a CondCodeSDNode. If the operands are vector types
  292. /// then the result type must also be a vector type.
  293. SETCC,
  294. /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
  295. /// integer shift operations, just like ADD/SUB_PARTS. The operation
  296. /// ordering is:
  297. /// [Lo,Hi] = op [LoLHS,HiLHS], Amt
  298. SHL_PARTS, SRA_PARTS, SRL_PARTS,
  299. /// Conversion operators. These are all single input single output
  300. /// operations. For all of these, the result type must be strictly
  301. /// wider or narrower (depending on the operation) than the source
  302. /// type.
  303. /// SIGN_EXTEND - Used for integer types, replicating the sign bit
  304. /// into new bits.
  305. SIGN_EXTEND,
  306. /// ZERO_EXTEND - Used for integer types, zeroing the new bits.
  307. ZERO_EXTEND,
  308. /// ANY_EXTEND - Used for integer types. The high bits are undefined.
  309. ANY_EXTEND,
  310. /// TRUNCATE - Completely drop the high bits.
  311. TRUNCATE,
  312. /// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
  313. /// depends on the first letter) to floating point.
  314. SINT_TO_FP,
  315. UINT_TO_FP,
  316. /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
  317. /// sign extend a small value in a large integer register (e.g. sign
  318. /// extending the low 8 bits of a 32-bit register to fill the top 24 bits
  319. /// with the 7th bit). The size of the smaller type is indicated by the 1th
  320. /// operand, a ValueType node.
  321. SIGN_EXTEND_INREG,
  322. /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
  323. /// integer.
  324. FP_TO_SINT,
  325. FP_TO_UINT,
  326. /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type
  327. /// down to the precision of the destination VT. TRUNC is a flag, which is
  328. /// always an integer that is zero or one. If TRUNC is 0, this is a
  329. /// normal rounding, if it is 1, this FP_ROUND is known to not change the
  330. /// value of Y.
  331. ///
  332. /// The TRUNC = 1 case is used in cases where we know that the value will
  333. /// not be modified by the node, because Y is not using any of the extra
  334. /// precision of source type. This allows certain transformations like
  335. /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
  336. /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
  337. FP_ROUND,
  338. /// FLT_ROUNDS_ - Returns current rounding mode:
  339. /// -1 Undefined
  340. /// 0 Round to 0
  341. /// 1 Round to nearest
  342. /// 2 Round to +inf
  343. /// 3 Round to -inf
  344. FLT_ROUNDS_,
  345. /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and
  346. /// rounds it to a floating point value. It then promotes it and returns it
  347. /// in a register of the same size. This operation effectively just
  348. /// discards excess precision. The type to round down to is specified by
  349. /// the VT operand, a VTSDNode.
  350. FP_ROUND_INREG,
  351. /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
  352. FP_EXTEND,
  353. /// BITCAST - This operator converts between integer, vector and FP
  354. /// values, as if the value was stored to memory with one type and loaded
  355. /// from the same address with the other type (or equivalently for vector
  356. /// format conversions, etc). The source and result are required to have
  357. /// the same bit size (e.g. f32 <-> i32). This can also be used for
  358. /// int-to-int or fp-to-fp conversions, but that is a noop, deleted by
  359. /// getNode().
  360. BITCAST,
  361. /// CONVERT_RNDSAT - This operator is used to support various conversions
  362. /// between various types (float, signed, unsigned and vectors of those
  363. /// types) with rounding and saturation. NOTE: Avoid using this operator as
  364. /// most target don't support it and the operator might be removed in the
  365. /// future. It takes the following arguments:
  366. /// 0) value
  367. /// 1) dest type (type to convert to)
  368. /// 2) src type (type to convert from)
  369. /// 3) rounding imm
  370. /// 4) saturation imm
  371. /// 5) ISD::CvtCode indicating the type of conversion to do
  372. CONVERT_RNDSAT,
  373. /// FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform
  374. /// promotions and truncation for half-precision (16 bit) floating
  375. /// numbers. We need special nodes since FP16 is a storage-only type with
  376. /// special semantics of operations.
  377. FP16_TO_FP32, FP32_TO_FP16,
  378. /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
  379. /// FLOG, FLOG2, FLOG10, FEXP, FEXP2,
  380. /// FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary
  381. /// floating point operations. These are inspired by libm.
  382. FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
  383. FLOG, FLOG2, FLOG10, FEXP, FEXP2,
  384. FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR,
  385. /// FSINCOS - Compute both fsin and fcos as a single operation.
  386. FSINCOS,
  387. /// LOAD and STORE have token chains as their first operand, then the same
  388. /// operands as an LLVM load/store instruction, then an offset node that
  389. /// is added / subtracted from the base pointer to form the address (for
  390. /// indexed memory ops).
  391. LOAD, STORE,
  392. /// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
  393. /// to a specified boundary. This node always has two return values: a new
  394. /// stack pointer value and a chain. The first operand is the token chain,
  395. /// the second is the number of bytes to allocate, and the third is the
  396. /// alignment boundary. The size is guaranteed to be a multiple of the
  397. /// stack alignment, and the alignment is guaranteed to be bigger than the
  398. /// stack alignment (if required) or 0 to get standard stack alignment.
  399. DYNAMIC_STACKALLOC,
  400. /// Control flow instructions. These all have token chains.
  401. /// BR - Unconditional branch. The first operand is the chain
  402. /// operand, the second is the MBB to branch to.
  403. BR,
  404. /// BRIND - Indirect branch. The first operand is the chain, the second
  405. /// is the value to branch to, which must be of the same type as the
  406. /// target's pointer type.
  407. BRIND,
  408. /// BR_JT - Jumptable branch. The first operand is the chain, the second
  409. /// is the jumptable index, the last one is the jumptable entry index.
  410. BR_JT,
  411. /// BRCOND - Conditional branch. The first operand is the chain, the
  412. /// second is the condition, the third is the block to branch to if the
  413. /// condition is true. If the type of the condition is not i1, then the
  414. /// high bits must conform to getBooleanContents.
  415. BRCOND,
  416. /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
  417. /// that the condition is represented as condition code, and two nodes to
  418. /// compare, rather than as a combined SetCC node. The operands in order
  419. /// are chain, cc, lhs, rhs, block to branch to if condition is true.
  420. BR_CC,
  421. /// INLINEASM - Represents an inline asm block. This node always has two
  422. /// return values: a chain and a flag result. The inputs are as follows:
  423. /// Operand #0 : Input chain.
  424. /// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string.
  425. /// Operand #2 : a MDNodeSDNode with the !srcloc metadata.
  426. /// Operand #3 : HasSideEffect, IsAlignStack bits.
  427. /// After this, it is followed by a list of operands with this format:
  428. /// ConstantSDNode: Flags that encode whether it is a mem or not, the
  429. /// of operands that follow, etc. See InlineAsm.h.
  430. /// ... however many operands ...
  431. /// Operand #last: Optional, an incoming flag.
  432. ///
  433. /// The variable width operands are required to represent target addressing
  434. /// modes as a single "operand", even though they may have multiple
  435. /// SDOperands.
  436. INLINEASM,
  437. /// EH_LABEL - Represents a label in mid basic block used to track
  438. /// locations needed for debug and exception handling tables. These nodes
  439. /// take a chain as input and return a chain.
  440. EH_LABEL,
  441. /// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a
  442. /// value, the same type as the pointer type for the system, and an output
  443. /// chain.
  444. STACKSAVE,
  445. /// STACKRESTORE has two operands, an input chain and a pointer to restore
  446. /// to it returns an output chain.
  447. STACKRESTORE,
  448. /// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end
  449. /// of a call sequence, and carry arbitrary information that target might
  450. /// want to know. The first operand is a chain, the rest are specified by
  451. /// the target and not touched by the DAG optimizers.
  452. /// CALLSEQ_START..CALLSEQ_END pairs may not be nested.
  453. CALLSEQ_START, // Beginning of a call sequence
  454. CALLSEQ_END, // End of a call sequence
  455. /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE,
  456. /// and the alignment. It returns a pair of values: the vaarg value and a
  457. /// new chain.
  458. VAARG,
  459. /// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer,
  460. /// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
  461. /// source.
  462. VACOPY,
  463. /// VAEND, VASTART - VAEND and VASTART have three operands: an input chain,
  464. /// pointer, and a SRCVALUE.
  465. VAEND, VASTART,
  466. /// SRCVALUE - This is a node type that holds a Value* that is used to
  467. /// make reference to a value in the LLVM IR.
  468. SRCVALUE,
  469. /// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
  470. /// reference metadata in the IR.
  471. MDNODE_SDNODE,
  472. /// PCMARKER - This corresponds to the pcmarker intrinsic.
  473. PCMARKER,
  474. /// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
  475. /// The only operand is a chain and a value and a chain are produced. The
  476. /// value is the contents of the architecture specific cycle counter like
  477. /// register (or other high accuracy low latency clock source)
  478. READCYCLECOUNTER,
  479. /// HANDLENODE node - Used as a handle for various purposes.
  480. HANDLENODE,
  481. /// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It
  482. /// takes as input a token chain, the pointer to the trampoline, the pointer
  483. /// to the nested function, the pointer to pass for the 'nest' parameter, a
  484. /// SRCVALUE for the trampoline and another for the nested function
  485. /// (allowing targets to access the original Function*).
  486. /// It produces a token chain as output.
  487. INIT_TRAMPOLINE,
  488. /// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
  489. /// It takes a pointer to the trampoline and produces a (possibly) new
  490. /// pointer to the same trampoline with platform-specific adjustments
  491. /// applied. The pointer it returns points to an executable block of code.
  492. ADJUST_TRAMPOLINE,
  493. /// TRAP - Trapping instruction
  494. TRAP,
  495. /// DEBUGTRAP - Trap intended to get the attention of a debugger.
  496. DEBUGTRAP,
  497. /// PREFETCH - This corresponds to a prefetch intrinsic. The first operand
  498. /// is the chain. The other operands are the address to prefetch,
  499. /// read / write specifier, locality specifier and instruction / data cache
  500. /// specifier.
  501. PREFETCH,
  502. /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope)
  503. /// This corresponds to the fence instruction. It takes an input chain, and
  504. /// two integer constants: an AtomicOrdering and a SynchronizationScope.
  505. ATOMIC_FENCE,
  506. /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr)
  507. /// This corresponds to "load atomic" instruction.
  508. ATOMIC_LOAD,
  509. /// OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr, val)
  510. /// This corresponds to "store atomic" instruction.
  511. ATOMIC_STORE,
  512. /// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
  513. /// This corresponds to the cmpxchg instruction.
  514. ATOMIC_CMP_SWAP,
  515. /// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
  516. /// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
  517. /// These correspond to the atomicrmw instruction.
  518. ATOMIC_SWAP,
  519. ATOMIC_LOAD_ADD,
  520. ATOMIC_LOAD_SUB,
  521. ATOMIC_LOAD_AND,
  522. ATOMIC_LOAD_OR,
  523. ATOMIC_LOAD_XOR,
  524. ATOMIC_LOAD_NAND,
  525. ATOMIC_LOAD_MIN,
  526. ATOMIC_LOAD_MAX,
  527. ATOMIC_LOAD_UMIN,
  528. ATOMIC_LOAD_UMAX,
  529. /// This corresponds to the llvm.lifetime.* intrinsics. The first operand
  530. /// is the chain and the second operand is the alloca pointer.
  531. LIFETIME_START, LIFETIME_END,
  532. /// BUILTIN_OP_END - This must be the last enum value in this list.
  533. /// The target-specific pre-isel opcode values start here.
  534. BUILTIN_OP_END
  535. };
  536. /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
  537. /// which do not reference a specific memory location should be less than
  538. /// this value. Those that do must not be less than this value, and can
  539. /// be used with SelectionDAG::getMemIntrinsicNode.
  540. static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+150;
  541. //===--------------------------------------------------------------------===//
  542. /// MemIndexedMode enum - This enum defines the load / store indexed
  543. /// addressing modes.
  544. ///
  545. /// UNINDEXED "Normal" load / store. The effective address is already
  546. /// computed and is available in the base pointer. The offset
  547. /// operand is always undefined. In addition to producing a
  548. /// chain, an unindexed load produces one value (result of the
  549. /// load); an unindexed store does not produce a value.
  550. ///
  551. /// PRE_INC Similar to the unindexed mode where the effective address is
  552. /// PRE_DEC the value of the base pointer add / subtract the offset.
  553. /// It considers the computation as being folded into the load /
  554. /// store operation (i.e. the load / store does the address
  555. /// computation as well as performing the memory transaction).
  556. /// The base operand is always undefined. In addition to
  557. /// producing a chain, pre-indexed load produces two values
  558. /// (result of the load and the result of the address
  559. /// computation); a pre-indexed store produces one value (result
  560. /// of the address computation).
  561. ///
  562. /// POST_INC The effective address is the value of the base pointer. The
  563. /// POST_DEC value of the offset operand is then added to / subtracted
  564. /// from the base after memory transaction. In addition to
  565. /// producing a chain, post-indexed load produces two values
  566. /// (the result of the load and the result of the base +/- offset
  567. /// computation); a post-indexed store produces one value (the
  568. /// the result of the base +/- offset computation).
  569. enum MemIndexedMode {
  570. UNINDEXED = 0,
  571. PRE_INC,
  572. PRE_DEC,
  573. POST_INC,
  574. POST_DEC,
  575. LAST_INDEXED_MODE
  576. };
  577. //===--------------------------------------------------------------------===//
  578. /// LoadExtType enum - This enum defines the three variants of LOADEXT
  579. /// (load with extension).
  580. ///
  581. /// SEXTLOAD loads the integer operand and sign extends it to a larger
  582. /// integer result type.
  583. /// ZEXTLOAD loads the integer operand and zero extends it to a larger
  584. /// integer result type.
  585. /// EXTLOAD is used for two things: floating point extending loads and
  586. /// integer extending loads [the top bits are undefined].
  587. enum LoadExtType {
  588. NON_EXTLOAD = 0,
  589. EXTLOAD,
  590. SEXTLOAD,
  591. ZEXTLOAD,
  592. LAST_LOADEXT_TYPE
  593. };
  594. //===--------------------------------------------------------------------===//
  595. /// ISD::CondCode enum - These are ordered carefully to make the bitfields
  596. /// below work out, when considering SETFALSE (something that never exists
  597. /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered
  598. /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal
  599. /// to. If the "N" column is 1, the result of the comparison is undefined if
  600. /// the input is a NAN.
  601. ///
  602. /// All of these (except for the 'always folded ops') should be handled for
  603. /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
  604. /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
  605. ///
  606. /// Note that these are laid out in a specific order to allow bit-twiddling
  607. /// to transform conditions.
  608. enum CondCode {
  609. // Opcode N U L G E Intuitive operation
  610. SETFALSE, // 0 0 0 0 Always false (always folded)
  611. SETOEQ, // 0 0 0 1 True if ordered and equal
  612. SETOGT, // 0 0 1 0 True if ordered and greater than
  613. SETOGE, // 0 0 1 1 True if ordered and greater than or equal
  614. SETOLT, // 0 1 0 0 True if ordered and less than
  615. SETOLE, // 0 1 0 1 True if ordered and less than or equal
  616. SETONE, // 0 1 1 0 True if ordered and operands are unequal
  617. SETO, // 0 1 1 1 True if ordered (no nans)
  618. SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y)
  619. SETUEQ, // 1 0 0 1 True if unordered or equal
  620. SETUGT, // 1 0 1 0 True if unordered or greater than
  621. SETUGE, // 1 0 1 1 True if unordered, greater than, or equal
  622. SETULT, // 1 1 0 0 True if unordered or less than
  623. SETULE, // 1 1 0 1 True if unordered, less than, or equal
  624. SETUNE, // 1 1 1 0 True if unordered or not equal
  625. SETTRUE, // 1 1 1 1 Always true (always folded)
  626. // Don't care operations: undefined if the input is a nan.
  627. SETFALSE2, // 1 X 0 0 0 Always false (always folded)
  628. SETEQ, // 1 X 0 0 1 True if equal
  629. SETGT, // 1 X 0 1 0 True if greater than
  630. SETGE, // 1 X 0 1 1 True if greater than or equal
  631. SETLT, // 1 X 1 0 0 True if less than
  632. SETLE, // 1 X 1 0 1 True if less than or equal
  633. SETNE, // 1 X 1 1 0 True if not equal
  634. SETTRUE2, // 1 X 1 1 1 Always true (always folded)
  635. SETCC_INVALID // Marker value.
  636. };
  637. /// isSignedIntSetCC - Return true if this is a setcc instruction that
  638. /// performs a signed comparison when used with integer operands.
  639. inline bool isSignedIntSetCC(CondCode Code) {
  640. return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
  641. }
  642. /// isUnsignedIntSetCC - Return true if this is a setcc instruction that
  643. /// performs an unsigned comparison when used with integer operands.
  644. inline bool isUnsignedIntSetCC(CondCode Code) {
  645. return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
  646. }
  647. /// isTrueWhenEqual - Return true if the specified condition returns true if
  648. /// the two operands to the condition are equal. Note that if one of the two
  649. /// operands is a NaN, this value is meaningless.
  650. inline bool isTrueWhenEqual(CondCode Cond) {
  651. return ((int)Cond & 1) != 0;
  652. }
  653. /// getUnorderedFlavor - This function returns 0 if the condition is always
  654. /// false if an operand is a NaN, 1 if the condition is always true if the
  655. /// operand is a NaN, and 2 if the condition is undefined if the operand is a
  656. /// NaN.
  657. inline unsigned getUnorderedFlavor(CondCode Cond) {
  658. return ((int)Cond >> 3) & 3;
  659. }
  660. /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
  661. /// 'op' is a valid SetCC operation.
  662. CondCode getSetCCInverse(CondCode Operation, bool isInteger);
  663. /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
  664. /// when given the operation for (X op Y).
  665. CondCode getSetCCSwappedOperands(CondCode Operation);
  666. /// getSetCCOrOperation - Return the result of a logical OR between different
  667. /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This
  668. /// function returns SETCC_INVALID if it is not possible to represent the
  669. /// resultant comparison.
  670. CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
  671. /// getSetCCAndOperation - Return the result of a logical AND between
  672. /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
  673. /// function returns SETCC_INVALID if it is not possible to represent the
  674. /// resultant comparison.
  675. CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
  676. //===--------------------------------------------------------------------===//
  677. /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT
  678. /// supports.
  679. enum CvtCode {
  680. CVT_FF, /// Float from Float
  681. CVT_FS, /// Float from Signed
  682. CVT_FU, /// Float from Unsigned
  683. CVT_SF, /// Signed from Float
  684. CVT_UF, /// Unsigned from Float
  685. CVT_SS, /// Signed from Signed
  686. CVT_SU, /// Signed from Unsigned
  687. CVT_US, /// Unsigned from Signed
  688. CVT_UU, /// Unsigned from Unsigned
  689. CVT_INVALID /// Marker - Invalid opcode
  690. };
  691. } // end llvm::ISD namespace
  692. } // end llvm namespace
  693. #endif