Counter Strike : Global Offensive Source Code
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  1. //===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. #ifndef LLVM_MC_TARGETPARSER_H
  10. #define LLVM_MC_TARGETPARSER_H
  11. #include "llvm/MC/MCParser/MCAsmParserExtension.h"
  12. namespace llvm {
  13. class MCStreamer;
  14. class StringRef;
  15. class SMLoc;
  16. class AsmToken;
  17. class MCParsedAsmOperand;
  18. class MCInst;
  19. template <typename T> class SmallVectorImpl;
  20. enum AsmRewriteKind {
  21. AOK_Delete = 0, // Rewrite should be ignored.
  22. AOK_Align, // Rewrite align as .align.
  23. AOK_DotOperator, // Rewrite a dot operator expression as an immediate.
  24. // E.g., [eax].foo.bar -> [eax].8
  25. AOK_Emit, // Rewrite _emit as .byte.
  26. AOK_Imm, // Rewrite as $$N.
  27. AOK_ImmPrefix, // Add $$ before a parsed Imm.
  28. AOK_Input, // Rewrite in terms of $N.
  29. AOK_Output, // Rewrite in terms of $N.
  30. AOK_SizeDirective, // Add a sizing directive (e.g., dword ptr).
  31. AOK_Skip // Skip emission (e.g., offset/type operators).
  32. };
  33. const char AsmRewritePrecedence [] = {
  34. 0, // AOK_Delete
  35. 1, // AOK_Align
  36. 1, // AOK_DotOperator
  37. 1, // AOK_Emit
  38. 3, // AOK_Imm
  39. 3, // AOK_ImmPrefix
  40. 2, // AOK_Input
  41. 2, // AOK_Output
  42. 4, // AOK_SizeDirective
  43. 1 // AOK_Skip
  44. };
  45. struct AsmRewrite {
  46. AsmRewriteKind Kind;
  47. SMLoc Loc;
  48. unsigned Len;
  49. unsigned Val;
  50. public:
  51. AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0)
  52. : Kind(kind), Loc(loc), Len(len), Val(val) {}
  53. };
  54. struct ParseInstructionInfo {
  55. SmallVectorImpl<AsmRewrite> *AsmRewrites;
  56. ParseInstructionInfo() : AsmRewrites(0) {}
  57. ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites)
  58. : AsmRewrites(rewrites) {}
  59. ~ParseInstructionInfo() {}
  60. };
  61. /// MCTargetAsmParser - Generic interface to target specific assembly parsers.
  62. class MCTargetAsmParser : public MCAsmParserExtension {
  63. public:
  64. enum MatchResultTy {
  65. Match_InvalidOperand,
  66. Match_MissingFeature,
  67. Match_MnemonicFail,
  68. Match_Success,
  69. FIRST_TARGET_MATCH_RESULT_TY
  70. };
  71. private:
  72. MCTargetAsmParser(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
  73. void operator=(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
  74. protected: // Can only create subclasses.
  75. MCTargetAsmParser();
  76. /// AvailableFeatures - The current set of available features.
  77. unsigned AvailableFeatures;
  78. /// ParsingInlineAsm - Are we parsing ms-style inline assembly?
  79. bool ParsingInlineAsm;
  80. /// SemaCallback - The Sema callback implementation. Must be set when parsing
  81. /// ms-style inline assembly.
  82. MCAsmParserSemaCallback *SemaCallback;
  83. public:
  84. virtual ~MCTargetAsmParser();
  85. unsigned getAvailableFeatures() const { return AvailableFeatures; }
  86. void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; }
  87. bool isParsingInlineAsm () { return ParsingInlineAsm; }
  88. void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; }
  89. void setSemaCallback(MCAsmParserSemaCallback *Callback) {
  90. SemaCallback = Callback;
  91. }
  92. virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
  93. SMLoc &EndLoc) = 0;
  94. /// ParseInstruction - Parse one assembly instruction.
  95. ///
  96. /// The parser is positioned following the instruction name. The target
  97. /// specific instruction parser should parse the entire instruction and
  98. /// construct the appropriate MCInst, or emit an error. On success, the entire
  99. /// line should be parsed up to and including the end-of-statement token. On
  100. /// failure, the parser is not required to read to the end of the line.
  101. //
  102. /// \param Name - The instruction name.
  103. /// \param NameLoc - The source location of the name.
  104. /// \param Operands [out] - The list of parsed operands, this returns
  105. /// ownership of them to the caller.
  106. /// \return True on failure.
  107. virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
  108. SMLoc NameLoc,
  109. SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
  110. /// ParseDirective - Parse a target specific assembler directive
  111. ///
  112. /// The parser is positioned following the directive name. The target
  113. /// specific directive parser should parse the entire directive doing or
  114. /// recording any target specific work, or return true and do nothing if the
  115. /// directive is not target specific. If the directive is specific for
  116. /// the target, the entire line is parsed up to and including the
  117. /// end-of-statement token and false is returned.
  118. ///
  119. /// \param DirectiveID - the identifier token of the directive.
  120. virtual bool ParseDirective(AsmToken DirectiveID) = 0;
  121. /// mnemonicIsValid - This returns true if this is a valid mnemonic and false
  122. /// otherwise.
  123. virtual bool mnemonicIsValid(StringRef Mnemonic) = 0;
  124. /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
  125. /// instruction as an actual MCInst and emit it to the specified MCStreamer.
  126. /// This returns false on success and returns true on failure to match.
  127. ///
  128. /// On failure, the target parser is responsible for emitting a diagnostic
  129. /// explaining the match failure.
  130. virtual bool
  131. MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
  132. SmallVectorImpl<MCParsedAsmOperand*> &Operands,
  133. MCStreamer &Out, unsigned &ErrorInfo,
  134. bool MatchingInlineAsm) = 0;
  135. /// Allow a target to add special case operand matching for things that
  136. /// tblgen doesn't/can't handle effectively. For example, literal
  137. /// immediates on ARM. TableGen expects a token operand, but the parser
  138. /// will recognize them as immediates.
  139. virtual unsigned validateTargetOperandClass(MCParsedAsmOperand *Op,
  140. unsigned Kind) {
  141. return Match_InvalidOperand;
  142. }
  143. /// checkTargetMatchPredicate - Validate the instruction match against
  144. /// any complex target predicates not expressible via match classes.
  145. virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
  146. return Match_Success;
  147. }
  148. virtual void convertToMapAndConstraints(unsigned Kind,
  149. const SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
  150. };
  151. } // End llvm namespace
  152. #endif