Counter Strike : Global Offensive Source Code
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

190 lines
6.7 KiB

  1. //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //
  10. // This file implements a virtual register map. This maps virtual registers to
  11. // physical registers and virtual registers to stack slots. It is created and
  12. // updated by a register allocator and then used by a machine code rewriter that
  13. // adds spill code and rewrites virtual into physical register references.
  14. //
  15. //===----------------------------------------------------------------------===//
  16. #ifndef LLVM_CODEGEN_VIRTREGMAP_H
  17. #define LLVM_CODEGEN_VIRTREGMAP_H
  18. #include "llvm/ADT/IndexedMap.h"
  19. #include "llvm/CodeGen/MachineFunctionPass.h"
  20. #include "llvm/Target/TargetRegisterInfo.h"
  21. namespace llvm {
  22. class MachineInstr;
  23. class MachineFunction;
  24. class MachineRegisterInfo;
  25. class TargetInstrInfo;
  26. class raw_ostream;
  27. class SlotIndexes;
  28. class VirtRegMap : public MachineFunctionPass {
  29. public:
  30. enum {
  31. NO_PHYS_REG = 0,
  32. NO_STACK_SLOT = (1L << 30)-1,
  33. MAX_STACK_SLOT = (1L << 18)-1
  34. };
  35. private:
  36. MachineRegisterInfo *MRI;
  37. const TargetInstrInfo *TII;
  38. const TargetRegisterInfo *TRI;
  39. MachineFunction *MF;
  40. /// Virt2PhysMap - This is a virtual to physical register
  41. /// mapping. Each virtual register is required to have an entry in
  42. /// it; even spilled virtual registers (the register mapped to a
  43. /// spilled register is the temporary used to load it from the
  44. /// stack).
  45. IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
  46. /// Virt2StackSlotMap - This is virtual register to stack slot
  47. /// mapping. Each spilled virtual register has an entry in it
  48. /// which corresponds to the stack slot this register is spilled
  49. /// at.
  50. IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
  51. /// Virt2SplitMap - This is virtual register to splitted virtual register
  52. /// mapping.
  53. IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
  54. /// createSpillSlot - Allocate a spill slot for RC from MFI.
  55. unsigned createSpillSlot(const TargetRegisterClass *RC);
  56. VirtRegMap(const VirtRegMap&) LLVM_DELETED_FUNCTION;
  57. void operator=(const VirtRegMap&) LLVM_DELETED_FUNCTION;
  58. public:
  59. static char ID;
  60. VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
  61. Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { }
  62. virtual bool runOnMachineFunction(MachineFunction &MF);
  63. virtual void getAnalysisUsage(AnalysisUsage &AU) const {
  64. AU.setPreservesAll();
  65. MachineFunctionPass::getAnalysisUsage(AU);
  66. }
  67. MachineFunction &getMachineFunction() const {
  68. assert(MF && "getMachineFunction called before runOnMachineFunction");
  69. return *MF;
  70. }
  71. MachineRegisterInfo &getRegInfo() const { return *MRI; }
  72. const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
  73. void grow();
  74. /// @brief returns true if the specified virtual register is
  75. /// mapped to a physical register
  76. bool hasPhys(unsigned virtReg) const {
  77. return getPhys(virtReg) != NO_PHYS_REG;
  78. }
  79. /// @brief returns the physical register mapped to the specified
  80. /// virtual register
  81. unsigned getPhys(unsigned virtReg) const {
  82. assert(TargetRegisterInfo::isVirtualRegister(virtReg));
  83. return Virt2PhysMap[virtReg];
  84. }
  85. /// @brief creates a mapping for the specified virtual register to
  86. /// the specified physical register
  87. void assignVirt2Phys(unsigned virtReg, unsigned physReg) {
  88. assert(TargetRegisterInfo::isVirtualRegister(virtReg) &&
  89. TargetRegisterInfo::isPhysicalRegister(physReg));
  90. assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
  91. "attempt to assign physical register to already mapped "
  92. "virtual register");
  93. Virt2PhysMap[virtReg] = physReg;
  94. }
  95. /// @brief clears the specified virtual register's, physical
  96. /// register mapping
  97. void clearVirt(unsigned virtReg) {
  98. assert(TargetRegisterInfo::isVirtualRegister(virtReg));
  99. assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
  100. "attempt to clear a not assigned virtual register");
  101. Virt2PhysMap[virtReg] = NO_PHYS_REG;
  102. }
  103. /// @brief clears all virtual to physical register mappings
  104. void clearAllVirt() {
  105. Virt2PhysMap.clear();
  106. grow();
  107. }
  108. /// @brief returns true if VirtReg is assigned to its preferred physreg.
  109. bool hasPreferredPhys(unsigned VirtReg);
  110. /// @brief returns true if VirtReg has a known preferred register.
  111. /// This returns false if VirtReg has a preference that is a virtual
  112. /// register that hasn't been assigned yet.
  113. bool hasKnownPreference(unsigned VirtReg);
  114. /// @brief records virtReg is a split live interval from SReg.
  115. void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
  116. Virt2SplitMap[virtReg] = SReg;
  117. }
  118. /// @brief returns the live interval virtReg is split from.
  119. unsigned getPreSplitReg(unsigned virtReg) const {
  120. return Virt2SplitMap[virtReg];
  121. }
  122. /// getOriginal - Return the original virtual register that VirtReg descends
  123. /// from through splitting.
  124. /// A register that was not created by splitting is its own original.
  125. /// This operation is idempotent.
  126. unsigned getOriginal(unsigned VirtReg) const {
  127. unsigned Orig = getPreSplitReg(VirtReg);
  128. return Orig ? Orig : VirtReg;
  129. }
  130. /// @brief returns true if the specified virtual register is not
  131. /// mapped to a stack slot or rematerialized.
  132. bool isAssignedReg(unsigned virtReg) const {
  133. if (getStackSlot(virtReg) == NO_STACK_SLOT)
  134. return true;
  135. // Split register can be assigned a physical register as well as a
  136. // stack slot or remat id.
  137. return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
  138. }
  139. /// @brief returns the stack slot mapped to the specified virtual
  140. /// register
  141. int getStackSlot(unsigned virtReg) const {
  142. assert(TargetRegisterInfo::isVirtualRegister(virtReg));
  143. return Virt2StackSlotMap[virtReg];
  144. }
  145. /// @brief create a mapping for the specifed virtual register to
  146. /// the next available stack slot
  147. int assignVirt2StackSlot(unsigned virtReg);
  148. /// @brief create a mapping for the specified virtual register to
  149. /// the specified stack slot
  150. void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
  151. void print(raw_ostream &OS, const Module* M = 0) const;
  152. void dump() const;
  153. };
  154. inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
  155. VRM.print(OS);
  156. return OS;
  157. }
  158. } // End llvm namespace
  159. #endif