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128 lines
3.4 KiB
128 lines
3.4 KiB
//========== Copyright © Valve Corporation, All rights reserved. ========
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#if !defined( JOB_FPCPATCH_SHARED_HDR ) && defined( _PS3 )
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#define JOB_FPCPATCH_SHARED_HDR
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#include "ps3/spu_job_shared.h"
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#include "ps3/ps3_gcm_config.h"
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namespace job_fpcpatch
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{
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// On PS/3, fragment programs have a maximum of 256 constant patch-ups that can be applied to each shader
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// PS 2.0 defines 96 as minimum, but I'm not sure how many we are actually using
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enum GlobalConstEnum_t
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{
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MAX_VIRTUAL_CONST_COUNT = MAX_FPCP_VIRTUAL_CONST_COUNT,
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FLAG_PUT_STATE = 1, // DMA the new state out when done; must be synchronized by vjobs code running at PPU
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FLAG_BREAK_JOB = 2,
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FLAG_DEFER_STATE = 4,
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FLAG_UNDEFER_STATE = 8 // this flag must fit in the lower 4 bits, because deferred state may be 16-byte aligned, not 128-byte aligned
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};
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union ConstRangeHeader_t
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{
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fltx4 m_f4;
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struct
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{
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uint32 m_nStart;
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uint32 m_nCount;
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} m_u32;
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};
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struct ALIGN16 FpcPatchStateHeader_t
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{
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#ifndef SPU
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volatile // there's no need to treat this as volatile on SPU
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#endif
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uint32 m_nStartRanges; // the start index of ConstRangeHeader_t
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uint32 m_nBufferMask; // the number of Qwords in the buffer - 1
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FpcPatchStateHeader_t * m_eaThis;
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uint32 m_nThisStatePatchCounter; // the patch counter corresponding to this state (the job at which it was up to date)
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uint32 m_eaThisStateJobDescriptor;
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uint32 m_nDebuggerBreak;
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}
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ALIGN16_POST;
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struct ALIGN128 FpcPatchState_t: FpcPatchStateHeader_t
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{
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// virtual const register states
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fltx4 m_reg[MAX_VIRTUAL_CONST_COUNT];
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fltx4 * GetBufferStart()
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{
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return ( fltx4* )( this + 1 ) ; // the buffer start address
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}
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}
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ALIGN128_POST;
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}
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namespace job_fpcpatch2
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{
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using job_fpcpatch::MAX_VIRTUAL_CONST_COUNT;
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using job_fpcpatch::FLAG_PUT_STATE;
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using job_fpcpatch::FLAG_BREAK_JOB;
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using job_fpcpatch::FLAG_DEFER_STATE;
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using job_fpcpatch::FLAG_UNDEFER_STATE;
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using job_fpcpatch::ConstRangeHeader_t;
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using job_fpcpatch::FpcPatchStateHeader_t;
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using job_fpcpatch::FpcPatchState_t;
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struct ALIGN16 FpHeader_t
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{
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uint32 m_nUcodeSize;
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// patches follow Ucode; patch is struct{ uint16 nConstIndex; uint16 nConstOffset; }
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// the offset is a qword index ( offset from the start of Ucode div 16 )
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uint32 m_nPatchCount;
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uint32 m_nShaderControl0;
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uint32 m_nTexControls; // Always <= 16; 1 tex control corresponds to 2 words in the tex control table
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// the dma size without the texcontrols
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uint GetDmaSize() const
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{
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return sizeof( *this ) + m_nUcodeSize + m_nPatchCount * sizeof( uint32 );
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}
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static uintp GetUcodeEa( uint eaFpHeader )
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{
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return eaFpHeader + sizeof( FpHeader_t );
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}
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uintp GetPatchTableEa( uint eaFpHeader )const
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{
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return GetUcodeEa( eaFpHeader ) + m_nUcodeSize;
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}
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uintp GetTexControlsEa( uint eaFpHeader )const
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{
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return GetPatchTableEa( eaFpHeader ) + AlignValue( m_nPatchCount * sizeof( uint32 ), 16 );
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}
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uintp GetTexControlsBytes( )const
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{
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return sizeof( uint32 ) * 2 * m_nTexControls;
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}
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#if !defined( SPU )
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const void * GetUcode()const
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{
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return ( void* )GetUcodeEa( ( uintp ) this );
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}
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const uint32 * GetPatchTable( )const
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{
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return ( uint32* )( uintp( GetUcode() ) + m_nUcodeSize );
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}
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const uint32 * GetTexControls()const
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{
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return ( uint32* )GetTexControlsEa( ( uintp )this );
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}
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#endif
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}
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ALIGN16_POST;
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}
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#endif
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