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345 lines
13 KiB
345 lines
13 KiB
//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the TargetMachine and LLVMTargetMachine classes.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETMACHINE_H
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#define LLVM_TARGET_TARGETMACHINE_H
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Target/TargetOptions.h"
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#include <cassert>
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#include <string>
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namespace llvm {
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class InstrItineraryData;
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class JITCodeEmitter;
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class GlobalValue;
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class MCAsmInfo;
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class MCCodeGenInfo;
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class MCContext;
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class PassManagerBase;
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class Target;
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class DataLayout;
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class TargetFrameLowering;
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class TargetInstrInfo;
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class TargetIntrinsicInfo;
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class TargetJITInfo;
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class TargetLowering;
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class TargetPassConfig;
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class TargetRegisterInfo;
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class TargetSelectionDAGInfo;
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class TargetSubtargetInfo;
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class ScalarTargetTransformInfo;
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class VectorTargetTransformInfo;
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class formatted_raw_ostream;
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class raw_ostream;
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//===----------------------------------------------------------------------===//
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///
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/// TargetMachine - Primary interface to the complete machine description for
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/// the target machine. All target-specific information should be accessible
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/// through this interface.
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///
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class TargetMachine {
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TargetMachine(const TargetMachine &) LLVM_DELETED_FUNCTION;
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void operator=(const TargetMachine &) LLVM_DELETED_FUNCTION;
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protected: // Can only create subclasses.
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TargetMachine(const Target &T, StringRef TargetTriple,
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StringRef CPU, StringRef FS, const TargetOptions &Options);
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/// TheTarget - The Target that this machine was created for.
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const Target &TheTarget;
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/// TargetTriple, TargetCPU, TargetFS - Triple string, CPU name, and target
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/// feature strings the TargetMachine instance is created with.
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std::string TargetTriple;
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std::string TargetCPU;
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std::string TargetFS;
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/// CodeGenInfo - Low level target information such as relocation model.
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const MCCodeGenInfo *CodeGenInfo;
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/// AsmInfo - Contains target specific asm information.
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///
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const MCAsmInfo *AsmInfo;
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unsigned MCRelaxAll : 1;
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unsigned MCNoExecStack : 1;
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unsigned MCSaveTempLabels : 1;
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unsigned MCUseLoc : 1;
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unsigned MCUseCFI : 1;
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unsigned MCUseDwarfDirectory : 1;
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public:
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virtual ~TargetMachine();
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const Target &getTarget() const { return TheTarget; }
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const StringRef getTargetTriple() const { return TargetTriple; }
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const StringRef getTargetCPU() const { return TargetCPU; }
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const StringRef getTargetFeatureString() const { return TargetFS; }
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/// getSubtargetImpl - virtual method implemented by subclasses that returns
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/// a reference to that target's TargetSubtargetInfo-derived member variable.
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virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; }
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mutable TargetOptions Options;
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/// \brief Reset the target options based on the function's attributes.
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void resetTargetOptions(const MachineFunction *MF) const;
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// Interfaces to the major aspects of target machine information:
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// -- Instruction opcode and operand information
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// -- Pipelines and scheduling information
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// -- Stack frame information
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// -- Selection DAG lowering information
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//
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virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
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virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
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virtual const TargetLowering *getTargetLowering() const { return 0; }
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virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
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virtual const DataLayout *getDataLayout() const { return 0; }
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/// getMCAsmInfo - Return target specific asm information.
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///
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const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
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/// getSubtarget - This method returns a pointer to the specified type of
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/// TargetSubtargetInfo. In debug builds, it verifies that the object being
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/// returned is of the correct type.
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template<typename STC> const STC &getSubtarget() const {
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return *static_cast<const STC*>(getSubtargetImpl());
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}
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/// getRegisterInfo - If register information is available, return it. If
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/// not, return null. This is kept separate from RegInfo until RegInfo has
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/// details of graph coloring register allocation removed from it.
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///
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virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
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/// getIntrinsicInfo - If intrinsic information is available, return it. If
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/// not, return null.
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///
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virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
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/// getJITInfo - If this target supports a JIT, return information for it,
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/// otherwise return null.
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///
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virtual TargetJITInfo *getJITInfo() { return 0; }
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/// getInstrItineraryData - Returns instruction itinerary data for the target
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/// or specific subtarget.
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///
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virtual const InstrItineraryData *getInstrItineraryData() const {
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return 0;
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}
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/// hasMCRelaxAll - Check whether all machine code instructions should be
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/// relaxed.
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bool hasMCRelaxAll() const { return MCRelaxAll; }
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/// setMCRelaxAll - Set whether all machine code instructions should be
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/// relaxed.
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void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
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/// hasMCSaveTempLabels - Check whether temporary labels will be preserved
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/// (i.e., not treated as temporary).
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bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
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/// setMCSaveTempLabels - Set whether temporary labels will be preserved
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/// (i.e., not treated as temporary).
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void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
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/// hasMCNoExecStack - Check whether an executable stack is not needed.
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bool hasMCNoExecStack() const { return MCNoExecStack; }
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/// setMCNoExecStack - Set whether an executabel stack is not needed.
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void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
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/// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
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bool hasMCUseLoc() const { return MCUseLoc; }
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/// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
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void setMCUseLoc(bool Value) { MCUseLoc = Value; }
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/// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
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bool hasMCUseCFI() const { return MCUseCFI; }
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/// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
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void setMCUseCFI(bool Value) { MCUseCFI = Value; }
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/// hasMCUseDwarfDirectory - Check whether we should use .file directives with
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/// explicit directories.
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bool hasMCUseDwarfDirectory() const { return MCUseDwarfDirectory; }
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/// setMCUseDwarfDirectory - Set whether all we should use .file directives
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/// with explicit directories.
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void setMCUseDwarfDirectory(bool Value) { MCUseDwarfDirectory = Value; }
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/// getRelocationModel - Returns the code generation relocation model. The
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/// choices are static, PIC, and dynamic-no-pic, and target default.
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Reloc::Model getRelocationModel() const;
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/// getCodeModel - Returns the code model. The choices are small, kernel,
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/// medium, large, and target default.
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CodeModel::Model getCodeModel() const;
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/// getTLSModel - Returns the TLS model which should be used for the given
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/// global variable.
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TLSModel::Model getTLSModel(const GlobalValue *GV) const;
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/// getOptLevel - Returns the optimization level: None, Less,
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/// Default, or Aggressive.
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CodeGenOpt::Level getOptLevel() const;
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void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
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bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
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/// getAsmVerbosityDefault - Returns the default value of asm verbosity.
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///
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static bool getAsmVerbosityDefault();
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/// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
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/// is false.
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static void setAsmVerbosityDefault(bool);
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/// getDataSections - Return true if data objects should be emitted into their
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/// own section, corresponds to -fdata-sections.
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static bool getDataSections();
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/// getFunctionSections - Return true if functions should be emitted into
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/// their own section, corresponding to -ffunction-sections.
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static bool getFunctionSections();
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/// setDataSections - Set if the data are emit into separate sections.
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static void setDataSections(bool);
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/// setFunctionSections - Set if the functions are emit into separate
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/// sections.
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static void setFunctionSections(bool);
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/// \brief Register analysis passes for this target with a pass manager.
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virtual void addAnalysisPasses(PassManagerBase &) {}
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/// CodeGenFileType - These enums are meant to be passed into
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/// addPassesToEmitFile to indicate what type of file to emit, and returned by
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/// it to indicate what type of file could actually be made.
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enum CodeGenFileType {
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CGFT_AssemblyFile,
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CGFT_ObjectFile,
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CGFT_Null // Do not emit any output.
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};
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/// addPassesToEmitFile - Add passes to the specified pass manager to get the
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/// specified file emitted. Typically this will involve several steps of code
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/// generation. This method should return true if emission of this file type
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/// is not supported, or false on success.
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virtual bool addPassesToEmitFile(PassManagerBase &,
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formatted_raw_ostream &,
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CodeGenFileType,
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bool /*DisableVerify*/ = true,
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AnalysisID StartAfter = 0,
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AnalysisID StopAfter = 0) {
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return true;
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}
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
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/// get machine code emitted. This uses a JITCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method returns true if machine code emission is
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/// not supported.
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///
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virtual bool addPassesToEmitMachineCode(PassManagerBase &,
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JITCodeEmitter &,
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bool /*DisableVerify*/ = true) {
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return true;
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}
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/// addPassesToEmitMC - Add passes to the specified pass manager to get
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/// machine code emitted with the MCJIT. This method returns true if machine
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/// code is not supported. It fills the MCContext Ctx pointer which can be
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/// used to build custom MCStreamer.
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///
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virtual bool addPassesToEmitMC(PassManagerBase &,
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MCContext *&,
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raw_ostream &,
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bool /*DisableVerify*/ = true) {
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return true;
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}
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};
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/// LLVMTargetMachine - This class describes a target machine that is
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/// implemented with the LLVM target-independent code generator.
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///
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class LLVMTargetMachine : public TargetMachine {
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protected: // Can only create subclasses.
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LLVMTargetMachine(const Target &T, StringRef TargetTriple,
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StringRef CPU, StringRef FS, TargetOptions Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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public:
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/// \brief Register analysis passes for this target with a pass manager.
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///
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/// This registers target independent analysis passes.
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virtual void addAnalysisPasses(PassManagerBase &PM);
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/// createPassConfig - Create a pass configuration object to be used by
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/// addPassToEmitX methods for generating a pipeline of CodeGen passes.
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virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
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/// addPassesToEmitFile - Add passes to the specified pass manager to get the
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/// specified file emitted. Typically this will involve several steps of code
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/// generation.
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virtual bool addPassesToEmitFile(PassManagerBase &PM,
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formatted_raw_ostream &Out,
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CodeGenFileType FileType,
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bool DisableVerify = true,
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AnalysisID StartAfter = 0,
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AnalysisID StopAfter = 0);
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
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/// get machine code emitted. This uses a JITCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method returns true if machine code emission is
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/// not supported.
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///
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virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
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JITCodeEmitter &MCE,
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bool DisableVerify = true);
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/// addPassesToEmitMC - Add passes to the specified pass manager to get
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/// machine code emitted with the MCJIT. This method returns true if machine
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/// code is not supported. It fills the MCContext Ctx pointer which can be
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/// used to build custom MCStreamer.
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///
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virtual bool addPassesToEmitMC(PassManagerBase &PM,
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MCContext *&Ctx,
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raw_ostream &OS,
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bool DisableVerify = true);
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/// addCodeEmitter - This pass should be overridden by the target to add a
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/// code emitter, if supported. If this is not supported, 'true' should be
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/// returned.
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virtual bool addCodeEmitter(PassManagerBase &,
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JITCodeEmitter &) {
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return true;
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}
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};
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} // End llvm namespace
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#endif
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