Windows NT 4.0 source code leak
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4 years ago
  1. /*++
  2. Copyright (c) 1991-1993 Microsoft Corporation
  3. Module Name:
  4. jxsysint.c
  5. Abstract:
  6. This module implements the HAL enable/disable system interrupt, and
  7. request interprocessor interrupt routines for a MIPS R3000 or R4000
  8. Jazz system.
  9. Author:
  10. David N. Cutler (davec) 6-May-1991
  11. Environment:
  12. Kernel mode
  13. Revision History:
  14. --*/
  15. #include "halp.h"
  16. VOID
  17. HalDisableSystemInterrupt (
  18. IN ULONG Vector,
  19. IN KIRQL Irql
  20. )
  21. /*++
  22. Routine Description:
  23. This routine disables the specified system interrupt.
  24. Arguments:
  25. Vector - Supplies the vector of the system interrupt that is disabled.
  26. Irql - Supplies the IRQL of the interrupting source.
  27. Return Value:
  28. None.
  29. --*/
  30. {
  31. KIRQL OldIrql;
  32. //
  33. // Raise IRQL to the highest level and acquire device enable spinlock.
  34. //
  35. KeRaiseIrql(HIGH_LEVEL, &OldIrql);
  36. KiAcquireSpinLock(&HalpSystemInterruptLock);
  37. //
  38. // If the vector number is within the range of builtin devices, then
  39. // disable the builtin device interrupt.
  40. //
  41. if ((Vector >= (DEVICE_VECTORS + 1)) && (Vector <= MAXIMUM_BUILTIN_VECTOR)) {
  42. HalpBuiltinInterruptEnable &= ~(1 << (Vector - DEVICE_VECTORS - 1));
  43. WRITE_REGISTER_USHORT(&((PINTERRUPT_REGISTERS)INTERRUPT_VIRTUAL_BASE)->Enable,
  44. HalpBuiltinInterruptEnable);
  45. }
  46. //
  47. // If the vector number is within the range of the EISA interrupts, then
  48. // disable the EISA interrrupt.
  49. //
  50. if (Vector >= EISA_VECTORS &&
  51. Vector < EISA_VECTORS + MAXIMUM_EISA_VECTOR &&
  52. Irql == EISA_DEVICE_LEVEL) {
  53. HalpDisableEisaInterrupt(Vector);
  54. }
  55. //
  56. // Release the device enable spin loc and lower IRQL to the previous level.
  57. //
  58. KiReleaseSpinLock(&HalpSystemInterruptLock);
  59. KeLowerIrql(OldIrql);
  60. return;
  61. }
  62. BOOLEAN
  63. HalEnableSystemInterrupt (
  64. IN ULONG Vector,
  65. IN KIRQL Irql,
  66. IN KINTERRUPT_MODE InterruptMode
  67. )
  68. /*++
  69. Routine Description:
  70. This routine enables the specified system interrupt.
  71. Arguments:
  72. Vector - Supplies the vector of the system interrupt that is enabled.
  73. Irql - Supplies the IRQL of the interrupting source.
  74. InterruptMode - Supplies the mode of the interrupt; LevelSensitive or
  75. Latched.
  76. Return Value:
  77. TRUE if the system interrupt was enabled
  78. --*/
  79. {
  80. KIRQL OldIrql;
  81. //
  82. // Raise IRQL to the highest level and acquire device enable spinlock.
  83. //
  84. KeRaiseIrql(HIGH_LEVEL, &OldIrql);
  85. KiAcquireSpinLock(&HalpSystemInterruptLock);
  86. //
  87. // If the vector number is within the range of builtin devices, then
  88. // enable the builtin device interrupt.
  89. //
  90. if ((Vector >= (DEVICE_VECTORS + 1)) && (Vector <= MAXIMUM_BUILTIN_VECTOR)) {
  91. HalpBuiltinInterruptEnable |= (1 << (Vector - DEVICE_VECTORS - 1));
  92. WRITE_REGISTER_USHORT(&((PINTERRUPT_REGISTERS)INTERRUPT_VIRTUAL_BASE)->Enable,
  93. HalpBuiltinInterruptEnable);
  94. }
  95. //
  96. // If the vector number is within the range of the EISA interrupts, then
  97. // enable the EISA interrrupt and set the Level/Edge register.
  98. //
  99. if (Vector >= EISA_VECTORS &&
  100. Vector < EISA_VECTORS + MAXIMUM_EISA_VECTOR &&
  101. Irql == EISA_DEVICE_LEVEL) {
  102. HalpEnableEisaInterrupt( Vector, InterruptMode);
  103. }
  104. //
  105. // Release the device enable spin loc and lower IRQL to the previous level.
  106. //
  107. KiReleaseSpinLock(&HalpSystemInterruptLock);
  108. KeLowerIrql(OldIrql);
  109. return TRUE;
  110. }
  111. ULONG
  112. HalGetInterruptVector(
  113. IN INTERFACE_TYPE InterfaceType,
  114. IN ULONG BusNumber,
  115. IN ULONG BusInterruptLevel,
  116. IN ULONG BusInterruptVector,
  117. OUT PKIRQL Irql,
  118. OUT PKAFFINITY Affinity
  119. )
  120. /*++
  121. Routine Description:
  122. This function returns the system interrupt vector and IRQL level
  123. corresponding to the specified bus interrupt level and/or vector.
  124. The system interrupt vector and IRQL are suitable for use in a
  125. subsequent call to KeInitializeInterrupt.
  126. Arguments:
  127. InterfaceType - Supplies the type of bus which the vector is for.
  128. BusNumber - Supplies the bus number for the device.
  129. BusInterruptLevel - Supplies the bus specific interrupt level.
  130. BusInterruptVector - Supplies the bus specific interrupt vector.
  131. Irql - Returns the system request priority.
  132. Affinity - Returns the affinity for the requested vector.
  133. Return Value:
  134. Returns the system interrupt vector corresponding to the specified device.
  135. --*/
  136. {
  137. //
  138. // If this is for the internal bus then just return the passed parameter.
  139. //
  140. if (InterfaceType == Internal) {
  141. //
  142. // Return the passed parameters.
  143. //
  144. *Affinity = 1;
  145. *Irql = (KIRQL)BusInterruptLevel;
  146. return(BusInterruptVector);
  147. }
  148. if (InterfaceType != Isa && InterfaceType != Eisa) {
  149. //
  150. // Not on this system return nothing.
  151. //
  152. *Affinity = 0;
  153. *Irql = 0;
  154. return(0);
  155. }
  156. //
  157. // Jazz and Duo only have one I/O bus which is an EISA, so the bus
  158. // number and the bus interrupt vector are unused.
  159. //
  160. // The IRQL level is always equal to the EISA level.
  161. //
  162. *Irql = EISA_DEVICE_LEVEL;
  163. //
  164. // Bus interrupt level 2 is actually mapped to bus level 9 in the Eisa
  165. // hardware.
  166. //
  167. if (BusInterruptLevel == 2) {
  168. BusInterruptLevel = 9;
  169. }
  170. //
  171. // Set the EISA interrupt affinity.
  172. //
  173. *Affinity = HalpEisaBusAffinity;
  174. //
  175. // The vector is equal to the specified bus level plus the EISA_VECTOR.
  176. //
  177. return(BusInterruptLevel + EISA_VECTORS);
  178. }
  179. VOID
  180. HalRequestIpi (
  181. IN ULONG Mask
  182. )
  183. /*++
  184. Routine Description:
  185. This routine requests an interprocessor interrupt on a set of processors.
  186. N.B. This routine must ensure that the interrupt is posted at the target
  187. processor(s) before returning.
  188. Arguments:
  189. Mask - Supplies the set of processors that are sent an interprocessor
  190. interrupt.
  191. Return Value:
  192. None.
  193. --*/
  194. {
  195. //
  196. // Request an interprocessor interrupt on each of the specified target
  197. // processors.
  198. //
  199. #if defined(_DUO_)
  200. WRITE_REGISTER_ULONG(&((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->IpInterruptRequest.Long,
  201. Mask);
  202. #endif
  203. return;
  204. }