Windows NT 4.0 source code leak
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

660 lines
15 KiB

4 years ago
  1. #ident "@(#) NEC xxinithl.c 1.12 95/06/19 11:45:28"
  2. /*++
  3. Copyright (c) 1991-1993 Microsoft Corporation
  4. Module Name:
  5. xxinithl.c
  6. Abstract:
  7. This module implements the initialization of the system dependent
  8. functions that define the Hardware Architecture Layer (HAL) for a
  9. MIPS R3000 or R4000 system.
  10. Revision History:
  11. --*/
  12. /*
  13. * Original source: Build Number 1.612
  14. *
  15. * Modify for R98(MIPS/R4400)
  16. *
  17. ***********************************************************************
  18. *
  19. * S001 94.03/09 T.Samezima
  20. *
  21. * add Spinlock HalpEifInterruptLock
  22. *
  23. * del only '#if defined(_DUO_)'
  24. *
  25. * K001 '94.5/30 (Mon) N.Kugimoto
  26. * Add allocate contigus phys memory for Internal device
  27. * use buffer.
  28. *
  29. * S002 '94.6/02 T.Samezima
  30. *
  31. * Add call HalpRegisterNmi
  32. *
  33. * S003 '94.8/25 T.Samezima
  34. *
  35. * Chg Set Io address before initialize interrupt
  36. *
  37. * S004 '94.9/26 T.Samezima
  38. *
  39. * Add Merge PCI Source Code
  40. *
  41. * K002 94/10/11 N.Kugimoto
  42. * Fix 807 Base
  43. * K003 94/10/13 N.Kugimoto
  44. * Chg HalpBugCheckBuffer -->HalpEifRegisterBuffer
  45. * -1 Chg HalpBusError logic change
  46. * K004 94/10/13 N.Kugimoto
  47. *
  48. * S005 '94.12/08 T.Samezima
  49. * Add Disable NMI.
  50. *
  51. * A002 1995/6/17 ataka@oa2.kb.nec.co.jp
  52. * - marge 1050 halx86
  53. * S006 1995/7/17 T.Samezima
  54. * Del Init header.
  55. */
  56. #include "halp.h"
  57. //
  58. // Define forward referenced prototypes.
  59. //
  60. VOID
  61. HalpBugCheckCallback (
  62. IN PVOID Buffer,
  63. IN ULONG Length
  64. );
  65. BOOLEAN
  66. HalpBusError (
  67. IN PEXCEPTION_RECORD ExceptionRecord,
  68. IN PKEXCEPTION_FRAME ExceptionFrame,
  69. IN PKTRAP_FRAME TrapFrame,
  70. IN PVOID VirtualAddress,
  71. IN PHYSICAL_ADDRESS PhysicalAddress
  72. );
  73. //
  74. // Put all code for HAL initialization in the INIT section. It will be
  75. // deallocated by memory management when phase 1 initialization is
  76. // completed.
  77. //
  78. #if defined(ALLOC_PRAGMA)
  79. #pragma alloc_text(INIT, HalInitSystem)
  80. #pragma alloc_text(INIT, HalInitializeProcessor)
  81. #pragma alloc_text(INIT, HalStartNextProcessor)
  82. #endif
  83. //
  84. // Define global spin locks used to synchronize various HAL operations.
  85. //
  86. KSPIN_LOCK HalpBeepLock;
  87. KSPIN_LOCK HalpDisplayAdapterLock;
  88. KSPIN_LOCK HalpSystemInterruptLock;
  89. /* Start S001 */
  90. KSPIN_LOCK HalpEifInterruptLock;
  91. /* End S001 */
  92. // K002 vvvvv
  93. // Define bug check information buffer and callback record.
  94. //
  95. #if !defined(_R98_) //K003
  96. typedef struct _HALP_BUGCHECK_BUFFER {
  97. ULONG FailedAddress;
  98. ULONG DiagnosticLow;
  99. ULONG DiagnosticHigh;
  100. } HALP_BUGCHECK_BUFFER, *PHALP_BUGCHECK_BUFFER;
  101. HALP_BUGCHECK_BUFFER HalpBugCheckBuffer;
  102. #endif
  103. KBUGCHECK_CALLBACK_RECORD HalpCallbackRecord;
  104. UCHAR HalpComponentId[] = "hal.dll";
  105. // K002^^^^
  106. BOOLEAN
  107. HalInitSystem (
  108. IN ULONG Phase,
  109. IN PLOADER_PARAMETER_BLOCK LoaderBlock
  110. )
  111. /*++
  112. Routine Description:
  113. This function initializes the Hardware Architecture Layer (HAL) for a
  114. MIPS R3000 or R4000 system.
  115. Arguments:
  116. Phase - Supplies the initialization phase (zero or one).
  117. LoaderBlock - Supplies a pointer to a loader parameter block.
  118. Return Value:
  119. A value of TRUE is returned is the initialization was successfully
  120. complete. Otherwise a value of FALSE is returend.
  121. --*/
  122. {
  123. PKPRCB Prcb;
  124. ULONG BuildType = 0;
  125. //K002 vvvv
  126. PHYSICAL_ADDRESS PhysicalAddress;
  127. PHYSICAL_ADDRESS ZeroAddress;
  128. ULONG AddressSpace;
  129. //K002 ^^^^
  130. //
  131. // Initialize the HAL components based on the phase of initialization
  132. // and the processor number.
  133. //
  134. Prcb = PCR->Prcb;
  135. PCR->DataBusError = HalpBusError; //K002
  136. PCR->InstructionBusError = HalpBusError; //K002
  137. if ((Phase == 0) || (Prcb->Number != 0)) {
  138. //
  139. // Phase 0 initialization.
  140. //
  141. // N.B. Phase 0 initialization is executed on all processors.
  142. //
  143. // Verify that the processor block major version number conform
  144. // to the system that is being loaded.
  145. //
  146. if (Prcb->MajorVersion != PRCB_MAJOR_VERSION) {
  147. KeBugCheck(MISMATCHED_HAL);
  148. }
  149. //
  150. // Map the fixed TB entries.
  151. //
  152. HalpMapFixedTbEntries();
  153. //
  154. // If processor 0 is being initialized, then initialize various
  155. // variables, spin locks, and the display adapter.
  156. //
  157. if (Prcb->Number == 0) {
  158. /* Start S002 */
  159. //
  160. // Set NMI interrupt service routine
  161. //
  162. #if !defined(DISABLE_NMI) //
  163. HalpRegisterNmi();
  164. #endif
  165. /* End S002 */
  166. //
  167. // Set the number of process id's and TB entries.
  168. //
  169. **((PULONG *)(&KeNumberProcessIds)) = 256;
  170. **((PULONG *)(&KeNumberTbEntries)) = 48;
  171. //
  172. // Set the interval clock increment value.
  173. //
  174. HalpCurrentTimeIncrement = MAXIMUM_INCREMENT;
  175. HalpNextTimeIncrement = MAXIMUM_INCREMENT;
  176. HalpNextIntervalCount = 0;
  177. KeSetTimeIncrement(MAXIMUM_INCREMENT, MINIMUM_INCREMENT);
  178. // A002
  179. // Set DMA I/O coherency attributes.
  180. //
  181. KeSetDmaIoCoherency(DMA_READ_DCACHE_INVALIDATE | DMA_READ_ICACHE_INVALIDATE | DMA_WRITE_DCACHE_SNOOP);
  182. //
  183. // Initialize all spin locks.
  184. //
  185. KeInitializeSpinLock(&HalpBeepLock);
  186. KeInitializeSpinLock(&HalpDisplayAdapterLock);
  187. KeInitializeSpinLock(&HalpSystemInterruptLock);
  188. /* Start S001 */
  189. KeInitializeSpinLock(&HalpEifInterruptLock);
  190. /* End S001 */
  191. //
  192. // Set address of cache error routine.
  193. //
  194. KeSetCacheErrorRoutine(HalpCacheErrorRoutine);
  195. //
  196. // Initialize the display adapter.
  197. //
  198. HalpInitializeDisplay0(LoaderBlock);
  199. //
  200. // Allocate map register memory.
  201. //
  202. HalpAllocateMapRegisters(LoaderBlock);
  203. // K001 Start
  204. // For Internal Device use buffer
  205. //
  206. HalpMapBufferSize = INITIAL_MAP_BUFFER_SMALL_SIZE;
  207. //
  208. // Allocate map buffers for the adapter objects
  209. //
  210. HalpMapBufferPhysicalAddress.LowPart =
  211. HalpAllocPhysicalMemory (LoaderBlock, MAXIMUM_PHYSICAL_ADDRESS,
  212. HalpMapBufferSize >> PAGE_SHIFT, TRUE);
  213. HalpMapBufferPhysicalAddress.HighPart = 0;
  214. if (!HalpMapBufferPhysicalAddress.LowPart) {
  215. //
  216. // There was not a satisfactory block. Clear the allocation.
  217. //
  218. HalpMapBufferSize = 0;
  219. } // End of K001
  220. // K002 vvvv
  221. // Initialize and register a bug check callback record.
  222. //
  223. KeInitializeCallbackRecord(&HalpCallbackRecord);
  224. KeRegisterBugCheckCallback(&HalpCallbackRecord,
  225. HalpBugCheckCallback,
  226. #if defined(_R98_) //K003
  227. HalpEifRegisterBuffer,
  228. #else
  229. &HalpBugCheckBuffer,
  230. #endif
  231. 41*4, //K003
  232. &HalpComponentId[0]);
  233. // K002 ^^^^
  234. }
  235. // Start S003
  236. #if defined(_R98_)
  237. //
  238. // Initialize I/O address
  239. //
  240. HalpMapIoSpace();
  241. #endif
  242. // End S003
  243. //
  244. // Initialize interrupts
  245. //
  246. HalpInitializeInterrupts();
  247. return TRUE;
  248. } else {
  249. //
  250. // Phase 1 initialization.
  251. //
  252. // N.B. Phase 1 initialization is only executed on processor 0.
  253. //
  254. // Complete initialization of the display adapter.
  255. //
  256. HalpRegisterInternalBusHandlers (); // A002
  257. if (HalpInitializeDisplay1(LoaderBlock) == FALSE) {
  258. return FALSE;
  259. } else {
  260. //
  261. // Map I/O space, calibrate the stall execution scale factor,
  262. // and create DMA data structures.
  263. //
  264. // Start S003
  265. #if !defined(_R98_)
  266. HalpMapIoSpace();
  267. #endif
  268. // End S003
  269. HalpCalibrateStall();
  270. HalpCreateDmaStructures();
  271. // K002 vvvvv
  272. // Map EISA memory space so the x86 bios emulator emulator can
  273. // initialze a video adapter in an EISA slot.
  274. //
  275. ZeroAddress.QuadPart = 0;
  276. AddressSpace = 0;
  277. HalTranslateBusAddress(Isa,
  278. 0,
  279. ZeroAddress,
  280. &AddressSpace,
  281. &PhysicalAddress);
  282. HalpEisaMemoryBase = MmMapIoSpace(PhysicalAddress,
  283. PAGE_SIZE * 256,
  284. FALSE);
  285. HalpInitializeX86DisplayAdapter();
  286. // K002 ^^^^^
  287. return TRUE;
  288. }
  289. }
  290. }
  291. //K002 vvvv
  292. // no change
  293. VOID
  294. HalpBugCheckCallback (
  295. IN PVOID Buffer,
  296. IN ULONG Length
  297. )
  298. /*++
  299. Routine Description:
  300. This function is called when a bug check occurs. Its function is
  301. to dump the state of the memory error registers into a bug check
  302. buffer.
  303. Arguments:
  304. Buffer - Supplies a pointer to the bug check buffer.
  305. Length - Supplies the length of the bug check buffer in bytes.
  306. Return Value:
  307. None.
  308. --*/
  309. {
  310. #if !defined(_R98_) //K003
  311. PHALP_BUGCHECK_BUFFER DumpBuffer;
  312. //
  313. // Capture the failed memory address and diagnostic registers.
  314. //
  315. DumpBuffer = (PHALP_BUGCHECK_BUFFER)Buffer;
  316. #if defined(_DUO_)
  317. DumpBuffer->DiagnosticLow =
  318. (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->InvalidAddress.Long;
  319. DumpBuffer->DiagnosticHigh =
  320. (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->EccDiagnostic.u.LargeInteger.HighPart;
  321. #else
  322. DumpBuffer->DiagnosticLow =
  323. (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->ParityDiagnosticLow.Long;
  324. DumpBuffer->DiagnosticHigh =
  325. (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->ParityDiagnosticHigh.Long;
  326. #endif
  327. DumpBuffer->FailedAddress = (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->MemoryFailedAddress.Long;
  328. #endif //_R98_
  329. return;
  330. }
  331. BOOLEAN
  332. HalpBusError (
  333. IN PEXCEPTION_RECORD ExceptionRecord,
  334. IN PKEXCEPTION_FRAME ExceptionFrame,
  335. IN PKTRAP_FRAME TrapFrame,
  336. IN PVOID VirtualAddress,
  337. IN PHYSICAL_ADDRESS PhysicalAddress
  338. )
  339. /*++
  340. Routine Description:
  341. This function provides the default bus error handling routine for NT.
  342. N.B. There is no return from this routine.
  343. Arguments:
  344. ExceptionRecord - Supplies a pointer to an exception record.
  345. ExceptionFrame - Supplies a pointer to an exception frame.
  346. TrapFrame - Supplies a pointer to a trap frame.
  347. VirtualAddress - Supplies the virtual address of the bus error.
  348. PhysicalAddress - Supplies the physical address of the bus error.
  349. Return Value:
  350. None.
  351. --*/
  352. {
  353. ULONG DiagnosticHigh;
  354. ULONG DiagnosticLow;
  355. #if !defined(_R98_) //K003-1
  356. ULONG FailedAddress;
  357. //
  358. // Bug check specifying the exception code, the virtual address, the
  359. // failed memory address, and either the ECC diagnostic registers or
  360. // the parity diagnostic registers depending on the platform.
  361. //
  362. #if defined(_DUO_)
  363. DiagnosticLow =
  364. (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->InvalidAddress.Long;
  365. DiagnosticHigh =
  366. (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->EccDiagnostic.u.LargeInteger.HighPart;
  367. #else
  368. DiagnosticLow = (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->ParityDiagnosticLow.Long;
  369. DiagnosticHigh = (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->ParityDiagnosticHigh.Long;
  370. #endif
  371. FailedAddress = (ULONG)((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->MemoryFailedAddress.Long;
  372. #else //_R98_
  373. ULONG AllError;
  374. DiagnosticLow =READ_REGISTER_ULONG(&( PMC_CONTROL2 )->EADRL.Long);
  375. DiagnosticHigh =READ_REGISTER_ULONG(&( PMC_CONTROL2 )->EADRH.Long);
  376. AllError =READ_REGISTER_ULONG(&( PMC_CONTROL1 )->AERR.Long); //K003
  377. #endif
  378. KeBugCheckEx(ExceptionRecord->ExceptionCode & 0xffff,
  379. (ULONG)VirtualAddress,
  380. #if defined(_R98_) //K003
  381. AllError,
  382. #else
  383. FailedAddress,
  384. #endif
  385. DiagnosticLow,
  386. DiagnosticHigh);
  387. return FALSE;
  388. }
  389. //K002 ^^^^
  390. VOID
  391. HalInitializeProcessor (
  392. IN ULONG Number
  393. )
  394. /*++
  395. Routine Description:
  396. This function is called early in the initialization of the kernel
  397. to perform platform dependent initialization for each processor
  398. before the HAL Is fully functional.
  399. N.B. When this routine is called, the PCR is present but is not
  400. fully initialized.
  401. Arguments:
  402. Number - Supplies the number of the processor to initialize.
  403. Return Value:
  404. None.
  405. --*/
  406. {
  407. return;
  408. }
  409. BOOLEAN
  410. HalStartNextProcessor (
  411. IN PLOADER_PARAMETER_BLOCK LoaderBlock,
  412. IN PKPROCESSOR_STATE ProcessorState
  413. )
  414. /*++
  415. Routine Description:
  416. This function is called to start the next processor.
  417. Arguments:
  418. LoaderBlock - Supplies a pointer to the loader parameter block.
  419. ProcessorState - Supplies a pointer to the processor state to be
  420. used to start the processor.
  421. Return Value:
  422. If a processor is successfully started, then a value of TRUE is
  423. returned. Otherwise a value of FALSE is returned. If a value of
  424. TRUE is returned, then the logical processor number is stored
  425. in the processor control block specified by the loader block.
  426. --*/
  427. {
  428. PRESTART_BLOCK NextRestartBlock;
  429. ULONG Number;
  430. PKPRCB Prcb;
  431. //
  432. // If the address of the first restart parameter block is NULL, then
  433. // the host system is a uniprocessor system running with old firmware.
  434. // Otherwise, the host system may be a multiprocessor system if more
  435. // than one restart block is present.
  436. //
  437. // N.B. The first restart parameter block must be for the boot master
  438. // and must represent logical processor 0.
  439. //
  440. NextRestartBlock = SYSTEM_BLOCK->RestartBlock;
  441. if (NextRestartBlock == NULL) {
  442. return FALSE;
  443. }
  444. //
  445. // Scan the restart parameter blocks for a processor that is ready,
  446. // but not running. If a processor is found, then fill in the restart
  447. // processor state, set the logical processor number, and set start
  448. // in the boot status.
  449. //
  450. Number = 0;
  451. do {
  452. if ((NextRestartBlock->BootStatus.ProcessorReady != FALSE) &&
  453. (NextRestartBlock->BootStatus.ProcessorStart == FALSE)) {
  454. RtlZeroMemory(&NextRestartBlock->u.Mips, sizeof(MIPS_RESTART_STATE));
  455. NextRestartBlock->u.Mips.IntA0 = ProcessorState->ContextFrame.IntA0;
  456. NextRestartBlock->u.Mips.Fir = ProcessorState->ContextFrame.Fir;
  457. Prcb = (PKPRCB)(LoaderBlock->Prcb);
  458. Prcb->Number = (CCHAR)Number;
  459. Prcb->RestartBlock = NextRestartBlock;
  460. NextRestartBlock->BootStatus.ProcessorStart = 1;
  461. return TRUE;
  462. }
  463. Number += 1;
  464. NextRestartBlock = NextRestartBlock->NextRestartBlock;
  465. } while (NextRestartBlock != NULL);
  466. return FALSE;
  467. }
  468. VOID
  469. HalpVerifyPrcbVersion(
  470. VOID
  471. )
  472. /*++
  473. Routine Description:
  474. This function ?
  475. Arguments:
  476. None.
  477. Return Value:
  478. None.
  479. --*/
  480. {
  481. return;
  482. }