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161 lines
3.5 KiB
161 lines
3.5 KiB
/*
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* |-----------------------------------------------------------|
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* | Copyright (c) 1991 MIPS Computer Systems, Inc. |
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* | All Rights Reserved |
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* |-----------------------------------------------------------|
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* | Restricted Rights Legend |
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* | Use, duplication, or disclosure by the Government is |
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* | subject to restrictions as set forth in |
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* | subparagraph (c)(1)(ii) of the Rights in Technical |
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* | Data and Computer Software Clause of DFARS 52.227-7013. |
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* | MIPS Computer Systems, Inc. |
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* | 950 DeGuigne Drive |
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* | Sunnyvale, CA 94086 |
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* |-----------------------------------------------------------|
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*/
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/* $Header: sinh.s,v 3000.5.1.9 92/01/29 15:51:37 zaineb Exp $ */
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/* Algorithm from Cody and Waite. */
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#include <kxmips.h>
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#include <trans.h>
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#include <fpieee.h>
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#define one 1.0
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#define eps 3.72529029846191406250e-9
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#define p3 -0.78966127417357099479e+0
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#define p2 -0.16375798202630751372e+3
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#define p1 -0.11563521196851768270e+5
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#define p0 -0.35181283430177117881e+6
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#define q2 -0.27773523119650701667e+3
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#define q1 +0.36162723109421836460e+5
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#define q0 -0.21108770058106271242e+7
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#define expmax 709.78271289338397
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#define sinhmax 710.47586007394386
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#define half 0.5
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.text
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.globl sinh
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.ent sinh
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sinh:
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#define FSIZE 16
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subu sp, FSIZE
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sw ra, FSIZE-4(sp)
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.frame sp, FSIZE, ra
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.mask 0x80000000, -4
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.prologue 1
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li.d $f8, one
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abs.d $f0, $f12
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c.ole.d $f0, $f8
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li.d $f8, eps
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bc1f sinh2
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c.lt.d $f0, $f8
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bc1t sinh1
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mul.d $f2, $f0, $f0
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li.d $f10, p3
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li.d $f8, q2
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mul.d $f4, $f2, $f10
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add.d $f6, $f2, $f8
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li.d $f10, p2
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mul.d $f6, $f2
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add.d $f4, $f10
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li.d $f8, q1
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mul.d $f4, $f2
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add.d $f6, $f8
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li.d $f10, p1
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mul.d $f6, $f2
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add.d $f4, $f10
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li.d $f8, q0
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mul.d $f4, $f2
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li.d $f10, p0
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add.d $f6, $f8
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add.d $f4, $f10
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div.d $f4, $f6
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mul.d $f4, $f2
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mul.d $f4, $f12
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add.d $f0, $f4, $f12
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j ret3
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sinh1:
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mov.d $f0, $f12
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ret3: lw ra, FSIZE-4(sp)
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addu sp, FSIZE
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j ra
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sinh2:
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li.d $f8, expmax
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swc1 $f13, FSIZE-8(sp) // save sign
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c.ole.d $f0, $f8
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bc1f sinh3
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mov.d $f12, $f0
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jal exp
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li.d $f8, half
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div.d $f2, $f8, $f0
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mul.d $f0, $f8
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lw t0, FSIZE-8(sp)
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bltz t0, 1f
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sub.d $f0, $f0, $f2
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j ret1
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1: sub.d $f0, $f2, $f0
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j ret1
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sinh3:
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li.d $f6, sinhmax
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li.d $f8, 0.69316101074218750000
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c.ole.d $f0, $f6
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bc1f error
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sub.d $f12, $f0, $f8
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jal exp
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li.d $f6, 0.13830277879601902638e-4
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mul.d $f2, $f0, $f6
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lw t0, FSIZE-8(sp)
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bltz t0, 2f
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add.d $f0, $f2
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j ret1
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2: add.d $f0, $f2
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neg.d $f0
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j ret1
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error:
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// raise Overflow and return +-Infinity
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jal set_sinh_err
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ret1: lw ra, FSIZE-4(sp)
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addu sp, FSIZE
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j ra
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.end sinh
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#undef FSIZE
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.extern _except1
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.extern _HUGE
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.ent set_sinh_err
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set_sinh_err:
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#define FSIZE 48
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.frame sp, FSIZE, ra
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.mask 0x80000000, -4
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subu sp, FSIZE
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sw ra, FSIZE-4(sp)
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.prologue 1
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li $4, (FP_O | FP_P) // exception mask
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li $5, OP_SINH // operation code (funtion name index)
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mfc1.d $6, $f12 // arg1
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// return +/-INF for overflow
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li.d $f20, 0.0
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li.d $f0, 1.0
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c.lt.d $f12, $f20
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bc1f 1f
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neg.d $f0
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1:
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div.d $f0,$f20
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s.d $f0, 16(sp) // default result
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cfc1 t7, $31 // fp control/status register
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xor t7, t7, 0xf80 // inverse exception enable bits
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sw t7, 24(sp)
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jal _except1
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lw ra, FSIZE-4(sp)
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addu sp, FSIZE
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j ra
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#undef FSIZE
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.end set_sinh_error
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