mirror of https://github.com/lianthony/NT4.0
1005 lines
34 KiB
1005 lines
34 KiB
#ifndef LC_HARN
|
|
#define EBX_AL_BX_AL 1
|
|
#define EBX_AL_EBX_AL 2
|
|
#define DISP_DISPW 3
|
|
#define DISP_DISPD 4
|
|
#define REG_SI 5
|
|
#define REG_DI 6
|
|
#define REG_BX 7
|
|
#define REG_EAX 8
|
|
#define REG_ECX 9
|
|
#define REG_EDX 10
|
|
#define REG_EBX 11
|
|
#define REG_ESI 12
|
|
#define REG_EDI 13
|
|
#define REG_BLDR_ESP 14
|
|
#define REG_DISP_SI_DISPW 15
|
|
#define REG_DISP_DI_DISPW 16
|
|
#define REG_DISP_BP_DISPW 17
|
|
#define REG_DISP_BX_DISPW 18
|
|
#define REG_DISP_EAX_DISPD 19
|
|
#define REG_DISP_ECX_DISPD 20
|
|
#define REG_DISP_EDX_DISPD 21
|
|
#define REG_DISP_EBX_DISPD 22
|
|
#define REG_DISP_BLDR_ESP_DISPD 23
|
|
#define REG_DISP_EBP_DISPD 24
|
|
#define REG_DISP_ESI_DISPD 25
|
|
#define REG_DISP_EDI_DISPD 26
|
|
#define REG_REG_BX_SI 27
|
|
#define REG_REG_BP_SI 28
|
|
#define REG_REG_BX_DI 29
|
|
#define REG_REG_BP_DI 30
|
|
#define REG_REG_DISP_BX_SI_DISPW 31
|
|
#define REG_REG_DISP_BP_SI_DISPW 32
|
|
#define REG_REG_DISP_BX_DI_DISPW 33
|
|
#define REG_REG_DISP_BP_DI_DISPW 34
|
|
#define BASE_SI_EAX_EAX_CONST_1 35
|
|
#define BASE_SI_ECX_EAX_CONST_1 36
|
|
#define BASE_SI_EDX_EAX_CONST_1 37
|
|
#define BASE_SI_EBX_EAX_CONST_1 38
|
|
#define BASE_SI_BLDR_ESP_EAX_CONST_1 39
|
|
#define BASE_SI_DISPD_EAX_CONST_1 40
|
|
#define BASE_SI_ESI_EAX_CONST_1 41
|
|
#define BASE_SI_EDI_EAX_CONST_1 42
|
|
#define BASE_SI_EAX_ECX_CONST_1 43
|
|
#define BASE_SI_ECX_ECX_CONST_1 44
|
|
#define BASE_SI_EDX_ECX_CONST_1 45
|
|
#define BASE_SI_EBX_ECX_CONST_1 46
|
|
#define BASE_SI_BLDR_ESP_ECX_CONST_1 47
|
|
#define BASE_SI_DISPD_ECX_CONST_1 48
|
|
#define BASE_SI_ESI_ECX_CONST_1 49
|
|
#define BASE_SI_EDI_ECX_CONST_1 50
|
|
#define BASE_SI_EAX_EDX_CONST_1 51
|
|
#define BASE_SI_ECX_EDX_CONST_1 52
|
|
#define BASE_SI_EDX_EDX_CONST_1 53
|
|
#define BASE_SI_EBX_EDX_CONST_1 54
|
|
#define BASE_SI_BLDR_ESP_EDX_CONST_1 55
|
|
#define BASE_SI_DISPD_EDX_CONST_1 56
|
|
#define BASE_SI_ESI_EDX_CONST_1 57
|
|
#define BASE_SI_EDI_EDX_CONST_1 58
|
|
#define BASE_SI_EAX_EBX_CONST_1 59
|
|
#define BASE_SI_ECX_EBX_CONST_1 60
|
|
#define BASE_SI_EDX_EBX_CONST_1 61
|
|
#define BASE_SI_EBX_EBX_CONST_1 62
|
|
#define BASE_SI_BLDR_ESP_EBX_CONST_1 63
|
|
#define BASE_SI_DISPD_EBX_CONST_1 64
|
|
#define BASE_SI_ESI_EBX_CONST_1 65
|
|
#define BASE_SI_EDI_EBX_CONST_1 66
|
|
#define BASE_SI_EAX_UNDEF_CONST_1 67
|
|
#define BASE_SI_ECX_UNDEF_CONST_1 68
|
|
#define BASE_SI_EDX_UNDEF_CONST_1 69
|
|
#define BASE_SI_EBX_UNDEF_CONST_1 70
|
|
#define BASE_SI_BLDR_ESP_UNDEF_CONST_1 71
|
|
#define BASE_SI_DISPD_UNDEF_CONST_1 72
|
|
#define BASE_SI_ESI_UNDEF_CONST_1 73
|
|
#define BASE_SI_EDI_UNDEF_CONST_1 74
|
|
#define BASE_SI_EAX_EBP_CONST_1 75
|
|
#define BASE_SI_ECX_EBP_CONST_1 76
|
|
#define BASE_SI_EDX_EBP_CONST_1 77
|
|
#define BASE_SI_EBX_EBP_CONST_1 78
|
|
#define BASE_SI_BLDR_ESP_EBP_CONST_1 79
|
|
#define BASE_SI_DISPD_EBP_CONST_1 80
|
|
#define BASE_SI_ESI_EBP_CONST_1 81
|
|
#define BASE_SI_EDI_EBP_CONST_1 82
|
|
#define BASE_SI_EAX_ESI_CONST_1 83
|
|
#define BASE_SI_ECX_ESI_CONST_1 84
|
|
#define BASE_SI_EDX_ESI_CONST_1 85
|
|
#define BASE_SI_EBX_ESI_CONST_1 86
|
|
#define BASE_SI_BLDR_ESP_ESI_CONST_1 87
|
|
#define BASE_SI_DISPD_ESI_CONST_1 88
|
|
#define BASE_SI_ESI_ESI_CONST_1 89
|
|
#define BASE_SI_EDI_ESI_CONST_1 90
|
|
#define BASE_SI_EAX_EDI_CONST_1 91
|
|
#define BASE_SI_ECX_EDI_CONST_1 92
|
|
#define BASE_SI_EDX_EDI_CONST_1 93
|
|
#define BASE_SI_EBX_EDI_CONST_1 94
|
|
#define BASE_SI_BLDR_ESP_EDI_CONST_1 95
|
|
#define BASE_SI_DISPD_EDI_CONST_1 96
|
|
#define BASE_SI_ESI_EDI_CONST_1 97
|
|
#define BASE_SI_EDI_EDI_CONST_1 98
|
|
#define BASE_SI_EAX_EAX_CONST_2 99
|
|
#define BASE_SI_ECX_EAX_CONST_2 100
|
|
#define BASE_SI_EDX_EAX_CONST_2 101
|
|
#define BASE_SI_EBX_EAX_CONST_2 102
|
|
#define BASE_SI_BLDR_ESP_EAX_CONST_2 103
|
|
#define BASE_SI_DISPD_EAX_CONST_2 104
|
|
#define BASE_SI_ESI_EAX_CONST_2 105
|
|
#define BASE_SI_EDI_EAX_CONST_2 106
|
|
#define BASE_SI_EAX_ECX_CONST_2 107
|
|
#define BASE_SI_ECX_ECX_CONST_2 108
|
|
#define BASE_SI_EDX_ECX_CONST_2 109
|
|
#define BASE_SI_EBX_ECX_CONST_2 110
|
|
#define BASE_SI_BLDR_ESP_ECX_CONST_2 111
|
|
#define BASE_SI_DISPD_ECX_CONST_2 112
|
|
#define BASE_SI_ESI_ECX_CONST_2 113
|
|
#define BASE_SI_EDI_ECX_CONST_2 114
|
|
#define BASE_SI_EAX_EDX_CONST_2 115
|
|
#define BASE_SI_ECX_EDX_CONST_2 116
|
|
#define BASE_SI_EDX_EDX_CONST_2 117
|
|
#define BASE_SI_EBX_EDX_CONST_2 118
|
|
#define BASE_SI_BLDR_ESP_EDX_CONST_2 119
|
|
#define BASE_SI_DISPD_EDX_CONST_2 120
|
|
#define BASE_SI_ESI_EDX_CONST_2 121
|
|
#define BASE_SI_EDI_EDX_CONST_2 122
|
|
#define BASE_SI_EAX_EBX_CONST_2 123
|
|
#define BASE_SI_ECX_EBX_CONST_2 124
|
|
#define BASE_SI_EDX_EBX_CONST_2 125
|
|
#define BASE_SI_EBX_EBX_CONST_2 126
|
|
#define BASE_SI_BLDR_ESP_EBX_CONST_2 127
|
|
#define BASE_SI_DISPD_EBX_CONST_2 128
|
|
#define BASE_SI_ESI_EBX_CONST_2 129
|
|
#define BASE_SI_EDI_EBX_CONST_2 130
|
|
#define BASE_SI_EAX_UNDEF_CONST_2 131
|
|
#define BASE_SI_ECX_UNDEF_CONST_2 132
|
|
#define BASE_SI_EDX_UNDEF_CONST_2 133
|
|
#define BASE_SI_EBX_UNDEF_CONST_2 134
|
|
#define BASE_SI_BLDR_ESP_UNDEF_CONST_2 135
|
|
#define BASE_SI_DISPD_UNDEF_CONST_2 136
|
|
#define BASE_SI_ESI_UNDEF_CONST_2 137
|
|
#define BASE_SI_EDI_UNDEF_CONST_2 138
|
|
#define BASE_SI_EAX_EBP_CONST_2 139
|
|
#define BASE_SI_ECX_EBP_CONST_2 140
|
|
#define BASE_SI_EDX_EBP_CONST_2 141
|
|
#define BASE_SI_EBX_EBP_CONST_2 142
|
|
#define BASE_SI_BLDR_ESP_EBP_CONST_2 143
|
|
#define BASE_SI_DISPD_EBP_CONST_2 144
|
|
#define BASE_SI_ESI_EBP_CONST_2 145
|
|
#define BASE_SI_EDI_EBP_CONST_2 146
|
|
#define BASE_SI_EAX_ESI_CONST_2 147
|
|
#define BASE_SI_ECX_ESI_CONST_2 148
|
|
#define BASE_SI_EDX_ESI_CONST_2 149
|
|
#define BASE_SI_EBX_ESI_CONST_2 150
|
|
#define BASE_SI_BLDR_ESP_ESI_CONST_2 151
|
|
#define BASE_SI_DISPD_ESI_CONST_2 152
|
|
#define BASE_SI_ESI_ESI_CONST_2 153
|
|
#define BASE_SI_EDI_ESI_CONST_2 154
|
|
#define BASE_SI_EAX_EDI_CONST_2 155
|
|
#define BASE_SI_ECX_EDI_CONST_2 156
|
|
#define BASE_SI_EDX_EDI_CONST_2 157
|
|
#define BASE_SI_EBX_EDI_CONST_2 158
|
|
#define BASE_SI_BLDR_ESP_EDI_CONST_2 159
|
|
#define BASE_SI_DISPD_EDI_CONST_2 160
|
|
#define BASE_SI_ESI_EDI_CONST_2 161
|
|
#define BASE_SI_EDI_EDI_CONST_2 162
|
|
#define BASE_SI_EAX_EAX_CONST_4 163
|
|
#define BASE_SI_ECX_EAX_CONST_4 164
|
|
#define BASE_SI_EDX_EAX_CONST_4 165
|
|
#define BASE_SI_EBX_EAX_CONST_4 166
|
|
#define BASE_SI_BLDR_ESP_EAX_CONST_4 167
|
|
#define BASE_SI_DISPD_EAX_CONST_4 168
|
|
#define BASE_SI_ESI_EAX_CONST_4 169
|
|
#define BASE_SI_EDI_EAX_CONST_4 170
|
|
#define BASE_SI_EAX_ECX_CONST_4 171
|
|
#define BASE_SI_ECX_ECX_CONST_4 172
|
|
#define BASE_SI_EDX_ECX_CONST_4 173
|
|
#define BASE_SI_EBX_ECX_CONST_4 174
|
|
#define BASE_SI_BLDR_ESP_ECX_CONST_4 175
|
|
#define BASE_SI_DISPD_ECX_CONST_4 176
|
|
#define BASE_SI_ESI_ECX_CONST_4 177
|
|
#define BASE_SI_EDI_ECX_CONST_4 178
|
|
#define BASE_SI_EAX_EDX_CONST_4 179
|
|
#define BASE_SI_ECX_EDX_CONST_4 180
|
|
#define BASE_SI_EDX_EDX_CONST_4 181
|
|
#define BASE_SI_EBX_EDX_CONST_4 182
|
|
#define BASE_SI_BLDR_ESP_EDX_CONST_4 183
|
|
#define BASE_SI_DISPD_EDX_CONST_4 184
|
|
#define BASE_SI_ESI_EDX_CONST_4 185
|
|
#define BASE_SI_EDI_EDX_CONST_4 186
|
|
#define BASE_SI_EAX_EBX_CONST_4 187
|
|
#define BASE_SI_ECX_EBX_CONST_4 188
|
|
#define BASE_SI_EDX_EBX_CONST_4 189
|
|
#define BASE_SI_EBX_EBX_CONST_4 190
|
|
#define BASE_SI_BLDR_ESP_EBX_CONST_4 191
|
|
#define BASE_SI_DISPD_EBX_CONST_4 192
|
|
#define BASE_SI_ESI_EBX_CONST_4 193
|
|
#define BASE_SI_EDI_EBX_CONST_4 194
|
|
#define BASE_SI_EAX_UNDEF_CONST_4 195
|
|
#define BASE_SI_ECX_UNDEF_CONST_4 196
|
|
#define BASE_SI_EDX_UNDEF_CONST_4 197
|
|
#define BASE_SI_EBX_UNDEF_CONST_4 198
|
|
#define BASE_SI_BLDR_ESP_UNDEF_CONST_4 199
|
|
#define BASE_SI_DISPD_UNDEF_CONST_4 200
|
|
#define BASE_SI_ESI_UNDEF_CONST_4 201
|
|
#define BASE_SI_EDI_UNDEF_CONST_4 202
|
|
#define BASE_SI_EAX_EBP_CONST_4 203
|
|
#define BASE_SI_ECX_EBP_CONST_4 204
|
|
#define BASE_SI_EDX_EBP_CONST_4 205
|
|
#define BASE_SI_EBX_EBP_CONST_4 206
|
|
#define BASE_SI_BLDR_ESP_EBP_CONST_4 207
|
|
#define BASE_SI_DISPD_EBP_CONST_4 208
|
|
#define BASE_SI_ESI_EBP_CONST_4 209
|
|
#define BASE_SI_EDI_EBP_CONST_4 210
|
|
#define BASE_SI_EAX_ESI_CONST_4 211
|
|
#define BASE_SI_ECX_ESI_CONST_4 212
|
|
#define BASE_SI_EDX_ESI_CONST_4 213
|
|
#define BASE_SI_EBX_ESI_CONST_4 214
|
|
#define BASE_SI_BLDR_ESP_ESI_CONST_4 215
|
|
#define BASE_SI_DISPD_ESI_CONST_4 216
|
|
#define BASE_SI_ESI_ESI_CONST_4 217
|
|
#define BASE_SI_EDI_ESI_CONST_4 218
|
|
#define BASE_SI_EAX_EDI_CONST_4 219
|
|
#define BASE_SI_ECX_EDI_CONST_4 220
|
|
#define BASE_SI_EDX_EDI_CONST_4 221
|
|
#define BASE_SI_EBX_EDI_CONST_4 222
|
|
#define BASE_SI_BLDR_ESP_EDI_CONST_4 223
|
|
#define BASE_SI_DISPD_EDI_CONST_4 224
|
|
#define BASE_SI_ESI_EDI_CONST_4 225
|
|
#define BASE_SI_EDI_EDI_CONST_4 226
|
|
#define BASE_SI_EAX_EAX_CONST_8 227
|
|
#define BASE_SI_ECX_EAX_CONST_8 228
|
|
#define BASE_SI_EDX_EAX_CONST_8 229
|
|
#define BASE_SI_EBX_EAX_CONST_8 230
|
|
#define BASE_SI_BLDR_ESP_EAX_CONST_8 231
|
|
#define BASE_SI_DISPD_EAX_CONST_8 232
|
|
#define BASE_SI_ESI_EAX_CONST_8 233
|
|
#define BASE_SI_EDI_EAX_CONST_8 234
|
|
#define BASE_SI_EAX_ECX_CONST_8 235
|
|
#define BASE_SI_ECX_ECX_CONST_8 236
|
|
#define BASE_SI_EDX_ECX_CONST_8 237
|
|
#define BASE_SI_EBX_ECX_CONST_8 238
|
|
#define BASE_SI_BLDR_ESP_ECX_CONST_8 239
|
|
#define BASE_SI_DISPD_ECX_CONST_8 240
|
|
#define BASE_SI_ESI_ECX_CONST_8 241
|
|
#define BASE_SI_EDI_ECX_CONST_8 242
|
|
#define BASE_SI_EAX_EDX_CONST_8 243
|
|
#define BASE_SI_ECX_EDX_CONST_8 244
|
|
#define BASE_SI_EDX_EDX_CONST_8 245
|
|
#define BASE_SI_EBX_EDX_CONST_8 246
|
|
#define BASE_SI_BLDR_ESP_EDX_CONST_8 247
|
|
#define BASE_SI_DISPD_EDX_CONST_8 248
|
|
#define BASE_SI_ESI_EDX_CONST_8 249
|
|
#define BASE_SI_EDI_EDX_CONST_8 250
|
|
#define BASE_SI_EAX_EBX_CONST_8 251
|
|
#define BASE_SI_ECX_EBX_CONST_8 252
|
|
#define BASE_SI_EDX_EBX_CONST_8 253
|
|
#define BASE_SI_EBX_EBX_CONST_8 254
|
|
#define BASE_SI_BLDR_ESP_EBX_CONST_8 255
|
|
#define BASE_SI_DISPD_EBX_CONST_8 256
|
|
#define BASE_SI_ESI_EBX_CONST_8 257
|
|
#define BASE_SI_EDI_EBX_CONST_8 258
|
|
#define BASE_SI_EAX_UNDEF_CONST_8 259
|
|
#define BASE_SI_ECX_UNDEF_CONST_8 260
|
|
#define BASE_SI_EDX_UNDEF_CONST_8 261
|
|
#define BASE_SI_EBX_UNDEF_CONST_8 262
|
|
#define BASE_SI_BLDR_ESP_UNDEF_CONST_8 263
|
|
#define BASE_SI_DISPD_UNDEF_CONST_8 264
|
|
#define BASE_SI_ESI_UNDEF_CONST_8 265
|
|
#define BASE_SI_EDI_UNDEF_CONST_8 266
|
|
#define BASE_SI_EAX_EBP_CONST_8 267
|
|
#define BASE_SI_ECX_EBP_CONST_8 268
|
|
#define BASE_SI_EDX_EBP_CONST_8 269
|
|
#define BASE_SI_EBX_EBP_CONST_8 270
|
|
#define BASE_SI_BLDR_ESP_EBP_CONST_8 271
|
|
#define BASE_SI_DISPD_EBP_CONST_8 272
|
|
#define BASE_SI_ESI_EBP_CONST_8 273
|
|
#define BASE_SI_EDI_EBP_CONST_8 274
|
|
#define BASE_SI_EAX_ESI_CONST_8 275
|
|
#define BASE_SI_ECX_ESI_CONST_8 276
|
|
#define BASE_SI_EDX_ESI_CONST_8 277
|
|
#define BASE_SI_EBX_ESI_CONST_8 278
|
|
#define BASE_SI_BLDR_ESP_ESI_CONST_8 279
|
|
#define BASE_SI_DISPD_ESI_CONST_8 280
|
|
#define BASE_SI_ESI_ESI_CONST_8 281
|
|
#define BASE_SI_EDI_ESI_CONST_8 282
|
|
#define BASE_SI_EAX_EDI_CONST_8 283
|
|
#define BASE_SI_ECX_EDI_CONST_8 284
|
|
#define BASE_SI_EDX_EDI_CONST_8 285
|
|
#define BASE_SI_EBX_EDI_CONST_8 286
|
|
#define BASE_SI_BLDR_ESP_EDI_CONST_8 287
|
|
#define BASE_SI_DISPD_EDI_CONST_8 288
|
|
#define BASE_SI_ESI_EDI_CONST_8 289
|
|
#define BASE_SI_EDI_EDI_CONST_8 290
|
|
#define BASE_SI_DISP_EAX_EAX_DISPD_CONST_1 291
|
|
#define BASE_SI_DISP_ECX_EAX_DISPD_CONST_1 292
|
|
#define BASE_SI_DISP_EDX_EAX_DISPD_CONST_1 293
|
|
#define BASE_SI_DISP_EBX_EAX_DISPD_CONST_1 294
|
|
#define BASE_SI_DISP_BLDR_ESP_EAX_DISPD_CONST_1 295
|
|
#define BASE_SI_DISP_EBP_EAX_DISPD_CONST_1 296
|
|
#define BASE_SI_DISP_ESI_EAX_DISPD_CONST_1 297
|
|
#define BASE_SI_DISP_EDI_EAX_DISPD_CONST_1 298
|
|
#define BASE_SI_DISP_EAX_ECX_DISPD_CONST_1 299
|
|
#define BASE_SI_DISP_ECX_ECX_DISPD_CONST_1 300
|
|
#define BASE_SI_DISP_EDX_ECX_DISPD_CONST_1 301
|
|
#define BASE_SI_DISP_EBX_ECX_DISPD_CONST_1 302
|
|
#define BASE_SI_DISP_BLDR_ESP_ECX_DISPD_CONST_1 303
|
|
#define BASE_SI_DISP_EBP_ECX_DISPD_CONST_1 304
|
|
#define BASE_SI_DISP_ESI_ECX_DISPD_CONST_1 305
|
|
#define BASE_SI_DISP_EDI_ECX_DISPD_CONST_1 306
|
|
#define BASE_SI_DISP_EAX_EDX_DISPD_CONST_1 307
|
|
#define BASE_SI_DISP_ECX_EDX_DISPD_CONST_1 308
|
|
#define BASE_SI_DISP_EDX_EDX_DISPD_CONST_1 309
|
|
#define BASE_SI_DISP_EBX_EDX_DISPD_CONST_1 310
|
|
#define BASE_SI_DISP_BLDR_ESP_EDX_DISPD_CONST_1 311
|
|
#define BASE_SI_DISP_EBP_EDX_DISPD_CONST_1 312
|
|
#define BASE_SI_DISP_ESI_EDX_DISPD_CONST_1 313
|
|
#define BASE_SI_DISP_EDI_EDX_DISPD_CONST_1 314
|
|
#define BASE_SI_DISP_EAX_EBX_DISPD_CONST_1 315
|
|
#define BASE_SI_DISP_ECX_EBX_DISPD_CONST_1 316
|
|
#define BASE_SI_DISP_EDX_EBX_DISPD_CONST_1 317
|
|
#define BASE_SI_DISP_EBX_EBX_DISPD_CONST_1 318
|
|
#define BASE_SI_DISP_BLDR_ESP_EBX_DISPD_CONST_1 319
|
|
#define BASE_SI_DISP_EBP_EBX_DISPD_CONST_1 320
|
|
#define BASE_SI_DISP_ESI_EBX_DISPD_CONST_1 321
|
|
#define BASE_SI_DISP_EDI_EBX_DISPD_CONST_1 322
|
|
#define BASE_SI_DISP_EAX_UNDEF_DISPD_CONST_1 323
|
|
#define BASE_SI_DISP_ECX_UNDEF_DISPD_CONST_1 324
|
|
#define BASE_SI_DISP_EDX_UNDEF_DISPD_CONST_1 325
|
|
#define BASE_SI_DISP_EBX_UNDEF_DISPD_CONST_1 326
|
|
#define BASE_SI_DISP_BLDR_ESP_UNDEF_DISPD_CONST_1 327
|
|
#define BASE_SI_DISP_EBP_UNDEF_DISPD_CONST_1 328
|
|
#define BASE_SI_DISP_ESI_UNDEF_DISPD_CONST_1 329
|
|
#define BASE_SI_DISP_EDI_UNDEF_DISPD_CONST_1 330
|
|
#define BASE_SI_DISP_EAX_EBP_DISPD_CONST_1 331
|
|
#define BASE_SI_DISP_ECX_EBP_DISPD_CONST_1 332
|
|
#define BASE_SI_DISP_EDX_EBP_DISPD_CONST_1 333
|
|
#define BASE_SI_DISP_EBX_EBP_DISPD_CONST_1 334
|
|
#define BASE_SI_DISP_BLDR_ESP_EBP_DISPD_CONST_1 335
|
|
#define BASE_SI_DISP_EBP_EBP_DISPD_CONST_1 336
|
|
#define BASE_SI_DISP_ESI_EBP_DISPD_CONST_1 337
|
|
#define BASE_SI_DISP_EDI_EBP_DISPD_CONST_1 338
|
|
#define BASE_SI_DISP_EAX_ESI_DISPD_CONST_1 339
|
|
#define BASE_SI_DISP_ECX_ESI_DISPD_CONST_1 340
|
|
#define BASE_SI_DISP_EDX_ESI_DISPD_CONST_1 341
|
|
#define BASE_SI_DISP_EBX_ESI_DISPD_CONST_1 342
|
|
#define BASE_SI_DISP_BLDR_ESP_ESI_DISPD_CONST_1 343
|
|
#define BASE_SI_DISP_EBP_ESI_DISPD_CONST_1 344
|
|
#define BASE_SI_DISP_ESI_ESI_DISPD_CONST_1 345
|
|
#define BASE_SI_DISP_EDI_ESI_DISPD_CONST_1 346
|
|
#define BASE_SI_DISP_EAX_EDI_DISPD_CONST_1 347
|
|
#define BASE_SI_DISP_ECX_EDI_DISPD_CONST_1 348
|
|
#define BASE_SI_DISP_EDX_EDI_DISPD_CONST_1 349
|
|
#define BASE_SI_DISP_EBX_EDI_DISPD_CONST_1 350
|
|
#define BASE_SI_DISP_BLDR_ESP_EDI_DISPD_CONST_1 351
|
|
#define BASE_SI_DISP_EBP_EDI_DISPD_CONST_1 352
|
|
#define BASE_SI_DISP_ESI_EDI_DISPD_CONST_1 353
|
|
#define BASE_SI_DISP_EDI_EDI_DISPD_CONST_1 354
|
|
#define BASE_SI_DISP_EAX_EAX_DISPD_CONST_2 355
|
|
#define BASE_SI_DISP_ECX_EAX_DISPD_CONST_2 356
|
|
#define BASE_SI_DISP_EDX_EAX_DISPD_CONST_2 357
|
|
#define BASE_SI_DISP_EBX_EAX_DISPD_CONST_2 358
|
|
#define BASE_SI_DISP_BLDR_ESP_EAX_DISPD_CONST_2 359
|
|
#define BASE_SI_DISP_EBP_EAX_DISPD_CONST_2 360
|
|
#define BASE_SI_DISP_ESI_EAX_DISPD_CONST_2 361
|
|
#define BASE_SI_DISP_EDI_EAX_DISPD_CONST_2 362
|
|
#define BASE_SI_DISP_EAX_ECX_DISPD_CONST_2 363
|
|
#define BASE_SI_DISP_ECX_ECX_DISPD_CONST_2 364
|
|
#define BASE_SI_DISP_EDX_ECX_DISPD_CONST_2 365
|
|
#define BASE_SI_DISP_EBX_ECX_DISPD_CONST_2 366
|
|
#define BASE_SI_DISP_BLDR_ESP_ECX_DISPD_CONST_2 367
|
|
#define BASE_SI_DISP_EBP_ECX_DISPD_CONST_2 368
|
|
#define BASE_SI_DISP_ESI_ECX_DISPD_CONST_2 369
|
|
#define BASE_SI_DISP_EDI_ECX_DISPD_CONST_2 370
|
|
#define BASE_SI_DISP_EAX_EDX_DISPD_CONST_2 371
|
|
#define BASE_SI_DISP_ECX_EDX_DISPD_CONST_2 372
|
|
#define BASE_SI_DISP_EDX_EDX_DISPD_CONST_2 373
|
|
#define BASE_SI_DISP_EBX_EDX_DISPD_CONST_2 374
|
|
#define BASE_SI_DISP_BLDR_ESP_EDX_DISPD_CONST_2 375
|
|
#define BASE_SI_DISP_EBP_EDX_DISPD_CONST_2 376
|
|
#define BASE_SI_DISP_ESI_EDX_DISPD_CONST_2 377
|
|
#define BASE_SI_DISP_EDI_EDX_DISPD_CONST_2 378
|
|
#define BASE_SI_DISP_EAX_EBX_DISPD_CONST_2 379
|
|
#define BASE_SI_DISP_ECX_EBX_DISPD_CONST_2 380
|
|
#define BASE_SI_DISP_EDX_EBX_DISPD_CONST_2 381
|
|
#define BASE_SI_DISP_EBX_EBX_DISPD_CONST_2 382
|
|
#define BASE_SI_DISP_BLDR_ESP_EBX_DISPD_CONST_2 383
|
|
#define BASE_SI_DISP_EBP_EBX_DISPD_CONST_2 384
|
|
#define BASE_SI_DISP_ESI_EBX_DISPD_CONST_2 385
|
|
#define BASE_SI_DISP_EDI_EBX_DISPD_CONST_2 386
|
|
#define BASE_SI_DISP_EAX_UNDEF_DISPD_CONST_2 387
|
|
#define BASE_SI_DISP_ECX_UNDEF_DISPD_CONST_2 388
|
|
#define BASE_SI_DISP_EDX_UNDEF_DISPD_CONST_2 389
|
|
#define BASE_SI_DISP_EBX_UNDEF_DISPD_CONST_2 390
|
|
#define BASE_SI_DISP_BLDR_ESP_UNDEF_DISPD_CONST_2 391
|
|
#define BASE_SI_DISP_EBP_UNDEF_DISPD_CONST_2 392
|
|
#define BASE_SI_DISP_ESI_UNDEF_DISPD_CONST_2 393
|
|
#define BASE_SI_DISP_EDI_UNDEF_DISPD_CONST_2 394
|
|
#define BASE_SI_DISP_EAX_EBP_DISPD_CONST_2 395
|
|
#define BASE_SI_DISP_ECX_EBP_DISPD_CONST_2 396
|
|
#define BASE_SI_DISP_EDX_EBP_DISPD_CONST_2 397
|
|
#define BASE_SI_DISP_EBX_EBP_DISPD_CONST_2 398
|
|
#define BASE_SI_DISP_BLDR_ESP_EBP_DISPD_CONST_2 399
|
|
#define BASE_SI_DISP_EBP_EBP_DISPD_CONST_2 400
|
|
#define BASE_SI_DISP_ESI_EBP_DISPD_CONST_2 401
|
|
#define BASE_SI_DISP_EDI_EBP_DISPD_CONST_2 402
|
|
#define BASE_SI_DISP_EAX_ESI_DISPD_CONST_2 403
|
|
#define BASE_SI_DISP_ECX_ESI_DISPD_CONST_2 404
|
|
#define BASE_SI_DISP_EDX_ESI_DISPD_CONST_2 405
|
|
#define BASE_SI_DISP_EBX_ESI_DISPD_CONST_2 406
|
|
#define BASE_SI_DISP_BLDR_ESP_ESI_DISPD_CONST_2 407
|
|
#define BASE_SI_DISP_EBP_ESI_DISPD_CONST_2 408
|
|
#define BASE_SI_DISP_ESI_ESI_DISPD_CONST_2 409
|
|
#define BASE_SI_DISP_EDI_ESI_DISPD_CONST_2 410
|
|
#define BASE_SI_DISP_EAX_EDI_DISPD_CONST_2 411
|
|
#define BASE_SI_DISP_ECX_EDI_DISPD_CONST_2 412
|
|
#define BASE_SI_DISP_EDX_EDI_DISPD_CONST_2 413
|
|
#define BASE_SI_DISP_EBX_EDI_DISPD_CONST_2 414
|
|
#define BASE_SI_DISP_BLDR_ESP_EDI_DISPD_CONST_2 415
|
|
#define BASE_SI_DISP_EBP_EDI_DISPD_CONST_2 416
|
|
#define BASE_SI_DISP_ESI_EDI_DISPD_CONST_2 417
|
|
#define BASE_SI_DISP_EDI_EDI_DISPD_CONST_2 418
|
|
#define BASE_SI_DISP_EAX_EAX_DISPD_CONST_4 419
|
|
#define BASE_SI_DISP_ECX_EAX_DISPD_CONST_4 420
|
|
#define BASE_SI_DISP_EDX_EAX_DISPD_CONST_4 421
|
|
#define BASE_SI_DISP_EBX_EAX_DISPD_CONST_4 422
|
|
#define BASE_SI_DISP_BLDR_ESP_EAX_DISPD_CONST_4 423
|
|
#define BASE_SI_DISP_EBP_EAX_DISPD_CONST_4 424
|
|
#define BASE_SI_DISP_ESI_EAX_DISPD_CONST_4 425
|
|
#define BASE_SI_DISP_EDI_EAX_DISPD_CONST_4 426
|
|
#define BASE_SI_DISP_EAX_ECX_DISPD_CONST_4 427
|
|
#define BASE_SI_DISP_ECX_ECX_DISPD_CONST_4 428
|
|
#define BASE_SI_DISP_EDX_ECX_DISPD_CONST_4 429
|
|
#define BASE_SI_DISP_EBX_ECX_DISPD_CONST_4 430
|
|
#define BASE_SI_DISP_BLDR_ESP_ECX_DISPD_CONST_4 431
|
|
#define BASE_SI_DISP_EBP_ECX_DISPD_CONST_4 432
|
|
#define BASE_SI_DISP_ESI_ECX_DISPD_CONST_4 433
|
|
#define BASE_SI_DISP_EDI_ECX_DISPD_CONST_4 434
|
|
#define BASE_SI_DISP_EAX_EDX_DISPD_CONST_4 435
|
|
#define BASE_SI_DISP_ECX_EDX_DISPD_CONST_4 436
|
|
#define BASE_SI_DISP_EDX_EDX_DISPD_CONST_4 437
|
|
#define BASE_SI_DISP_EBX_EDX_DISPD_CONST_4 438
|
|
#define BASE_SI_DISP_BLDR_ESP_EDX_DISPD_CONST_4 439
|
|
#define BASE_SI_DISP_EBP_EDX_DISPD_CONST_4 440
|
|
#define BASE_SI_DISP_ESI_EDX_DISPD_CONST_4 441
|
|
#define BASE_SI_DISP_EDI_EDX_DISPD_CONST_4 442
|
|
#define BASE_SI_DISP_EAX_EBX_DISPD_CONST_4 443
|
|
#define BASE_SI_DISP_ECX_EBX_DISPD_CONST_4 444
|
|
#define BASE_SI_DISP_EDX_EBX_DISPD_CONST_4 445
|
|
#define BASE_SI_DISP_EBX_EBX_DISPD_CONST_4 446
|
|
#define BASE_SI_DISP_BLDR_ESP_EBX_DISPD_CONST_4 447
|
|
#define BASE_SI_DISP_EBP_EBX_DISPD_CONST_4 448
|
|
#define BASE_SI_DISP_ESI_EBX_DISPD_CONST_4 449
|
|
#define BASE_SI_DISP_EDI_EBX_DISPD_CONST_4 450
|
|
#define BASE_SI_DISP_EAX_UNDEF_DISPD_CONST_4 451
|
|
#define BASE_SI_DISP_ECX_UNDEF_DISPD_CONST_4 452
|
|
#define BASE_SI_DISP_EDX_UNDEF_DISPD_CONST_4 453
|
|
#define BASE_SI_DISP_EBX_UNDEF_DISPD_CONST_4 454
|
|
#define BASE_SI_DISP_BLDR_ESP_UNDEF_DISPD_CONST_4 455
|
|
#define BASE_SI_DISP_EBP_UNDEF_DISPD_CONST_4 456
|
|
#define BASE_SI_DISP_ESI_UNDEF_DISPD_CONST_4 457
|
|
#define BASE_SI_DISP_EDI_UNDEF_DISPD_CONST_4 458
|
|
#define BASE_SI_DISP_EAX_EBP_DISPD_CONST_4 459
|
|
#define BASE_SI_DISP_ECX_EBP_DISPD_CONST_4 460
|
|
#define BASE_SI_DISP_EDX_EBP_DISPD_CONST_4 461
|
|
#define BASE_SI_DISP_EBX_EBP_DISPD_CONST_4 462
|
|
#define BASE_SI_DISP_BLDR_ESP_EBP_DISPD_CONST_4 463
|
|
#define BASE_SI_DISP_EBP_EBP_DISPD_CONST_4 464
|
|
#define BASE_SI_DISP_ESI_EBP_DISPD_CONST_4 465
|
|
#define BASE_SI_DISP_EDI_EBP_DISPD_CONST_4 466
|
|
#define BASE_SI_DISP_EAX_ESI_DISPD_CONST_4 467
|
|
#define BASE_SI_DISP_ECX_ESI_DISPD_CONST_4 468
|
|
#define BASE_SI_DISP_EDX_ESI_DISPD_CONST_4 469
|
|
#define BASE_SI_DISP_EBX_ESI_DISPD_CONST_4 470
|
|
#define BASE_SI_DISP_BLDR_ESP_ESI_DISPD_CONST_4 471
|
|
#define BASE_SI_DISP_EBP_ESI_DISPD_CONST_4 472
|
|
#define BASE_SI_DISP_ESI_ESI_DISPD_CONST_4 473
|
|
#define BASE_SI_DISP_EDI_ESI_DISPD_CONST_4 474
|
|
#define BASE_SI_DISP_EAX_EDI_DISPD_CONST_4 475
|
|
#define BASE_SI_DISP_ECX_EDI_DISPD_CONST_4 476
|
|
#define BASE_SI_DISP_EDX_EDI_DISPD_CONST_4 477
|
|
#define BASE_SI_DISP_EBX_EDI_DISPD_CONST_4 478
|
|
#define BASE_SI_DISP_BLDR_ESP_EDI_DISPD_CONST_4 479
|
|
#define BASE_SI_DISP_EBP_EDI_DISPD_CONST_4 480
|
|
#define BASE_SI_DISP_ESI_EDI_DISPD_CONST_4 481
|
|
#define BASE_SI_DISP_EDI_EDI_DISPD_CONST_4 482
|
|
#define BASE_SI_DISP_EAX_EAX_DISPD_CONST_8 483
|
|
#define BASE_SI_DISP_ECX_EAX_DISPD_CONST_8 484
|
|
#define BASE_SI_DISP_EDX_EAX_DISPD_CONST_8 485
|
|
#define BASE_SI_DISP_EBX_EAX_DISPD_CONST_8 486
|
|
#define BASE_SI_DISP_BLDR_ESP_EAX_DISPD_CONST_8 487
|
|
#define BASE_SI_DISP_EBP_EAX_DISPD_CONST_8 488
|
|
#define BASE_SI_DISP_ESI_EAX_DISPD_CONST_8 489
|
|
#define BASE_SI_DISP_EDI_EAX_DISPD_CONST_8 490
|
|
#define BASE_SI_DISP_EAX_ECX_DISPD_CONST_8 491
|
|
#define BASE_SI_DISP_ECX_ECX_DISPD_CONST_8 492
|
|
#define BASE_SI_DISP_EDX_ECX_DISPD_CONST_8 493
|
|
#define BASE_SI_DISP_EBX_ECX_DISPD_CONST_8 494
|
|
#define BASE_SI_DISP_BLDR_ESP_ECX_DISPD_CONST_8 495
|
|
#define BASE_SI_DISP_EBP_ECX_DISPD_CONST_8 496
|
|
#define BASE_SI_DISP_ESI_ECX_DISPD_CONST_8 497
|
|
#define BASE_SI_DISP_EDI_ECX_DISPD_CONST_8 498
|
|
#define BASE_SI_DISP_EAX_EDX_DISPD_CONST_8 499
|
|
#define BASE_SI_DISP_ECX_EDX_DISPD_CONST_8 500
|
|
#define BASE_SI_DISP_EDX_EDX_DISPD_CONST_8 501
|
|
#define BASE_SI_DISP_EBX_EDX_DISPD_CONST_8 502
|
|
#define BASE_SI_DISP_BLDR_ESP_EDX_DISPD_CONST_8 503
|
|
#define BASE_SI_DISP_EBP_EDX_DISPD_CONST_8 504
|
|
#define BASE_SI_DISP_ESI_EDX_DISPD_CONST_8 505
|
|
#define BASE_SI_DISP_EDI_EDX_DISPD_CONST_8 506
|
|
#define BASE_SI_DISP_EAX_EBX_DISPD_CONST_8 507
|
|
#define BASE_SI_DISP_ECX_EBX_DISPD_CONST_8 508
|
|
#define BASE_SI_DISP_EDX_EBX_DISPD_CONST_8 509
|
|
#define BASE_SI_DISP_EBX_EBX_DISPD_CONST_8 510
|
|
#define BASE_SI_DISP_BLDR_ESP_EBX_DISPD_CONST_8 511
|
|
#define BASE_SI_DISP_EBP_EBX_DISPD_CONST_8 512
|
|
#define BASE_SI_DISP_ESI_EBX_DISPD_CONST_8 513
|
|
#define BASE_SI_DISP_EDI_EBX_DISPD_CONST_8 514
|
|
#define BASE_SI_DISP_EAX_UNDEF_DISPD_CONST_8 515
|
|
#define BASE_SI_DISP_ECX_UNDEF_DISPD_CONST_8 516
|
|
#define BASE_SI_DISP_EDX_UNDEF_DISPD_CONST_8 517
|
|
#define BASE_SI_DISP_EBX_UNDEF_DISPD_CONST_8 518
|
|
#define BASE_SI_DISP_BLDR_ESP_UNDEF_DISPD_CONST_8 519
|
|
#define BASE_SI_DISP_EBP_UNDEF_DISPD_CONST_8 520
|
|
#define BASE_SI_DISP_ESI_UNDEF_DISPD_CONST_8 521
|
|
#define BASE_SI_DISP_EDI_UNDEF_DISPD_CONST_8 522
|
|
#define BASE_SI_DISP_EAX_EBP_DISPD_CONST_8 523
|
|
#define BASE_SI_DISP_ECX_EBP_DISPD_CONST_8 524
|
|
#define BASE_SI_DISP_EDX_EBP_DISPD_CONST_8 525
|
|
#define BASE_SI_DISP_EBX_EBP_DISPD_CONST_8 526
|
|
#define BASE_SI_DISP_BLDR_ESP_EBP_DISPD_CONST_8 527
|
|
#define BASE_SI_DISP_EBP_EBP_DISPD_CONST_8 528
|
|
#define BASE_SI_DISP_ESI_EBP_DISPD_CONST_8 529
|
|
#define BASE_SI_DISP_EDI_EBP_DISPD_CONST_8 530
|
|
#define BASE_SI_DISP_EAX_ESI_DISPD_CONST_8 531
|
|
#define BASE_SI_DISP_ECX_ESI_DISPD_CONST_8 532
|
|
#define BASE_SI_DISP_EDX_ESI_DISPD_CONST_8 533
|
|
#define BASE_SI_DISP_EBX_ESI_DISPD_CONST_8 534
|
|
#define BASE_SI_DISP_BLDR_ESP_ESI_DISPD_CONST_8 535
|
|
#define BASE_SI_DISP_EBP_ESI_DISPD_CONST_8 536
|
|
#define BASE_SI_DISP_ESI_ESI_DISPD_CONST_8 537
|
|
#define BASE_SI_DISP_EDI_ESI_DISPD_CONST_8 538
|
|
#define BASE_SI_DISP_EAX_EDI_DISPD_CONST_8 539
|
|
#define BASE_SI_DISP_ECX_EDI_DISPD_CONST_8 540
|
|
#define BASE_SI_DISP_EDX_EDI_DISPD_CONST_8 541
|
|
#define BASE_SI_DISP_EBX_EDI_DISPD_CONST_8 542
|
|
#define BASE_SI_DISP_BLDR_ESP_EDI_DISPD_CONST_8 543
|
|
#define BASE_SI_DISP_EBP_EDI_DISPD_CONST_8 544
|
|
#define BASE_SI_DISP_ESI_EDI_DISPD_CONST_8 545
|
|
#define BASE_SI_DISP_EDI_EDI_DISPD_CONST_8 546
|
|
#define OFFS_REG_AX 547
|
|
#define OFFS_REG_CX 548
|
|
#define OFFS_REG_DX 549
|
|
#define OFFS_REG_BX 550
|
|
#define OFFS_REG_BLDR_SP 551
|
|
#define OFFS_REG_BP 552
|
|
#define OFFS_REG_SI 553
|
|
#define OFFS_REG_DI 554
|
|
#define OFFS_REG_EAX 555
|
|
#define OFFS_REG_ECX 556
|
|
#define OFFS_REG_EDX 557
|
|
#define OFFS_REG_EBX 558
|
|
#define OFFS_REG_BLDR_ESP 559
|
|
#define OFFS_REG_EBP 560
|
|
#define OFFS_REG_ESI 561
|
|
#define OFFS_REG_EDI 562
|
|
#define ACCESS_ES_RW_B 563
|
|
#define ACCESS_CS_RW_B 564
|
|
#define ACCESS_SS_RW_B 565
|
|
#define ACCESS_DS_RW_B 566
|
|
#define ACCESS_FS_RW_B 567
|
|
#define ACCESS_GS_RW_B 568
|
|
#define ACCESS_ES_RW_W 569
|
|
#define ACCESS_CS_RW_W 570
|
|
#define ACCESS_SS_RW_W 571
|
|
#define ACCESS_DS_RW_W 572
|
|
#define ACCESS_FS_RW_W 573
|
|
#define ACCESS_GS_RW_W 574
|
|
#define ACCESS_ES_RW_D 575
|
|
#define ACCESS_CS_RW_D 576
|
|
#define ACCESS_SS_RW_D 577
|
|
#define ACCESS_DS_RW_D 578
|
|
#define ACCESS_FS_RW_D 579
|
|
#define ACCESS_GS_RW_D 580
|
|
#define ACCESS_ES_RD_B 581
|
|
#define ACCESS_CS_RD_B 582
|
|
#define ACCESS_SS_RD_B 583
|
|
#define ACCESS_DS_RD_B 584
|
|
#define ACCESS_FS_RD_B 585
|
|
#define ACCESS_GS_RD_B 586
|
|
#define ACCESS_ES_RD_W 587
|
|
#define ACCESS_CS_RD_W 588
|
|
#define ACCESS_SS_RD_W 589
|
|
#define ACCESS_DS_RD_W 590
|
|
#define ACCESS_FS_RD_W 591
|
|
#define ACCESS_GS_RD_W 592
|
|
#define ACCESS_ES_RD_D 593
|
|
#define ACCESS_CS_RD_D 594
|
|
#define ACCESS_SS_RD_D 595
|
|
#define ACCESS_DS_RD_D 596
|
|
#define ACCESS_FS_RD_D 597
|
|
#define ACCESS_GS_RD_D 598
|
|
#define ACCESS_ES_WT_B 599
|
|
#define ACCESS_CS_WT_B 600
|
|
#define ACCESS_SS_WT_B 601
|
|
#define ACCESS_DS_WT_B 602
|
|
#define ACCESS_FS_WT_B 603
|
|
#define ACCESS_GS_WT_B 604
|
|
#define ACCESS_ES_WT_W 605
|
|
#define ACCESS_CS_WT_W 606
|
|
#define ACCESS_SS_WT_W 607
|
|
#define ACCESS_DS_WT_W 608
|
|
#define ACCESS_FS_WT_W 609
|
|
#define ACCESS_GS_WT_W 610
|
|
#define ACCESS_ES_WT_D 611
|
|
#define ACCESS_CS_WT_D 612
|
|
#define ACCESS_SS_WT_D 613
|
|
#define ACCESS_DS_WT_D 614
|
|
#define ACCESS_FS_WT_D 615
|
|
#define ACCESS_GS_WT_D 616
|
|
#define ACCESS_ES_RD_W2 617
|
|
#define ACCESS_CS_RD_W2 618
|
|
#define ACCESS_SS_RD_W2 619
|
|
#define ACCESS_DS_RD_W2 620
|
|
#define ACCESS_FS_RD_W2 621
|
|
#define ACCESS_GS_RD_W2 622
|
|
#define ACCESS_ES_RD_WD 623
|
|
#define ACCESS_CS_RD_WD 624
|
|
#define ACCESS_SS_RD_WD 625
|
|
#define ACCESS_DS_RD_WD 626
|
|
#define ACCESS_FS_RD_WD 627
|
|
#define ACCESS_GS_RD_WD 628
|
|
#define ACCESS_ES_RD_DW 629
|
|
#define ACCESS_CS_RD_DW 630
|
|
#define ACCESS_SS_RD_DW 631
|
|
#define ACCESS_DS_RD_DW 632
|
|
#define ACCESS_FS_RD_DW 633
|
|
#define ACCESS_GS_RD_DW 634
|
|
#define ACCESS_ES_WT_WD 635
|
|
#define ACCESS_CS_WT_WD 636
|
|
#define ACCESS_SS_WT_WD 637
|
|
#define ACCESS_DS_WT_WD 638
|
|
#define ACCESS_FS_WT_WD 639
|
|
#define ACCESS_GS_WT_WD 640
|
|
#define ACCESS_ES_RD_8B 641
|
|
#define ACCESS_CS_RD_8B 642
|
|
#define ACCESS_SS_RD_8B 643
|
|
#define ACCESS_DS_RD_8B 644
|
|
#define ACCESS_FS_RD_8B 645
|
|
#define ACCESS_GS_RD_8B 646
|
|
#define ACCESS_ES_WT_8B 647
|
|
#define ACCESS_CS_WT_8B 648
|
|
#define ACCESS_SS_WT_8B 649
|
|
#define ACCESS_DS_WT_8B 650
|
|
#define ACCESS_FS_WT_8B 651
|
|
#define ACCESS_GS_WT_8B 652
|
|
#define ACCESS_ES_RD_10B 653
|
|
#define ACCESS_CS_RD_10B 654
|
|
#define ACCESS_SS_RD_10B 655
|
|
#define ACCESS_DS_RD_10B 656
|
|
#define ACCESS_FS_RD_10B 657
|
|
#define ACCESS_GS_RD_10B 658
|
|
#define ACCESS_ES_WT_10B 659
|
|
#define ACCESS_CS_WT_10B 660
|
|
#define ACCESS_SS_WT_10B 661
|
|
#define ACCESS_DS_WT_10B 662
|
|
#define ACCESS_FS_WT_10B 663
|
|
#define ACCESS_GS_WT_10B 664
|
|
#define ACCESS_ES_RD_14B 665
|
|
#define ACCESS_CS_RD_14B 666
|
|
#define ACCESS_SS_RD_14B 667
|
|
#define ACCESS_DS_RD_14B 668
|
|
#define ACCESS_FS_RD_14B 669
|
|
#define ACCESS_GS_RD_14B 670
|
|
#define ACCESS_ES_WT_14B 671
|
|
#define ACCESS_CS_WT_14B 672
|
|
#define ACCESS_SS_WT_14B 673
|
|
#define ACCESS_DS_WT_14B 674
|
|
#define ACCESS_FS_WT_14B 675
|
|
#define ACCESS_GS_WT_14B 676
|
|
#define ACCESS_ES_RD_94B 677
|
|
#define ACCESS_CS_RD_94B 678
|
|
#define ACCESS_SS_RD_94B 679
|
|
#define ACCESS_DS_RD_94B 680
|
|
#define ACCESS_FS_RD_94B 681
|
|
#define ACCESS_GS_RD_94B 682
|
|
#define ACCESS_ES_WT_94B 683
|
|
#define ACCESS_CS_WT_94B 684
|
|
#define ACCESS_SS_WT_94B 685
|
|
#define ACCESS_DS_WT_94B 686
|
|
#define ACCESS_FS_WT_94B 687
|
|
#define ACCESS_GS_WT_94B 688
|
|
#define I_CLC 689
|
|
#define I_CLD 690
|
|
#define I_CLI 691
|
|
#define I_CLTS 692
|
|
#define I_CMC 693
|
|
#define I_INVD 694
|
|
#define I_NOP 695
|
|
#define I_STC 696
|
|
#define I_STD 697
|
|
#define I_STI 698
|
|
#define I_WAIT 699
|
|
#define I_WBINVD 700
|
|
#define I_ZBADOP 701
|
|
#define I_RSRVD 702
|
|
#define I_INT1 703
|
|
#define I_INT3 704
|
|
#define I_INT7 705
|
|
#define I_JMPN_IMM 706
|
|
#define I_ZDISPATCH_EIP 707
|
|
#define I_ZPATCH_ME 708
|
|
#define I_ZPAGE_BOUNDARY 709
|
|
#define I_ZPOST_POP 710
|
|
#define I_ZRET_TO_COROUTINE 711
|
|
#define I_ZUNSIM 712
|
|
#define I_F2XM1 713
|
|
#define I_FABS 714
|
|
#define I_FCHS 715
|
|
#define I_FNCLEX 716
|
|
#define I_FCOMPP 717
|
|
#define I_FCOS 718
|
|
#define I_FDECSTP 719
|
|
#define I_FINCSTP 720
|
|
#define I_FNINIT 721
|
|
#define I_FLD1 722
|
|
#define I_FLDL2T 723
|
|
#define I_FLDL2E 724
|
|
#define I_FLDPI 725
|
|
#define I_FLDLG2 726
|
|
#define I_FLDLN2 727
|
|
#define I_FLDZ 728
|
|
#define I_FNOP 729
|
|
#define I_FPATAN 730
|
|
#define I_FPREM 731
|
|
#define I_FPREM1 732
|
|
#define I_FPTAN 733
|
|
#define I_FRNDINT 734
|
|
#define I_FSCALE 735
|
|
#define I_FSIN 736
|
|
#define I_FSINCOS 737
|
|
#define I_FSQRT 738
|
|
#define I_FTST 739
|
|
#define I_FUCOMPP 740
|
|
#define I_FXAM 741
|
|
#define I_FXTRACT 742
|
|
#define I_FYL2X 743
|
|
#define I_FYL2XP1 744
|
|
#define I_FRSRVD 745
|
|
#define I_AAA_Ax_n 746
|
|
#define I_AAS_Ax_n 747
|
|
#define I_SAHF_Ax_n 748
|
|
#define I_LAHF_Ax_n 749
|
|
#define I_AAD_Ax_ib 750
|
|
#define I_AAM_Ax_ib 751
|
|
#define I_ADD_rmV_iV 752
|
|
#define I_ADD_rmV_rmV 779
|
|
#define I_ADC_rmV_iV 1019
|
|
#define I_ADC_rmV_rmV 1046
|
|
#define I_SUB_rmV_iV 1286
|
|
#define I_SUB_rmV_rmV 1313
|
|
#define I_SBB_rmV_iV 1553
|
|
#define I_SBB_rmV_rmV 1580
|
|
#define I_AND_rmV_iV 1820
|
|
#define I_AND_rmV_rmV 1847
|
|
#define I_XOR_rmV_iV 2087
|
|
#define I_XOR_rmV_rmV 2114
|
|
#define I_OR_rmV_iV 2354
|
|
#define I_OR_rmV_rmV 2381
|
|
#define I_CMP_rmV_iV 2621
|
|
#define I_CMP_rmV_rmV 2648
|
|
#define I_ARPL_rmw_rw 2888
|
|
#define I_BOP_ib_n 2960
|
|
#define I_BSF_rv_rmv 2961
|
|
#define I_BSR_rv_rmv 3105
|
|
#define I_BSWAP_rd_n 3249
|
|
#define I_BT_rmv_rv 3257
|
|
#define I_BT_rmv_ib 3401
|
|
#define I_BTC_rmv_rv 3419
|
|
#define I_BTC_rmv_ib 3563
|
|
#define I_BTR_rmv_rv 3581
|
|
#define I_BTR_rmv_ib 3725
|
|
#define I_BTS_rmv_rv 3743
|
|
#define I_BTS_rmv_ib 3887
|
|
#define I_CALLF_IMM_id_ipv 3905
|
|
#define I_CALLF_VIA_mwv_ipv 3907
|
|
#define I_CALLN_VIA_id_ipv 3909
|
|
#define I_CALLN_VIA_rmv_ipv 3911
|
|
#define I_CBW_Ax_Al 3929
|
|
#define I_CWDE_eAx_Ax 3930
|
|
#define I_CWD_Dx_Ax 3931
|
|
#define I_CDQ_eDx_eAx 3932
|
|
#define I_DAA_Al_n 3933
|
|
#define I_DAS_Al_n 3934
|
|
#define I_LALCY_Al_n 3935
|
|
#define I_DEC_rmV_n 3936
|
|
#define I_INC_rmV_n 3963
|
|
#define I_DIV_rmV_n 3990
|
|
#define I_IDIV_rmV_n 4017
|
|
#define I_NEG_rmV_n 4044
|
|
#define I_NOT_rmV_n 4071
|
|
#define I_ENTER_i1v_i2b 4098
|
|
#define I_IMULA_Al_rmb 4100
|
|
#define I_IMULA_rv_rmv 4109
|
|
#define I_IMULI_rv_rmv 4253
|
|
#define I_IMUL2_rv_rmv 4397
|
|
#define I_INP_AxV_ib 4541
|
|
#define I_INP_AxV_Dx 4544
|
|
#define I_INS_V_Dx 4547
|
|
#define I_R_INS_V_Dx 4550
|
|
#define I_INTR_v_ib 4553
|
|
#define I_JO_id_n 4555
|
|
#define I_JNO_id_n 4556
|
|
#define I_JB_id_n 4557
|
|
#define I_JNB_id_n 4558
|
|
#define I_JZ_id_n 4559
|
|
#define I_JNZ_id_n 4560
|
|
#define I_JBE_id_n 4561
|
|
#define I_JNBE_id_n 4562
|
|
#define I_JS_id_n 4563
|
|
#define I_JNS_id_n 4564
|
|
#define I_JP_id_n 4565
|
|
#define I_JNP_id_n 4566
|
|
#define I_JL_id_n 4567
|
|
#define I_JNL_id_n 4568
|
|
#define I_JLE_id_n 4569
|
|
#define I_JNLE_id_n 4570
|
|
#define I_ZADJUST_HSP_id_n 4571
|
|
#define I_ZJC_PROC_id_n 4572
|
|
#define I_ZBPI_id_n 4573
|
|
#define I_JMPN_VIA_rmv_n 4574
|
|
#define I_JMPF_VIA_i1d_i2w 4592
|
|
#define I_JMPF_VIA_mv_m2w 4593
|
|
#define I_LAR_rv_rmw 4595
|
|
#define I_LSL_rv_rmw 4739
|
|
#define I_LDS_rv_mv 4883
|
|
#define I_LES_rv_mv 4899
|
|
#define I_LFS_rv_mv 4915
|
|
#define I_LGS_rv_mv 4931
|
|
#define I_LSS_rv_mv 4947
|
|
#define I_LEA_rv_eao 4963
|
|
#define I_BOUND_rv_eao 4979
|
|
#define I_LGDT_mw_td 4995
|
|
#define I_LIDT_mw_td 4997
|
|
#define I_SGDT_mw_td 4999
|
|
#define I_SIDT_mw_td 5001
|
|
#define I_LLDT_rmw_n 5003
|
|
#define I_LMSW_rmw_n 5012
|
|
#define I_LTR_rmw_n 5021
|
|
#define I_SLDT_rmw_n 5030
|
|
#define I_SMSW_rmw_n 5039
|
|
#define I_STR_rmw_n 5048
|
|
#define I_VERR_rmw_n 5057
|
|
#define I_VERW_rmw_n 5066
|
|
#define I_LOOP_Cxv_id 5075
|
|
#define I_LOOPE_Cxv_id 5077
|
|
#define I_LOOPNE_Cxv_id 5079
|
|
#define I_JCXZ_Cxv_id 5081
|
|
#define I_MOV_rmV_rmV 5083
|
|
#define I_MOV_rmV_iV 5323
|
|
#define I_MOVS_V_n 5350
|
|
#define I_R_MOVS_V_n 5353
|
|
#define I_CMPS_V_n 5356
|
|
#define I_RNE_CMPS_V_n 5359
|
|
#define I_RE_CMPS_V_n 5362
|
|
#define I_LODS_AxV_n 5365
|
|
#define I_R_LODS_AxV_n 5368
|
|
#define I_MOVSX_rv_rmb 5371
|
|
#define I_MOVSX_rd_rmw 5515
|
|
#define I_MOVZX_rv_rmb 5587
|
|
#define I_MOVZX_rd_rmw 5731
|
|
#define I_MUL_AxV_rmV 5803
|
|
#define I_OUTP_ib_AxV 5830
|
|
#define I_OUTP_Dx_AxV 5833
|
|
#define I_OUTS_V_n 5836
|
|
#define I_R_OUTS_V_n 5839
|
|
#define I_POP_rv_n 5842
|
|
#define I_POP_MEM_mv_n 5858
|
|
#define I_POPA_v_n 5860
|
|
#define I_POPF_v_n 5862
|
|
#define I_PUSHA_v_n 5864
|
|
#define I_PUSHF_v_n 5866
|
|
#define I_LEAVE_v_n 5868
|
|
#define I_HLT_v_n 5870
|
|
#define I_INTO_v_n 5872
|
|
#define I_IRET_v_n 5874
|
|
#define I_POP_SR_segr_v 5876
|
|
#define I_PUSH_SR_segr_v 5888
|
|
#define I_PUSH_rmv_n 5900
|
|
#define I_PUSH_iv_n 5918
|
|
#define I_RCL_rmV_one 5920
|
|
#define I_RCL_rmV_Cl 5947
|
|
#define I_RCL_rmV_ib 5974
|
|
#define I_RCR_rmV_one 6001
|
|
#define I_RCR_rmV_Cl 6028
|
|
#define I_RCR_rmV_ib 6055
|
|
#define I_ROL_rmV_one 6082
|
|
#define I_ROL_rmV_Cl 6109
|
|
#define I_ROL_rmV_ib 6136
|
|
#define I_ROR_rmV_one 6163
|
|
#define I_ROR_rmV_Cl 6190
|
|
#define I_ROR_rmV_ib 6217
|
|
#define I_SAR_rmV_one 6244
|
|
#define I_SAR_rmV_Cl 6271
|
|
#define I_SAR_rmV_ib 6298
|
|
#define I_SHL_rmV_one 6325
|
|
#define I_SHL_rmV_Cl 6352
|
|
#define I_SHL_rmV_ib 6379
|
|
#define I_SHR_rmV_one 6406
|
|
#define I_SHR_rmV_Cl 6433
|
|
#define I_SHR_rmV_ib 6460
|
|
#define I_RETN_v_n 6487
|
|
#define I_RETF_v_n 6489
|
|
#define I_RETN_IMM_v_iw 6491
|
|
#define I_RETF_IMM_v_iw 6493
|
|
#define I_ENTER0_v_iw 6495
|
|
#define I_SCAS_AxV_n 6497
|
|
#define I_RE_SCAS_AxV_n 6500
|
|
#define I_RNE_SCAS_AxV_n 6503
|
|
#define I_STOS_AxV_n 6506
|
|
#define I_R_STOS_AxV_n 6509
|
|
#define I_SETO_rmb_n 6512
|
|
#define I_SETNO_rmb_n 6521
|
|
#define I_SETB_rmb_n 6530
|
|
#define I_SETNB_rmb_n 6539
|
|
#define I_SETZ_rmb_n 6548
|
|
#define I_SETNZ_rmb_n 6557
|
|
#define I_SETBE_rmb_n 6566
|
|
#define I_SETNBE_rmb_n 6575
|
|
#define I_SETS_rmb_n 6584
|
|
#define I_SETNS_rmb_n 6593
|
|
#define I_SETP_rmb_n 6602
|
|
#define I_SETNP_rmb_n 6611
|
|
#define I_SETL_rmb_n 6620
|
|
#define I_SETNL_rmb_n 6629
|
|
#define I_SETLE_rmb_n 6638
|
|
#define I_SETNLE_rmb_n 6647
|
|
#define I_SHLD_IMM_rmv_rv 6656
|
|
#define I_SHLD_CL_rmv_rv 6800
|
|
#define I_SHRD_IMM_rmv_rv 6944
|
|
#define I_SHRD_CL_rmv_rv 7088
|
|
#define I_TEST_rmV_iV 7232
|
|
#define I_TEST_rmV_rV 7259
|
|
#define I_CMPXCHG_rmXV_rXV 7475
|
|
#define I_XADD_rmXV_rXV 7691
|
|
#define I_XCHG_rmXV_rXV 7907
|
|
#define I_XLAT_Al_mb 8123
|
|
#define I_INVLPG_Al_mb 8124
|
|
#define I_RD_SEGR_rmv_segr 8125
|
|
#define I_WT_SEGR_segr_rmw 8233
|
|
#define I_RD_CDT_rd_CDTn 8287
|
|
#define I_WT_CDT_CDTn_rd 8479
|
|
#define I_ZRESULT_ZERO_rV_n 8671
|
|
#define I_FADD_st_mri 8695
|
|
#define I_FADD_fr_st 8699
|
|
#define I_FADD_st_fr 8700
|
|
#define I_FDIV_st_mri 8701
|
|
#define I_FDIV_fr_st 8705
|
|
#define I_FDIV_st_fr 8706
|
|
#define I_FDIVR_st_mri 8707
|
|
#define I_FDIVR_fr_st 8711
|
|
#define I_FDIVR_st_fr 8712
|
|
#define I_FMUL_st_mri 8713
|
|
#define I_FMUL_fr_st 8717
|
|
#define I_FMUL_st_fr 8718
|
|
#define I_FSUB_st_mri 8719
|
|
#define I_FSUB_fr_st 8723
|
|
#define I_FSUB_st_fr 8724
|
|
#define I_FSUBR_st_mri 8725
|
|
#define I_FSUBR_fr_st 8729
|
|
#define I_FSUBR_st_fr 8730
|
|
#define I_FADDP_fr_st 8731
|
|
#define I_FDIVP_fr_st 8732
|
|
#define I_FDIVRP_fr_st 8733
|
|
#define I_FMULP_fr_st 8734
|
|
#define I_FSUBP_fr_st 8735
|
|
#define I_FSUBRP_fr_st 8736
|
|
#define I_FUCOM_fr_st 8737
|
|
#define I_FUCOMP_fr_st 8738
|
|
#define I_FBLD_m10_n 8739
|
|
#define I_FBSTP_m10_n 8740
|
|
#define I_FCOM_st_mri 8741
|
|
#define I_FCOM_st_fr 8745
|
|
#define I_FCOMP_st_mri 8746
|
|
#define I_FCOMP_st_fr 8750
|
|
#define I_FFREE_fr_n 8751
|
|
#define I_FFREEP_fr_n 8752
|
|
#define I_FLD_mRI_n 8753
|
|
#define I_FLD_fr_n 8759
|
|
#define I_FSTP_mRI_n 8760
|
|
#define I_FSTP_fr_n 8766
|
|
#define I_FLDCW_m2_n 8767
|
|
#define I_FNSTCW_m2_n 8768
|
|
#define I_FNSTSW_m2_n 8769
|
|
#define I_FNSTSW_Ax_n 8770
|
|
#define I_FLDENV_m14_n 8771
|
|
#define I_FNSTENV_m14_n 8772
|
|
#define I_FRSTOR_m94_n 8773
|
|
#define I_FNSAVE_m94_n 8774
|
|
#define I_FST_mri_n 8775
|
|
#define I_FST_fr_n 8779
|
|
#define I_FXCH_fr_n 8780
|
|
#define PTI_EFI_BASE 8781
|
|
#define BPI_EFI_BASE 8847
|
|
#define BLDR_CHECKSUM 0x1a46fc
|
|
#define NUM_RELOC_SUBRS 887
|
|
#endif /* LC_HARN */
|
|
#define VCT_SIZE 8948
|