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600 lines
14 KiB
600 lines
14 KiB
/*
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* SoftPC-AT Version 2.0
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*
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* Title : I/O Address Space definitions
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*
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* Description : Definitions for users of the I/O Address Space Module
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*
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* Author : Rod MacGregor (bless his cotton socks)
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*
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* Notes : None
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*/
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/* SccsID[]= @(#)ios.h 1.25 09 Feb 1995 */
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/*
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* ============================================================================
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* Structure/Data definitions
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* ============================================================================
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*/
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/* Size of i/o memory array in half-words */
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#if defined( NTVDM ) || defined ( GISP_SVGA ) || defined ( SFELLOW )
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#define PC_IO_MEM_SIZE 0x10000 /* Must be a power of two! */
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#else
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#define PC_IO_MEM_SIZE 0x400 /* Must be a power of two! */
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#endif
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#ifdef NTVDM
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typedef struct _extioentry {
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io_addr ioaddr;
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char iadapter;
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struct _extioentry *ioextnext;
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} ExtIoEntry, *PExtIoEntry;
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#endif /* NTVDM */
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/*
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* The IO address range for the Monochrome Display Adapter.
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*/
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#define MDA_PORT_START 0x3B0
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#define MDA_PORT_END 0x3BF
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#ifdef HERC
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#define HERC_PORT_START 0x3B0
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#define HERC_PORT_END 0x3BF
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#endif
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/*
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* Memory bounds for the colour graphics adaptor
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*/
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#define CGA_PORT_START 0x3D0
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#define CGA_PORT_END 0x3DF
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/*
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* The individual enhanced adaptor registers
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*/
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#define EGA_SEQ_INDEX 0x3C4
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#define EGA_SEQ_DATA 0x3C5
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#define EGA_CRTC_INDEX 0x3D4
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#define EGA_CRTC_DATA 0x3D5
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#define EGA_GC_INDEX 0x3CE
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#define EGA_GC_DATA 0x3CF
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#define EGA_GC_POS1 0x3CC
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#define EGA_GC_POS2 0x3CA
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#define EGA_AC_INDEX_DATA 0x3C0
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#define EGA_AC_SECRET 0x3C1 /* mentioned in "programmer's guide to pc & ps/2 video systems" p36 tip */
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#define EGA_MISC_REG 0x3C2
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#define EGA_FEAT_REG 0x3DA
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#define EGA_IPSTAT0_REG 0x3C2
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#define EGA_IPSTAT1_REG 0x3DA
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#define VGA_MISC_READ_REG 0x3CC
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#define VGA_FEAT_READ_REG 0x3CA
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/*
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* Extra registers in VGA for controlling the DAC
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*/
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#ifdef VGG
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#define VGA_DAC_MASK 0x3C6
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#define VGA_DAC_RADDR 0x3C7 /* Address for reads */
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#define VGA_DAC_WADDR 0x3C8 /* Address for writes */
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#define VGA_DAC_DATA 0x3C9 /* DAC data */
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#endif
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/*
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* The individual colour adaptor registers
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*/
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#define CGA_INDEX_REG 0x3D4
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#define CGA_DATA_REG 0x3D5
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#define CGA_CONTROL_REG 0x3D8
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#define CGA_COLOUR_REG 0x3D9
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#define CGA_STATUS_REG 0x3DA
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/*
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* Internal colour adaptor registers, accessed via data/index registers
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*/
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#define CGA_R14_CURS_ADDRH 0xE
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#define CGA_R15_CURS_ADDRL 0xF
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/*
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* The diskette IO address range
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*/
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#define DISKETTE_PORT_START 0x3F0
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#define DISKETTE_PORT_END 0x3F7
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/*
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* The supported diskette IO addresses
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*/
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#define DISKETTE_ID_REG 0x3f1
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#define DISKETTE_DOR_REG 0x3F2
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#define DISKETTE_STATUS_REG 0x3F4
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#define DISKETTE_DATA_REG 0x3F5
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#define DISKETTE_FDISK_REG 0x3f6
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#define DISKETTE_DIR_REG 0x3f7
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#define DISKETTE_DCR_REG 0x3f7
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/*
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* The hard disk IO address range
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*/
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#define DISK_PORT_START 0x1F0
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#define DISK_PORT_END 0x1F8
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/* The addresses of the four ports assigned to the HDA. */
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#define HD_PORT_0 0x320
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#define HD_PORT_1 0x321
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#define HD_PORT_2 0x322
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#define HD_PORT_3 0x323
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/*
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* PPI adapter
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*/
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/* On the AT, PPI_GENERAL is like the combination of
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* PPI_GENERAL and PPI_SWITCHES on the XT. All the switch
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* information is in the AT CMOS RAM ports 70-7f
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*/
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#define PPI_PORT_START 0x60
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#define PPI_PORT_END 0x6f
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#define PPI_KEYBOARD 0x60
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#define PPI_GENERAL 0x61
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#define PPI_SWITCHES 0x62
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/*
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* AT Keyboard adapter
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*/
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#define KEYBA_PORT_START 0x60
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#define KEYBA_PORT_END 0x6e
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#define KEYBA_IO_BUFFERS 0x60
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#define KEYBA_STATUS_CMD 0x64
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/*
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* CMOS and Real Time Clock
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*/
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/*
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* These are defined in cmos.h
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*
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#define CMOS_PORT_START 0x70
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#define CMOS_PORT_END 0x7f
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#define CMOS_PORT 0x70
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#define CMOS_DATA 0x71
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*/
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/*
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* Timer adapter
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*/
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#define TIMER_PORT_START 0x40
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#define TIMER_PORT_END 0x5F
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#define TIMER0_REG 0x40
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#define TIMER1_REG 0x41
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#define TIMER2_REG 0x42
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#define TIMER_MODE_REG 0x43
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/*
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* DMA registers
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*/
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/* DMA controller I/0 space ranges */
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#define DMA_PORT_START 0x00
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#define DMA_PORT_END 0x1F
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#define DMA1_PORT_START 0xC0
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#define DMA1_PORT_END 0xDF
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/* DMA controller address registers */
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#define DMA_CH0_ADDRESS 0x00
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#define DMA_CH0_COUNT 0x01
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#define DMA_CH1_ADDRESS 0x02
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#define DMA_CH1_COUNT 0x03
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#define DMA_CH2_ADDRESS 0x04
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#define DMA_CH2_COUNT 0x05
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#define DMA_CH3_ADDRESS 0x06
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#define DMA_CH3_COUNT 0x07
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#define DMA_CH4_ADDRESS 0xC0
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#define DMA_CH4_COUNT 0xC2
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#define DMA_CH5_ADDRESS 0xC4
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#define DMA_CH5_COUNT 0xC6
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#define DMA_CH6_ADDRESS 0xC8
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#define DMA_CH6_COUNT 0xCA
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#define DMA_CH7_ADDRESS 0xCC
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#define DMA_CH7_COUNT 0xCE
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/* DMA controller miscellaneous registers */
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#define DMA_SHARED_REG_A 0x08
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#define DMA_WRITE_REQUEST_REG 0x09
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#define DMA_WRITE_ONE_MASK_BIT 0x0A
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#define DMA_WRITE_MODE_REG 0x0B
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#define DMA_CLEAR_FLIP_FLOP 0x0C
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#define DMA_SHARED_REG_B 0x0D
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#define DMA_CLEAR_MASK 0x0E
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#define DMA_WRITE_ALL_MASK_BITS 0x0F
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#define DMA1_SHARED_REG_A 0xD0
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#define DMA1_WRITE_REQUEST_REG 0xD2
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#define DMA1_WRITE_ONE_MASK_BIT 0xD4
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#define DMA1_WRITE_MODE_REG 0xD6
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#define DMA1_CLEAR_FLIP_FLOP 0xD8
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#define DMA1_SHARED_REG_B 0xDA
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#define DMA1_CLEAR_MASK 0xDC
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#define DMA1_WRITE_ALL_MASK_BITS 0xDE
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/* DMA page register I/O space range */
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#define DMA_PAGE_PORT_START 0x80
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#define DMA_PAGE_PORT_END 0x9F
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/* DMA page registers */
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#define DMA_CH0_PAGE_REG 0x87
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#define DMA_CH1_PAGE_REG 0x83
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#define DMA_FLA_PAGE_REG 0x81
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#define DMA_HDA_PAGE_REG 0x82
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#define DMA_CH5_PAGE_REG 0x8b
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#define DMA_CH6_PAGE_REG 0x89
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#define DMA_CH7_PAGE_REG 0x8a
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#define DMA_REFRESH_PAGE_REG 0x8f
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#define MFG_PORT 0x80
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#define DMA_FAKE1_REG 0x84
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#define DMA_FAKE2_REG 0x85
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#define DMA_FAKE3_REG 0x86
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#define DMA_FAKE4_REG 0x88
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#define DMA_FAKE5_REG 0x8c
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#define DMA_FAKE6_REG 0x8d
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#define DMA_FAKE7_REG 0x8e
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/*
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* Interrupt Control Registers
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*/
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# define ICA0_PORT_START 0x20
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# define ICA0_PORT_END 0x3F
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# define ICA0_PORT_0 0x20
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# define ICA0_PORT_1 0x21
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# define ICA1_PORT_START 0xA0
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# define ICA1_PORT_END 0xBF
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# define ICA1_PORT_0 0xA0
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# define ICA1_PORT_1 0xA1
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/*
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* RS232 Adaptors
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*/
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#define RS232_COM1_PORT_START 0x3F8
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#define RS232_COM1_PORT_END 0x3FF
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#define RS232_COM2_PORT_START 0x2F8
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#define RS232_COM2_PORT_END 0x2FF
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#define RS232_COM3_PORT_START 0x3e8
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#define RS232_COM3_PORT_END 0x3eF
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#define RS232_COM4_PORT_START 0x2e8
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#define RS232_COM4_PORT_END 0x2eF
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#define RS232_PRI_PORT_START 0x3F8
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#define RS232_PRI_PORT_END 0x3FF
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#define RS232_SEC_PORT_START 0x2F8
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#define RS232_SEC_PORT_END 0x2FF
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/*
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* Parallel printer adaptors
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*/
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#ifdef PRINTER
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#define LPT1_PORT_START 0x3bc
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#define LPT1_PORT_END 0x3c0
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#define LPT2_PORT_START 0x378
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#define LPT2_PORT_END 0x37c
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#define LPT3_PORT_START 0x278
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#define LPT3_PORT_END 0x27c
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#define LPT_MASK 0xff0
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#endif /* PRINTER */
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/* SoundBlaster I/O Ports */
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#ifdef SWIN_SNDBLST_NULL
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#define SNDBLST1_PORT_START 0x0220
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#define SNDBLST1_PORT_END 0x022F
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#define SNDBLST2_PORT_START 0x0240
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#define SNDBLST2_PORT_END 0x026F
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#endif
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/*
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* PCI configuration ports.
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*/
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#define PCI_CONFIG_ADDRESS 0xcf8
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#define PCI_CONFIG_DATA 0xcfc
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#ifndef SFELLOW
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/*
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* The following defines a key for each adaptor. This is used as a
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* parameter to the io_connect_port() function.
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*/
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#define EMPTY_ADAPTOR 0
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#define DMA_ADAPTOR 1
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#define ICA0_ADAPTOR 2
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#define TIMER_ADAPTOR 3
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#define PPI_ADAPTOR 4
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#define NMI_ADAPTOR 5
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#define COM2_ADAPTOR 6
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#define HDA_ADAPTOR 7
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#define MDA_ADAPTOR 8
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#define CGA_ADAPTOR 9
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#define FLA_ADAPTOR 10
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#define COM1_ADAPTOR 11
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#define DMA_PAGE_ADAPTOR 12
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#define MOUSE_ADAPTOR 13
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#define EGA_SEQ_ADAP_INDEX 15
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#define EGA_SEQ_ADAP_DATA 16
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#define EGA_GC_ADAP_INDEX 17
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#define EGA_GC_ADAP_DATA 18
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#define EGA_CRTC_ADAPTOR 19
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#define EGA_AC_ADAPTOR 20
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#define EGA_MISC_ADAPTOR 21
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#define EGA_FEAT_ADAPTOR 22
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#define EGA_IPSTAT0_ADAPTOR 23
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#define EGA_IPSTAT1_ADAPTOR 24
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#define ICA1_ADAPTOR 25
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#define AT_KEYB_ADAPTOR 26
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#define CMOS_ADAPTOR 27
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#ifdef HERC
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#define HERC_ADAPTOR 28
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#endif
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#if (NUM_SERIAL_PORTS > 2)
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#define COM3_ADAPTOR 29
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#define COM4_ADAPTOR 30
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#endif
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#ifdef PRINTER
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#define LPT1_ADAPTER 31
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#define LPT2_ADAPTER 32
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#define LPT3_ADAPTER 33
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#endif /* PRINTER */
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#ifdef VGG
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#define VGA_DAC_INDEX_PORT 34
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#define VGA_DAC_DATA_PORT 35
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#endif
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#ifdef NTVDM /* Spare slots for user supplied VDDs */
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#define SPARE_ADAPTER1 36
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#define SPARE_ADAPTER2 37
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#define SPARE_ADAPTER3 38
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#define SPARE_ADAPTER4 39
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#define SPARE_ADAPTER5 40
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#define SPARE_ADAPTER6 41
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#define SPARE_ADAPTER7 42
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#define SPARE_ADAPTER8 43
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#define IO_MAX_NUMBER_ADAPTORS 44 /* make this equal to the highest used plus one please! */
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#define NUMBER_SPARE_ADAPTERS (SPARE_ADAPTER8 - SPARE_ADAPTER1)
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#else /* NTVDM */
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#ifdef GISP_SVGA
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#define GISP_VGA_FUDGE_ADAPTER 36
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#define IO_MAX_NUMBER_ADAPTORS 37
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#else /* GISP_SVGA */
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/* Adapter for SoundBlaster Null Driver */
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#ifdef SWIN_SNDBLST_NULL
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#define SNDBLST_ADAPTER 36
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#endif
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#ifndef IO_MAX_NUMBER_ADAPTORS
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#define IO_MAX_NUMBER_ADAPTORS 37 /* make this equal to the highest used plus one please! */
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#endif
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#endif /* GISP_SVGA */
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#endif /* NTVDM */
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#else /* SFELLOW */
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/*
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* StringFellow doesn't need most of the emulated hardware, as
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* it has the real thing.
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*/
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#define EMPTY_ADAPTOR 0
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#define HW_ADAPTOR_DW 1
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#define HW_ADAPTOR_W 2
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#define HW_ADAPTOR_B 3
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#define KEY64_ADAPTOR 4
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#define KEY60_ADAPTOR 5
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#define DMA_ADAPTOR 6
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#define PPI_ADAPTOR 7
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#define CMOS_ADAPTOR 8
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#define MFG_ADAPTOR 9
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#define PCI_CONFIG_ADDRESS_ADAPTOR 10
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#define PCI_CONFIG_PORT_ADAPTOR 11
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#define PCI_CONFIG_DATA_ADAPTOR0 12
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#define PCI_CONFIG_DATA_ADAPTOR13 13
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#define PCI_CONFIG_DATA_ADAPTOR2 14
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#define PIC_SLAVE_ADAPTOR 15
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#define PIC_MASTER_ADAPTOR 16
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#define SF_EGA_GC_ADAP_INDEX 17
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#define SF_EGA_GC_ADAP_DATA 18
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#define IO_MAX_NUMBER_ADAPTORS 19 /* make this equal to the highest used plus one please! */
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#endif /*SFELLOW */
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/*
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* The Bit masks for specifying Read/Write access when connecting ports
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* to the IO bus.
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*/
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#define IO_READ 1
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#define IO_WRITE 2
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#define IO_READ_WRITE (IO_READ | IO_WRITE)
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/*
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* Values to return if no adaptor is connected to a port
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*/
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#define IO_EMPTY_PORT_BYTE_VALUE 0xFF
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#define IO_EMPTY_PORT_WORD_VALUE 0xFFFF
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/*
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* ============================================================================
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* External declarations and macros
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* ============================================================================
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*/
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IMPORT void inb IPT2(io_addr, io_address, half_word *, value);
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IMPORT void outb IPT2(io_addr, io_address, half_word, value);
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IMPORT void inw IPT2(io_addr, io_address, word *, value);
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IMPORT void outw IPT2(io_addr, io_address, word, value);
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#ifdef SPC386
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IMPORT void ind IPT2(io_addr, io_address, IU32 *, value);
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IMPORT void outd IPT2(io_addr, io_address, IU32, value);
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#endif /* SPC386 */
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IMPORT void io_define_inb
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(
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#ifdef ANSI
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half_word adapter,
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void (*func) IPT2(io_addr, io_address, half_word *, value)
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#endif /* ANSI */
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);
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#ifdef SFELLOW
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IMPORT void io_define_inw
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(
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#ifdef ANSI
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half_word adapter,
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void (*func) IPT2(io_addr, io_address, word *, value)
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#endif /* ANSI */
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);
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IMPORT void io_define_ind
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(
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#ifdef ANSI
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half_word adapter,
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void (*func) IPT2(io_addr, io_address, IU32 *, value)
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#endif /* ANSI */
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);
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#endif /* SFELLOW */
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IMPORT void io_define_in_routines
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(
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#ifdef ANSI
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half_word adapter,
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void (*inb_func) IPT2(io_addr, io_address, half_word *, value),
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void (*inw_func) IPT2(io_addr, io_address, word *, value),
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void (*insb_func) IPT3(io_addr, io_address, half_word *, valarray,
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word, count),
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void (*insw_func) IPT3(io_addr, io_address, word *, valarray,
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word, count)
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#endif /* ANSI */
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);
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IMPORT void io_define_outb
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(
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#ifdef ANSI
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half_word adapter,
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void (*func) IPT2(io_addr, io_address, half_word, value)
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#endif /* ANSI */
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);
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#ifdef SFELLOW
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IMPORT void io_define_outw
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(
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#ifdef ANSI
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half_word adapter,
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void (*func) IPT2(io_addr, io_address, word, value)
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#endif /* ANSI */
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);
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|
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extern void io_define_outd
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|
(
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|
#ifdef ANSI
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|
half_word adapter,
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|
void (*func) IPT2(io_addr, io_address, IU32, value)
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|
#endif /* ANSI */
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|
);
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|
#endif /* SFELLOW */
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|
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IMPORT void io_define_out_routines
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|
(
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|
#ifdef ANSI
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|
half_word adapter,
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|
void (*outb_func) IPT2(io_addr, io_address, half_word, value),
|
|
void (*outw_func) IPT2(io_addr, io_address, word, value),
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|
void (*outsb_func) IPT3(io_addr, io_address, half_word *, valarray,
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|
word, count),
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|
void (*outsw_func) IPT3(io_addr, io_address, word *, valarray,
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|
word, count)
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|
#endif /* ANSI */
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|
);
|
|
|
|
#ifdef NTVDM
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|
IMPORT IBOOL io_connect_port IPT3(io_addr, io_address, half_word, adapter,
|
|
half_word, mode);
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|
#else
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|
IMPORT void io_connect_port IPT3(io_addr, io_address, half_word, adapter,
|
|
half_word, mode);
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|
#endif /* NTVDM */
|
|
|
|
IMPORT void io_disconnect_port IPT2(io_addr, io_address, half_word, adapter);
|
|
IMPORT void io_init IPT0();
|
|
|
|
/* Externs and macros for io_redefine_inb/outb */
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|
#ifdef MAC68K
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|
IMPORT char *Ios_in_adapter_table;
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|
IMPORT char *Ios_out_adapter_table;
|
|
#else
|
|
IMPORT char Ios_in_adapter_table[];
|
|
IMPORT char Ios_out_adapter_table[];
|
|
#endif
|
|
|
|
IMPORT void (*Ios_inb_function [])
|
|
IPT2(io_addr, io_address, half_word *, value);
|
|
IMPORT void (*Ios_inw_function [])
|
|
IPT2(io_addr, io_address, word *, value);
|
|
extern void (*Ios_ind_function [])
|
|
IPT2(io_addr, io_address, IU32 *, value);
|
|
IMPORT void (*Ios_insb_function [])
|
|
IPT3(io_addr, io_address, half_word *, valarray, word, count);
|
|
IMPORT void (*Ios_insw_function [])
|
|
IPT3(io_addr, io_address, word *, valarray, word, count);
|
|
|
|
IMPORT void (*Ios_outb_function [])
|
|
IPT2(io_addr, io_address, half_word, value);
|
|
IMPORT void (*Ios_outw_function [])
|
|
IPT2(io_addr, io_address, word, value);
|
|
extern void (*Ios_outd_function [])
|
|
IPT2(io_addr, io_address, IU32, value);
|
|
IMPORT void (*Ios_outsb_function[])
|
|
IPT3(io_addr, io_address, half_word *, valarray, word, count);
|
|
IMPORT void (*Ios_outsw_function[])
|
|
IPT3(io_addr, io_address, word *, valarray, word, count);
|
|
|
|
/* FAST_FUNC_ADDR() used on the Mac to avoid routing by the jump table every time... */
|
|
#ifndef FAST_FUNC_ADDR
|
|
#define FAST_FUNC_ADDR(func) func
|
|
#endif /* FAST_FUNC_ADDR */
|
|
|
|
#define io_redefine_outb(adaptor,func) Ios_outb_function[adaptor] = FAST_FUNC_ADDR(func)
|
|
#define io_redefine_inb(adaptor,func) Ios_inb_function[adaptor] = FAST_FUNC_ADDR(func)
|