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197 lines
6.2 KiB
197 lines
6.2 KiB
/*****************************************************************************
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*
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* COPYRIGHT 1993 - COLORADO MEMORY SYSTEMS, INC.
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* ALL RIGHTS RESERVED.
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*
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******************************************************************************
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*
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* FILE: \SE\DRIVER\DEVICE\JUMBO\SRC\0X11006.C
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*
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* FUNCTION: cqd_ConfigureFDC
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*
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* PURPOSE: To configure the floppy controller chip according
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* to the current FDC parameters.
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*
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* HISTORY:
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* $Log: J:\se.vcs\driver\q117cd\src\0x11006.c $
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*
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* Rev 1.10.1.0 29 Jan 1996 14:28:40 BOBLEHMA
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* Write precomp was only being turned off for CMS 3010 and 3020 drives.
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* Now all manufacturers drives (3010 and 3020) will have write precomp
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* turned off.
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*
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* Rev 1.10 05 Oct 1995 14:09:56 boblehma
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* Grizzly code merge.
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*
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* Rev 1.9.1.0 28 Jul 1995 15:20:24 TRACYBAI
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* For Grizzly support, added code to disable the FIFO in the Configure
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* command if we are on a Grizzly device.
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*
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* Rev 1.9 30 Jan 1995 14:23:50 BOBLEHMA
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* Added #include "vendor.h"
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*
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* Rev 1.8 17 Oct 1994 11:42:44 BOBLEHMA
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* If the FDC is a 82078, send a drive specification command to it for 2MB mode.
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*
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* Rev 1.7 10 Feb 1994 08:56:42 STEPHENU
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* Initialized the precomp_mask to zero, we were "or-ing" in stack garbage and
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* potentially resetting the FDC on the IO cards.
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*
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* Rev 1.6 02 Feb 1994 11:22:32 CHETDOUG
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* Added turning off of write precomp for buzzard and eagle.
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*
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* Rev 1.5 11 Jan 1994 15:17:22 KEVINKES
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* Cleaned up comments.
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*
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* Rev 1.4 20 Dec 1993 14:47:20 KEVINKES
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* Cleaned up and commented code.
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*
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* Rev 1.3 06 Dec 1993 13:34:32 CHETDOUG
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* Added FC20 fix to fdc config
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*
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* Rev 1.2 11 Nov 1993 15:19:14 KEVINKES
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* Changed calls to cqd_inp and cqd_outp to kdi_ReadPort and kdi_WritePort.
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* Modified the parameters to these calls. Changed FDC commands to be
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* defines.
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*
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* Rev 1.1 08 Nov 1993 14:01:42 KEVINKES
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* Removed all bit-field structures, removed all enumerated types, changed
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* all defines to uppercase, and removed all signed data types wherever
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* possible.
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*
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* Rev 1.0 18 Oct 1993 17:21:32 KEVINKES
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* Initial Revision.
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*
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*****************************************************************************/
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#define FCT_ID 0x11006
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#include "include\public\adi_api.h"
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#include "include\public\frb_api.h"
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#include "include\public\vendor.h"
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#include "include\private\kdi_pub.h"
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#include "include\private\cqd_pub.h"
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#include "q117cd\include\cqd_defs.h"
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#include "q117cd\include\cqd_strc.h"
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#include "q117cd\include\cqd_hdr.h"
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/*endinclude*/
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dStatus cqd_ConfigureFDC
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(
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/* INPUT PARAMETERS: */
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CqdContextPtr cqd_context
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/* UPDATE PARAMETERS: */
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/* OUTPUT PARAMETERS: */
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)
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/* COMMENTS: *****************************************************************
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*
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* DEFINITIONS: *************************************************************/
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{
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/* DATA: ********************************************************************/
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dStatus status; /* dStatus or error condition.*/
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SpecifyCmd specify;
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ConfigCmd config;
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dUByte precomp_mask = 0; /* Mask write precomp in DSR register */
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DriveSpec drive_s;
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/* CODE: ********************************************************************/
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cqd_DCROut(cqd_context, cqd_context->xfer_rate.fdc);
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if (cqd_context->device_descriptor.fdc_type == FDC_82078_64) {
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drive_s.command = DRIVE_SPECIFICATION;
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drive_s.drive_spec = (dUByte)(DRIVE_SPEC |
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((cqd_context->device_cfg.select_byte & DRIVE_ID_MASK) <<
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DRIVE_SELECT_OFFSET));
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drive_s.done = DONE_MARKER;
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status = cqd_ProgramFDC( cqd_context,
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(dUByte *)&drive_s,
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sizeof(drive_s),
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dFALSE );
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}
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if (cqd_context->device_descriptor.fdc_type == FDC_82077 ||
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cqd_context->device_descriptor.fdc_type == FDC_82077AA ||
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cqd_context->device_descriptor.fdc_type == FDC_82078_44 ||
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cqd_context->device_descriptor.fdc_type == FDC_82078_64 ||
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cqd_context->device_descriptor.fdc_type == FDC_NATIONAL) {
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/* if this is a 3010 or 3020 CMS drive, turn off write precomp */
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switch (cqd_context->device_descriptor.drive_class) {
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case QIC3010_DRIVE:
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case QIC3020_DRIVE:
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precomp_mask = FDC_PRECOMP_OFF;
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break;
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default:
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precomp_mask = FDC_PRECOMP_ON;
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}
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/* Select the fdc data rate corresponding to the current xfer rate
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* and enable or disable write precomp. */
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kdi_WritePort(
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cqd_context->kdi_context,
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cqd_context->controller_data.fdc_addr.dsr,
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(dUByte)(cqd_context->xfer_rate.fdc | precomp_mask));
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/* Deselect the tape drive PLL */
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kdi_WritePort(
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cqd_context->kdi_context,
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cqd_context->controller_data.fdc_addr.tdr,
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curu);
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switch (cqd_context->xfer_rate.fdc) {
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case FDC_250Kbps:
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case FDC_500Kbps:
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/* Enable the tape drive PLL */
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kdi_WritePort(
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cqd_context->kdi_context,
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cqd_context->controller_data.fdc_addr.tdr,
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curb);
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break;
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}
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config.cmd = FDC_CMD_CONFIG;
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config.czero = FDC_CONFIG_NULL_BYTE;
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config.config = (dUByte)(FDC_FIFO & FIFO_MASK);
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config.pretrack = FDC_CONFIG_PRETRACK;
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/* enable CLK48 if this is an FC20 with 82078_64 */
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if (kdi_Clock48mhz(cqd_context->kdi_context) &&
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(cqd_context->device_descriptor.fdc_type == FDC_82078_64)) {
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/* set the CLK48 bit */
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config.cmd |= FDC_CLK48;
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}
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/* disable the FIFO if we are on a Grizzly device */
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//if ((kdi_Grizzly(cqd_context->kdi_context)) == dTRUE) {
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// config.config |= FDC_EFIFO;
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//}
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/* issue the configure command to the FDC */
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if ((status = cqd_ProgramFDC(cqd_context,
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(dUByte *)&config,
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sizeof(config),
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dFALSE)) != DONT_PANIC) {
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return status;
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}
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}
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/* Specify the rates for the FDC's three internal timers. */
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/* This includes the head unload time (HUT), the head load */
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/* time (HLT), and the step rate time (SRT) */
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specify.command = FDC_CMD_SPECIFY;
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specify.SRT_HUT = cqd_context->xfer_rate.srt;
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specify.HLT_ND = FDC_HLT;
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status = cqd_ProgramFDC(cqd_context,
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(dUByte *)&specify,
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sizeof(specify),
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dFALSE);
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return status;
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}
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