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724 lines
20 KiB
724 lines
20 KiB
#if defined(JAZZ)
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/*++
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Copyright (c) 1989 Microsoft Corporation
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Module Name:
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jzvxl484.c
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cAbstract:
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This module implements the video prom code for the Jazz VXL BT484
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Author:
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Lluis Abello (lluis) 28-May-1992
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Environment:
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Kernel mode.
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Revision History:
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--*/
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#include "fwp.h"
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#include "jzvxl484.h"
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#include "jxvideo.h"
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#include "jaginit.h"
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#define KeFlushWriteBuffer()
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ARC_STATUS
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InitializeBt484(
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IN PVIDEO_VIRTUAL_SPACE VirtualAdr
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);
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VOID
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FillVideoMemory(
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IN ULONG StartAddress,
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IN ULONG Size,
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IN ULONG Pattern
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);
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ULONG
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CheckVideoMemoryAddressTest(
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IN ULONG StartAddress,
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IN ULONG Size
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);
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VOID
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WriteVideoMemoryAddressTest(
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IN ULONG StartAddress,
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IN ULONG Size
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);
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//
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// Define colors, HI = High Intensity
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//
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#define BT484_PALETTE_BLACK_R 0x00
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#define BT484_PALETTE_BLACK_G 0x00
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#define BT484_PALETTE_BLACK_B 0x00
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#define BT484_PALETTE_RED_R 0xB0
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#define BT484_PALETTE_RED_G 0x00
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#define BT484_PALETTE_RED_B 0x00
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#define BT484_PALETTE_GREEN_R 0x00
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#define BT484_PALETTE_GREEN_B 0xB0
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#define BT484_PALETTE_GREEN_G 0x00
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#define BT484_PALETTE_YELLOW_R 0xB0
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#define BT484_PALETTE_YELLOW_G 0xB0
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#define BT484_PALETTE_YELLOW_B 0x00
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#define BT484_PALETTE_BLUE_R 0x00
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#define BT484_PALETTE_BLUE_G 0x00
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#define BT484_PALETTE_BLUE_B 0xB0
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#define BT484_PALETTE_MAGENTA_R 0xB0
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#define BT484_PALETTE_MAGENTA_G 0x00
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#define BT484_PALETTE_MAGENTA_B 0xB0
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#define BT484_PALETTE_CYAN_R 0x00
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#define BT484_PALETTE_CYAN_G 0xB0
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#define BT484_PALETTE_CYAN_B 0xB0
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#define BT484_PALETTE_WHITE_R 0xB0
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#define BT484_PALETTE_WHITE_G 0xB0
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#define BT484_PALETTE_WHITE_B 0xB0
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#define BT484_PALETTE_HI_BLACK_R 0x00
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#define BT484_PALETTE_HI_BLACK_G 0x00
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#define BT484_PALETTE_HI_BLACK_B 0x00
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#define BT484_PALETTE_HI_RED_R 0xFF
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#define BT484_PALETTE_HI_RED_G 0x00
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#define BT484_PALETTE_HI_RED_B 0x00
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#define BT484_PALETTE_HI_GREEN_R 0x00
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#define BT484_PALETTE_HI_GREEN_G 0xFF
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#define BT484_PALETTE_HI_GREEN_B 0x00
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#define BT484_PALETTE_HI_YELLOW_R 0xFF
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#define BT484_PALETTE_HI_YELLOW_G 0xFF
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#define BT484_PALETTE_HI_YELLOW_B 0x00
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#define BT484_PALETTE_HI_BLUE_R 0x00
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#define BT484_PALETTE_HI_BLUE_G 0x00
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#define BT484_PALETTE_HI_BLUE_B 0xFF
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#define BT484_PALETTE_HI_MAGENTA_R 0xFF
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#define BT484_PALETTE_HI_MAGENTA_G 0x00
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#define BT484_PALETTE_HI_MAGENTA_B 0xFF
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#define BT484_PALETTE_HI_CYAN_R 0x00
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#define BT484_PALETTE_HI_CYAN_G 0xFF
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#define BT484_PALETTE_HI_CYAN_B 0xFF
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#define BT484_PALETTE_HI_WHITE_R 0xFF
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#define BT484_PALETTE_HI_WHITE_G 0xFF
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#define BT484_PALETTE_HI_WHITE_B 0xFF
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UCHAR ColorTable[16*3]={
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BT484_PALETTE_BLACK_R,
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BT484_PALETTE_BLACK_G,
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BT484_PALETTE_BLACK_B,
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BT484_PALETTE_RED_R,
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BT484_PALETTE_RED_G,
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BT484_PALETTE_RED_B,
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BT484_PALETTE_GREEN_R,
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BT484_PALETTE_GREEN_B,
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BT484_PALETTE_GREEN_G,
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BT484_PALETTE_YELLOW_R,
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BT484_PALETTE_YELLOW_G,
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BT484_PALETTE_YELLOW_B,
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BT484_PALETTE_BLUE_R,
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BT484_PALETTE_BLUE_G,
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BT484_PALETTE_BLUE_B,
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BT484_PALETTE_MAGENTA_R,
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BT484_PALETTE_MAGENTA_G,
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BT484_PALETTE_MAGENTA_B,
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BT484_PALETTE_CYAN_R,
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BT484_PALETTE_CYAN_G,
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BT484_PALETTE_CYAN_B,
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BT484_PALETTE_WHITE_R,
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BT484_PALETTE_WHITE_G,
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BT484_PALETTE_WHITE_B,
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BT484_PALETTE_HI_BLACK_R,
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BT484_PALETTE_HI_BLACK_G,
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BT484_PALETTE_HI_BLACK_B,
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BT484_PALETTE_HI_RED_R,
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BT484_PALETTE_HI_RED_G,
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BT484_PALETTE_HI_RED_B,
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BT484_PALETTE_HI_GREEN_R,
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BT484_PALETTE_HI_GREEN_G,
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BT484_PALETTE_HI_GREEN_B,
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BT484_PALETTE_HI_YELLOW_R,
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BT484_PALETTE_HI_YELLOW_G,
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BT484_PALETTE_HI_YELLOW_B,
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BT484_PALETTE_HI_BLUE_R,
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BT484_PALETTE_HI_BLUE_G,
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BT484_PALETTE_HI_BLUE_B,
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BT484_PALETTE_HI_MAGENTA_R,
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BT484_PALETTE_HI_MAGENTA_G,
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BT484_PALETTE_HI_MAGENTA_B,
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BT484_PALETTE_HI_CYAN_R,
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BT484_PALETTE_HI_CYAN_G,
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BT484_PALETTE_HI_CYAN_B,
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BT484_PALETTE_HI_WHITE_R,
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BT484_PALETTE_HI_WHITE_G,
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BT484_PALETTE_HI_WHITE_B
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};
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//
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// Define colors, HI = High Intensity
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//
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#define FW_COLOR_BLACK 0x00
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#define FW_COLOR_RED 0x01
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#define FW_COLOR_GREEN 0x02
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#define FW_COLOR_YELLOW 0x03
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#define FW_COLOR_BLUE 0x04
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#define FW_COLOR_MAGENTA 0x05
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#define FW_COLOR_CYAN 0x06
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#define FW_COLOR_WHITE 0x07
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#define FW_COLOR_HI_BLACK 0x08
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#define FW_COLOR_HI_RED 0x09
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#define FW_COLOR_HI_GREEN 0x0A
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#define FW_COLOR_HI_YELLOW 0x0B
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#define FW_COLOR_HI_BLUE 0x0C
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#define FW_COLOR_HI_MAGENTA 0x0D
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#define FW_COLOR_HI_CYAN 0x0E
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#define FW_COLOR_HI_WHITE 0x0F
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ARC_STATUS
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InitializeVXL (
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IN PVIDEO_VIRTUAL_SPACE VirtualAdr,
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IN PMONITOR_CONFIGURATION_DATA Monitor
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)
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/*++
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Routine Description:
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This routine initializes the JazzVxl Graphics accelerator.
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Arguments:
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Monitor - Monitor configuration data.
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VirtualAdr - Pointer to a pair of virtual addresses for video&Control spaces.
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Return Value:
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If the video was initialized, ESUCCESS is returned, otherwise an error
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code is returned.
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--*/
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{
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ULONG Index;
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PJAGUAR_REGISTERS Jaguar = (PJAGUAR_REGISTERS)(VirtualAdr->ControlVirtualBase + VXL_JAGUAR_BASE_OFFSET);
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PBT484_REGISTERS Bt484 = (PBT484_REGISTERS)(VirtualAdr->ControlVirtualBase + VXL_BT484_BASE_OFFSET);
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PUCHAR Clock = (PUCHAR)(VirtualAdr->ControlVirtualBase + VXL_CLOCK_BASE_OFFSET);
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UCHAR DataChar;
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UCHAR CmdReg0;
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ULONG VideoMemory = VirtualAdr->MemoryVirtualBase;
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JAGUAR_REG_INIT JagInitData;
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ULONG Status;
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//
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// Define clock value for the ICS part (pS)
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//
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ULONG ClockResList[32] = { 4, 4, 4, 4, 4, 4, 4, 4,
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4, 4,42918,40984,38760,36724,33523,31017,
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29197,27548,24882,23491,22482,21468,20509,19920,
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18692,18054,16722,15015,14773,14053,13040, 4};
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//
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// Define a default jaguar init and monitor config for
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// use when a BOGUS init value is sent.
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//
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JAGUAR_REG_INIT JagDefaultData = {
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0xc, // Clock Selector
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0, // Bt485 clock 2x multiply
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1, // BitBlt Control
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0, // TopOfScreen
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41, // Horizontal Blank
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4, // Horizontal Begin Sync
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29, // Horizontal End Sync
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201, // Horizontal Total
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45, // Vertical Blank
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11, // Vertical Begin Sync
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13, // Vertical End Sync
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525, // Vertical Total
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0x200, // XFER LENGTH
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4, // Vertival Interrupt Line
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640 // Screen X
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};
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MONITOR_CONFIGURATION_DATA DefaultMonitor = {
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0, // version :do not change
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0, // revision :do not change
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640, // HorizontalResolution
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25422, // HorizontalDisplayTime
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636, // HorizontalBackPorch
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1907, // HorizontalFrontPorch
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3813, // HorizontalSync
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480, // VerticalResolution
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33, // VerticalBackPorch
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10, // VerticalFrontPorch
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2, // VerticalSync
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0, // HorizontalScreenSize : do not change
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0 // VerticalScreenSize : do not change
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};
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LONG HorDisplayTime;
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LONG HorResolutionDiv;
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LONG ReqClockPeriod;
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LONG CurrentClockError;
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LONG MinErrorValue;
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USHORT MinErrorIndex;
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LONG ShiftClockPeriod;
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USHORT BoardTypeBt485;
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//
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// Test the first bank of video memory
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//
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WriteVideoMemoryAddressTest(VideoMemory,
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0x200000
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);
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Status = CheckVideoMemoryAddressTest(VideoMemory,
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0x200000
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);
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if (Status != 0) {
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return EINVAL;
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}
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//
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// Determine if this is a Bt484 or Bt485 board. To do this write a 1 to command
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// register bit 07 then write 01 to the address register 0. This will enable
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// read/writes to command register 3 on a Bt485 but not on a Bt484. Clear
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// Command register 3 then read it back. On a Bt485 the return value will be 0x00,
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// on a Bt484 it will be 0x40.
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//
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//
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// Get the value in command register 0, then set bit 07
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//
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DataChar = READ_REGISTER_UCHAR(&Bt484->Command0.Byte);
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DataChar |= 0x80;
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WRITE_REGISTER_UCHAR(&Bt484->Command0.Byte,DataChar);
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//
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// Write 0x01 to the address register
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//
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WRITE_REGISTER_UCHAR(&Bt484->PaletteCursorWrAddress.Byte,0x01);
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//
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// Clear command register 3
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//
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WRITE_REGISTER_UCHAR(&Bt484->Status.Byte,0x00);
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//
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// Read Command Register 3 back and compare
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//
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DataChar = READ_REGISTER_UCHAR(&Bt484->Status.Byte);
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if (DataChar != 0x00) {
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//
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// This is a Bt484
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//
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BoardTypeBt485 = 0;
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JagInitData.Bt485Multiply = 0;
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} else {
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//
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// This is a Bt485
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//
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BoardTypeBt485 = 1;
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JagInitData.Bt485Multiply = 0;
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}
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//
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// Calculate the requested clock frequency then find the closest match in the
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// ICS clock frequency table. The requested clock frequency in picoseconds =
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//
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// Horizontal display time * 1000
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// ------------------------------
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// horizontal resolution
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//
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//
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HorDisplayTime = Monitor->HorizontalDisplayTime * 1000;
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HorResolutionDiv = Monitor->HorizontalResolution;
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ReqClockPeriod = HorDisplayTime / HorResolutionDiv;
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//
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// Check for a configuration needing a Bt485 and a board that is a 484. In
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// This case we will have to resort to a default 640 x 480 config
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//
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if ((BoardTypeBt485 == 0) & (ReqClockPeriod < ClockResList[30])) {
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//
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// We were told to display a mode that we don't support, set
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// the output to the default mode and also return the monitor
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// info to a default mode which will later be stored into
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// NVRAM so that the HAL will init ok and also the next ROM init
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// will be correct.
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//
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JagInitData = JagDefaultData;
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Monitor->HorizontalResolution = DefaultMonitor.HorizontalResolution;
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Monitor->HorizontalDisplayTime = DefaultMonitor.HorizontalDisplayTime;
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Monitor->HorizontalBackPorch = DefaultMonitor.HorizontalBackPorch;
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Monitor->HorizontalFrontPorch = DefaultMonitor.HorizontalFrontPorch;
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Monitor->HorizontalSync = DefaultMonitor.HorizontalSync;
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Monitor->VerticalResolution = DefaultMonitor.VerticalResolution;
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Monitor->VerticalBackPorch = DefaultMonitor.VerticalBackPorch;
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Monitor->VerticalFrontPorch = DefaultMonitor.VerticalFrontPorch;
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Monitor->VerticalSync = DefaultMonitor.VerticalSync;
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} else {
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//
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// Check for a Bt485 frequency
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//
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if ((BoardTypeBt485 == 1) & (ReqClockPeriod < ClockResList[30])) {
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ReqClockPeriod = ReqClockPeriod * 2;
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JagInitData.Bt485Multiply = 1;
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}
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MinErrorIndex = 0;
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//
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// Gaurentee a maximum starting error
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//
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MinErrorValue = ReqClockPeriod + 1;
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for (Index=0;Index<32;Index++) {
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//
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// Calculate the absolute value of clock error and find the
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// closest match in the array of clock values
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//
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CurrentClockError = ReqClockPeriod - ClockResList[Index];
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if (CurrentClockError < 0) {
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CurrentClockError *= -1;
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}
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if (CurrentClockError < MinErrorValue) {
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MinErrorValue = CurrentClockError;
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MinErrorIndex = Index;
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}
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}
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//
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// We now have a closest match in the clock array, now calculate the
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// values for the Bt484/Bt485 register values
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//
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JagInitData.ClockFreq = MinErrorIndex;
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JagInitData.BitBltControl = 1;
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JagInitData.TopOfScreen = 0;
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JagInitData.XferLength = 0x200;
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JagInitData.VerticalInterruptLine = 4;
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JagInitData.HorizontalDisplay = Monitor->HorizontalResolution;
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//
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// All jaguar timing values are based on the brooktree shift clock value which
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// is the clock frequency divided by 4. (period * 4) If this is a Bt485 using
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// its internal 2x clock multiplier than is is period * 2; (freq * 2 / 4)
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//
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if (JagInitData.Bt485Multiply == 1) {
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ShiftClockPeriod = ClockResList[MinErrorIndex] * 2;
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} else {
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ShiftClockPeriod = ClockResList[MinErrorIndex] * 4;
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}
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JagInitData.HorizontalBlank = ((Monitor->HorizontalBackPorch +
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Monitor->HorizontalSync +
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Monitor->HorizontalFrontPorch) * 1000)
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/ ShiftClockPeriod;
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JagInitData.HorizontalBeginSync = (Monitor->HorizontalFrontPorch * 1000)
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/ ShiftClockPeriod;
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JagInitData.HorizontalEndSync = ((Monitor->HorizontalSync +
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Monitor->HorizontalFrontPorch) * 1000)
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/ ShiftClockPeriod;
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JagInitData.HorizontalLine = JagInitData.HorizontalBlank +
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(Monitor->HorizontalResolution / 4);
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JagInitData.VerticalBlank = Monitor->VerticalBackPorch +
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Monitor->VerticalSync +
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Monitor->VerticalFrontPorch;
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JagInitData.VerticalBeginSync = Monitor->VerticalFrontPorch;
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JagInitData.VerticalEndSync = Monitor->VerticalFrontPorch +
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Monitor->VerticalSync;
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JagInitData.VerticalLine = Monitor->VerticalBackPorch +
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Monitor->VerticalSync +
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Monitor->VerticalFrontPorch +
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Monitor->VerticalResolution;
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}
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|
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//
|
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// Start ICS Clock pll and stabilize.
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//
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|
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WRITE_REGISTER_UCHAR(Clock,JagInitData.ClockFreq);
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|
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//
|
|
// Wait 10 uS for PLL clock to stabilize on the video board
|
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//
|
|
for (Index=0;Index<10;Index++) {
|
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READ_REGISTER_UCHAR(Clock);
|
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}
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|
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//
|
|
// Initialize Bt484 Command Register 0 to:
|
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//
|
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// 8 Bit DAC Resolution
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//
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|
|
CmdReg0 = 0;
|
|
((PBT484_COMMAND0)(&CmdReg0))->DacResolution = 1;
|
|
((PBT484_COMMAND0)(&CmdReg0))->GreenSyncEnable = 1;
|
|
((PBT484_COMMAND0)(&CmdReg0))->SetupEnable = 1;
|
|
WRITE_REGISTER_UCHAR(&Bt484->Command0.Byte,CmdReg0);
|
|
|
|
//
|
|
// Initialize Command Register 1 to:
|
|
//
|
|
|
|
DataChar = 0;
|
|
|
|
((PBT484_COMMAND1)(&DataChar))->BitsPerPixel = VXL_EIGHT_BITS_PER_PIXEL;
|
|
|
|
|
|
WRITE_REGISTER_UCHAR(&Bt484->Command1.Byte,DataChar);
|
|
|
|
//
|
|
// Initialize Command Register 2 to:
|
|
//
|
|
// SCLK Enabled
|
|
// TestMode disabled
|
|
// PortselMask Non Masked
|
|
// PCLK 1
|
|
// NonInterlaced
|
|
//
|
|
|
|
DataChar = 0;
|
|
((PBT484_COMMAND2)(&DataChar))->SclkDisable = 0;
|
|
((PBT484_COMMAND2)(&DataChar))->TestEnable = 0;
|
|
((PBT484_COMMAND2)(&DataChar))->PortselMask = 1;
|
|
((PBT484_COMMAND2)(&DataChar))->PclkSelect = 1;
|
|
((PBT484_COMMAND2)(&DataChar))->InterlacedDisplay = 0;
|
|
((PBT484_COMMAND2)(&DataChar))->PaletteIndexing = CONTIGUOUS_PALETTE;
|
|
((PBT484_COMMAND2)(&DataChar))->CursorMode = BT_CURSOR_WINDOWS;
|
|
|
|
|
|
WRITE_REGISTER_UCHAR(&Bt484->Command2.Byte,DataChar);
|
|
|
|
//
|
|
// if JagInitData.ClockFreq bit 8 is set then this is a Bt485 mode that requires
|
|
// the internal 2x clock multiplier to be enabled.
|
|
//
|
|
|
|
if (JagInitData.Bt485Multiply == 1) {
|
|
|
|
//
|
|
// To access cmd register 3, first set bit CR17 in command register 0
|
|
//
|
|
|
|
CmdReg0 |= 0x80;
|
|
WRITE_REGISTER_UCHAR(&Bt484->Command0.Byte,CmdReg0);
|
|
|
|
//
|
|
// Write a 0x01 to Address register
|
|
//
|
|
|
|
WRITE_REGISTER_UCHAR(&Bt484->PaletteCursorWrAddress.Byte,0x01);
|
|
|
|
//
|
|
// Write to cmd register 3 in the status register location. Cmd3 is initialized
|
|
// to turn on the 2x clock multiplier.
|
|
//
|
|
|
|
DataChar = 0;
|
|
((PBT484_COMMAND3)(&DataChar))->ClockMultiplier = 1;
|
|
|
|
WRITE_REGISTER_UCHAR(&Bt484->Status.Byte,DataChar);
|
|
|
|
//
|
|
// Allow 10 uS for the 2x multiplier to stabilize
|
|
//
|
|
|
|
for (Index=0;Index<10;Index++) {
|
|
READ_REGISTER_UCHAR(Clock);
|
|
}
|
|
}
|
|
|
|
|
|
|
|
|
|
//
|
|
// Initialize Color Palette.
|
|
//
|
|
// Set address pointer to base of color palette.
|
|
// Initialize first 16 entries from color table.
|
|
// Zero remaining entries.
|
|
//
|
|
|
|
WRITE_REGISTER_UCHAR(&Bt484->PaletteCursorWrAddress.Byte,0);
|
|
|
|
for (Index=0;Index<16*3;Index++) {
|
|
WRITE_REGISTER_UCHAR(&Bt484->PaletteColor.Byte,ColorTable[Index]);
|
|
}
|
|
|
|
for (;Index<256*3;Index++) {
|
|
WRITE_REGISTER_UCHAR(&Bt484->PaletteColor.Byte,0);
|
|
}
|
|
|
|
//
|
|
// Initialize Cursor and Overscan color.
|
|
//
|
|
// Set address pointer base.
|
|
// Zero 4 entries.
|
|
//
|
|
|
|
WRITE_REGISTER_UCHAR(&Bt484->CursorColorWrAddress.Byte,0);
|
|
|
|
for (Index=0;Index<4*3;Index++) {
|
|
WRITE_REGISTER_UCHAR(&Bt484->CursorColor.Byte,0);
|
|
}
|
|
|
|
//
|
|
// Initialize cursor RAM
|
|
//
|
|
// Set address pointer to base of ram.
|
|
// Clear both planes
|
|
//
|
|
|
|
WRITE_REGISTER_UCHAR(&Bt484->PaletteCursorWrAddress.Byte,0);
|
|
|
|
for (Index=0;Index<256;Index++) {
|
|
WRITE_REGISTER_UCHAR(&Bt484->CursorRam.Byte,0);
|
|
}
|
|
|
|
|
|
//
|
|
// Initialize cursor position registers--cursor off.
|
|
//
|
|
|
|
WRITE_REGISTER_UCHAR(&Bt484->CursorXLow.Byte,0);
|
|
WRITE_REGISTER_UCHAR(&Bt484->CursorXHigh.Byte,0);
|
|
WRITE_REGISTER_UCHAR(&Bt484->CursorYLow.Byte,0);
|
|
WRITE_REGISTER_UCHAR(&Bt484->CursorYHigh.Byte,0);
|
|
|
|
//
|
|
// Initialize pixel mask.
|
|
//
|
|
|
|
WRITE_REGISTER_UCHAR(&Bt484->PixelMask.Byte,0xFF);
|
|
|
|
//
|
|
// Init Jaguar Registers
|
|
//
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->TopOfScreen.Short,
|
|
JagInitData.TopOfScreen);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->HorizontalBlank.Short,
|
|
JagInitData.HorizontalBlank);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->HorizontalBeginSync.Short,
|
|
JagInitData.HorizontalBeginSync);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->HorizontalEndSync.Short,
|
|
JagInitData.HorizontalEndSync);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->HorizontalLine.Short,
|
|
JagInitData.HorizontalLine);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->VerticalBlank.Short,
|
|
JagInitData.VerticalBlank);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->VerticalBeginSync.Short,
|
|
JagInitData.VerticalBeginSync);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->VerticalEndSync.Short,
|
|
JagInitData.VerticalEndSync);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->VerticalLine.Short,
|
|
JagInitData.VerticalLine);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->XferLength.Short,
|
|
JagInitData.XferLength);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->VerticalInterruptLine.Short,
|
|
JagInitData.VerticalInterruptLine);
|
|
|
|
WRITE_REGISTER_USHORT(&Jaguar->HorizontalDisplay.Short,
|
|
JagInitData.HorizontalDisplay);
|
|
|
|
WRITE_REGISTER_UCHAR(&Jaguar->BitBltControl.Byte,
|
|
JagInitData.BitBltControl);
|
|
|
|
//
|
|
// Enable timing.
|
|
//
|
|
|
|
WRITE_REGISTER_UCHAR(&Jaguar->MonitorControl,MONITOR_TIMING_ENABLE);
|
|
|
|
return ESUCCESS;
|
|
|
|
}
|
|
|
|
#endif
|