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223 lines
5.3 KiB
223 lines
5.3 KiB
/*++
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Copyright (c) 1992 Microsoft Corporation
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Module Name:
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ultra14f.h
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Abstract:
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This file contains the structures and definitions that define
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the ULTRASTOR 14F ISA SCSI host bus adapter.
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Author:
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Stephen Fong (SF)
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Revision History:
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--*/
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#include "scsi.h"
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//
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// SCATTER/GATHER definitions
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//
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#define MAXIMUM_SG_DESCRIPTORS 16
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#define MAXIMUM_TRANSFER_LENGTH 0xFFFFFFFF
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typedef struct _SGD {
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ULONG Address;
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ULONG Length;
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} SGD, *PSGD;
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typedef struct _SDL {
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SGD Descriptor[MAXIMUM_SG_DESCRIPTORS];
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} SDL, *PSDL;
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//
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// MailBox SCSI Command Packet
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//
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#pragma pack(1)
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typedef struct _MSCP {
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UCHAR OperationCode:3; // byte 00
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UCHAR TransferDirection:2;
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UCHAR DisableDisconnect:1;
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UCHAR UseCache:1;
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UCHAR ScatterGather:1;
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UCHAR TargetId:3; // byte 01
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UCHAR Channel:2;
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UCHAR Lun:3;
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ULONG DataPointer; // byte 02
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ULONG DataLength; // byte 06
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ULONG CommandLink; // byte 0a
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UCHAR CommandLinkId; // byte 0e
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UCHAR SgDescriptorCount; // byte 0f
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UCHAR RequestSenseLength; // byte 10
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UCHAR CdbLength; // byte 11
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UCHAR Cdb[12]; // byte 12
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UCHAR AdapterStatus; // byte 1e
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UCHAR TargetStatus; // byte 1f
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ULONG RequestSensePointer; // byte 20
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PSCSI_REQUEST_BLOCK SrbAddress; // byte 24
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PSCSI_REQUEST_BLOCK AbortSrb; // byte 28
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SDL Sdl; // byte 2c
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} MSCP, *PMSCP;
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#pragma pack()
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//
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// Operation codes
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//
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#define MSCP_OPERATION_HA_COMMAND 1
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#define MSCP_OPERATION_SCSI_COMMAND 2
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#define MSCP_OPERATION_DEVICE_RESET 4
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//
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// Transfer direction
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//
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#define MSCP_TRANSFER_SCSI 0
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#define MSCP_TRANSFER_IN 1
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#define MSCP_TRANSFER_OUT 2
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#define MSCP_NO_TRANSFER 3
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//
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// Host Adapter Error Codes
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//
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#define MSCP_NO_ERROR 0x00
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#define MSCP_INVALID_COMMAND 0x01
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#define MSCP_INVALID_PARAMETER 0x02
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#define MSCP_INVALID_DATA_LIST 0x03
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#define MSCP_CPU_DIAG_ERROR 0x30
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#define MSCP_BUFFER_RAM_DIAG_ERROR 0x31
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#define MSCP_STATIC_RAM_DIAG_FAIL 0x32
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#define MSCP_BMIC_CHIP_DIAG_ERROR 0x33
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#define MSCP_CACHE_TAG_RAM_FAIL 0x34
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#define MSCP_ROM_CHECKSUM_CHECK 0x35
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#define MSCP_INVALID_CONFIG_DATA 0x36
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#define MSCP_BUFFER_UNDERRUN 0x40
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#define MSCP_BUFFER_OVERRUN 0x41
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#define MSCP_BUFFER_PARITY_ERROR 0x42
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#define MSCP_ISA_BUS_PARITY_ERROR 0x43
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#define MSCP_ISA_INTERFACE_ERROR 0x44
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#define MSCP_SCSI_BUS_ABORT_ERROR 0x84
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#define MSCP_SELECTION_TIMEOUT 0x91
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#define MSCP_BUS_UNDER_OVERRUN 0x92
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#define MSCP_UNEXPECTED_BUS_FREE 0x93
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#define MSCP_INVALID_PHASE_CHANGE 0x94
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#define MSCP_ILLEGAL_SCSI_COMMAND 0x96
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#define MSCP_AUTO_SENSE_ERROR 0x9B
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#define MSCP_UNEXPECTED_COMPLETE 0x9F
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#define MSCP_BUS_RESET_ERROR 0xA3
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#define MSCP_ABORT_NOT_FOUND 0xAA
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#define MSCP_INVALID_SG_LIST 0xFF
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//
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// ISA Registers definition
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//
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#pragma pack(1)
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typedef struct _U14_BASEIO_ADDRESS {// baseioport offset
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UCHAR LocalDoorBellMask; // + 0
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UCHAR LocalDoorBellInterrupt; // + 1
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UCHAR SystemDoorBellMask; // + 2
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UCHAR SystemDoorBellInterrupt; // + 3
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UCHAR ProductId1; // + 4
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UCHAR ProductId2; // + 5
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UCHAR Config1; // + 6
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UCHAR Config2; // + 7
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ULONG OutGoingMailPointer; // + 8
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ULONG InComingMailPointer; // + C
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} U14_BASEIO_ADDRESS, *PU14_BASEIO_ADDRESS;
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#pragma pack()
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//
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// UltraStor 14F board id
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//
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#define ULTRASTOR_14F_ID1 0x56
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#define ULTRASTOR_14F_ID2 0x40 // to work with both 14F, 34L and other models
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// driver should mask ID2 byte bit0-bit3 to 0
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//
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// InComing Statuses
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//
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#define ICM_STATUS_COMPLETE_SUCCESS 0x01
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#define ICM_STATUS_COMPLETE_ERROR 0x02
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#define ICM_STATUS_ABORT_SUCCESS 0x03
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#define ICM_STATUS_ABORT_FAILED 0x04
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//
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// DMA Channels
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//
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#define US_DMA_CHANNEL_5 0x00
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#define US_DMA_CHANNEL_6 0x40
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#define US_DMA_CHANNEL_7 0x80
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#define US_DMA_CHANNEL_5_RESERVED 0xC0
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//
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// Interrupt levels
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//
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#define US_INTERRUPT_LEVEL_15 0x00
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#define US_INTERRUPT_LEVEL_14 0x10
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#define US_INTERRUPT_LEVEL_11 0x20
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#define US_INTERRUPT_LEVEL_10 0x30
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//
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// Alternate address selection
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//
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#define US_ISA_SECONDARY_ADDRESS 0x40
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//
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// ISA TSR Port enabled
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//
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#define US_ISA_PRIMARY_ADDRESS 0x00
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#define US_ISA_DISABLE 0x80
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//
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// Local doorbell mask (baseaddr+0)
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//
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#define US_ENABLE_OGMINT 0x01
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#define US_ENABLE_SCSI_BUS_RESET 0x20
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#define US_ENABLE_HA_SOFT_RESET 0x40
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//
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// Local doorbell interrupt/status (baseaddr+1)
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//
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#define US_OGMINT 0x01
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#define US_SCSI_BUS_RESET 0x20
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#define US_HA_SOFT_RESET 0x40
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//
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// System doorbell mask (baseaddr+2)
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//
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#define US_ENABLE_ICMINT 0x01
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#define US_ENABLE_SYSTEM_DOORBELL 0x80
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//
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// System doorbell interrupt (baseaddr+3)
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//
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#define US_ICMINT 0x01
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#define US_SINT_PENDING 0x80
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#define US_RESET_ICMINT 0x01
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