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202 lines
6.8 KiB
202 lines
6.8 KiB
#ifndef _IEPROHW_
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#define _IEPROHW_
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#define EPRO_LENGTH_OF_ADDRESS 6
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////////////////////////////////////////////////////////////
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// Bank Switches
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////////////////////////////////////////////////////////////
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#define EPRO_GOTO_B0 EPRO_WRITE_UCHAR(epro_cmd_reg, EPRO_CMD_BANK0)
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#define EPRO_GOTO_B1 EPRO_WRITE_UCHAR(epro_cmd_reg, EPRO_CMD_BANK1)
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#define EPRO_GOTO_B2 EPRO_WRITE_UCHAR(epro_cmd_reg, EPRO_CMD_BANK2)
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////////////////////////////////////////////////////////////
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// Port I/O
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////////////////////////////////////////////////////////////
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#define EPRO_READ_UCHAR(_Port, _pValue) \
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NdisRawReadPortUchar( \
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(ULONG)(_Port), \
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(PUCHAR)(_pValue) \
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)
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#define EPRO_READ_USHORT(_Port, _pValue) \
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NdisRawReadPortUshort( \
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(ULONG)(_Port), \
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(PUSHORT)(_pValue) \
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)
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#define EPRO_WRITE_UCHAR(_Port, _Value) \
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NdisRawWritePortUchar( \
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(ULONG)(_Port), \
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(UCHAR) (_Value) \
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)
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////////////////////////////////////////////////////////////
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// Command Macros
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// Care must be taken to ensure you are in the right bank
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////////////////////////////////////////////////////////////
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// Memory I/O
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#define EPRO_MEM_READADDR(_pValue) \
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EPRO_READ_USHORT(EPro_IOBaseAddress + EPRO_HOST_ADDR_REG, _pValue)
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#define EPRO_MEM_WRITEADDR(_Value) \
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EPRO_WRITE_USHORT(EPro_IOBaseAddress + EPRO_HOST_ADDR_REG, Value)
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#define EPRO_MEM_READSHORT(_pValue) \
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EPRO_READ_USHORT(EPro_IOBaseAddress + EPRO_MEM_IO_REG)
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#define EPRO_MEM_WRITESHORT(_Value) \
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EPRO_WRITE_USHORT(EPro_IOBaseAddress + EPRO_MEM_IO_REG)
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//BOOLEAN EProMemcpyW(void *pMainMemSrc_, void *OnBoardDest_, UINT count);
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//BOOLEAN EProMemcpyR(void *OnBoardSrc_, void *pMainMemDest_, UINT count);
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////////////////////////////////////////////////////////////
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// TX Defines
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////////////////////////////////////////////////////////////
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#define EPRO_NUM_TX_BUFFERS 30
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#define EPRO_TX_FIRST_BUF_START 0
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// 1514 bytes ethernet frame
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// 16 bytes epro header
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// 2 bytes pad for word alignment
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//#define EPRO_BUFFER_LEN 1532
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#define EPRO_TRANSMIT_HEADER_SHORT1 (USHORT)I82595_XMT
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#define EPRO_TRANSMIT_HEADER_SHORT2 (USHORT)0x0
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////////////////////////////////////////////////////////////
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//
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////////////////////////////////////////////////////////////
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#define EPRO_REGISTRY_INTERRUPT_STRING NDIS_STRING_CONST("INTERRUPT")
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#define EPRO_REGISTRY_IOADDRESS_STRING NDIS_STRING_CONST("IOADDRESS")
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#define EPRO_REGISTRY_OLDIOADDRESS_STRING NDIS_STRING_CONST("OLDIOADDRESS")
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#define EPRO_REGISTRY_BUSTYPE_STRING NDIS_STRING_CONST("BusType")
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#define EPRO_REGISTRY_TRANSCEIVER_STRING NDIS_STRING_CONST("Transceiver")
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#define EPRO_REGISTRY_IOCHRDY_STRING NDIS_STRING_CONST("IoChannelReady")
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#define EPRO_IOCHRDY_EARLY 0x01
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#define EPRO_IOCHRDY_LATE 0x02
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#define EPRO_IOCHRDY_NEVER 0x03
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#define EPRO_IOCHRDY_AUTO 0x04
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////////////////////////////////////////////////////////////
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// Capabilities/Statistics about the EPRO card
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////////////////////////////////////////////////////////////
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#define EPRO_VENDOR_ID_L 0x00
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#define EPRO_VENDOR_ID_M 0xaa
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#define EPRO_VENDOR_ID_H 0x00
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#define EPRO_GEN_MEDIA_SUPPORTED NdisMedium802_3
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#define EPRO_GEN_MEDIA_IN_USE NdisMedium802_3
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#define EPRO_GEN_MAXIMUM_LOKAHEAD 256
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#define EPRO_GEN_MAXIMUM_FRAME_SIZE 1500
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#define EPRO_GEN_MAXIMUM_TOTAL_SIZE 1514
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#define EPRO_MAX_MULTICAST 64
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#define EPRO_GEN_MAC_OPTIONS (NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA | \
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NDIS_MAC_OPTION_RECEIVE_SERIALIZED | \
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NDIS_MAC_OPTION_NO_LOOPBACK)
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#define EPRO_GEN_LINK_SPEED 100000
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#define EPRO_GEN_RECEIVE_BUFFER_SPACE (0x8000 - 0x3000)
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#define EPRO_TX_BUF_SIZE 1514
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#define EPRO_RX_BUF_SIZE 0
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#define EPRO_GEN_TRANSMIT_BUFFER_SPACE EPRO_TX_BUF_SIZE * EPRO_NUM_TX_BUFFERS
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#define EPRO_VENDOR_DESC "Intel EtherExpress PRO"
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////////////////////////////////////////////////////////////
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// EPro EEPROM defines
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////////////////////////////////////////////////////////////
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#define EPRO_SK_STALL_TIME 1000 // use 1000 microsecs
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#define EPRO_ETHERNET_ADDR_H 0x2
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#define EPRO_ETHERNET_ADDR_M 0x3
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#define EPRO_ETHERNET_ADDR_L 0x4
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#define EPRO_EEPROM_CONFIG_OFFSET 0
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#define EPRO_EEPROM_CONFIG1_OFFSET 1
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// word 0 on the eeprom
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#define EPRO_EEPROM_IOADDR_BITPOS 0x0a // bits 10-15
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#define EPRO_EEPROM_IOADDR_MASK 0xfc00
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#define EPRO_EEPROM_AUTO_IO_ENABLE_MASK 0x0040
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#define EPRO_EEPROM_HOST_BUS_WD_MASK 0x0004
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#define EPRO_EEPROM_PNP_ENABLE_MASK 0x0001
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// word 1 on the eeprom. RM: Due to chenges for eeprom stepping 4, we
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// have additional masks. For simplicity's sake, stepping 4 masks
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// are prefixed with the '4' (even if there is no other stepping
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// equivalent INT for that IRQ).
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#define EPRO_EEPROM_IRQ_MASK 0x000f
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#define EPRO_EEPROM_IRQ_2_MASK 0x0
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#define EPRO_EEPROM_IRQ_3_MASK 0x1
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#define EPRO_EEPROM4_IRQ_3_MASK 0x0
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#define EPRO_EEPROM4_IRQ_4_MASK 0x1
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#define EPRO_EEPROM_IRQ_5_MASK 0x2
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#define EPRO_EEPROM4_IRQ_7_MASK 0x3
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#define EPRO_EEPROM4_IRQ_9_MASK 0x4
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#define EPRO_EEPROM_IRQ_10_MASK 0x3
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#define EPRO_EEPROM4_IRQ_10_MASK 0x5
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#define EPRO_EEPROM_IRQ_11_MASK 0x4
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#define EPRO_EEPROM4_IRQ_11_MASK 0x6
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#define EPRO_EEPROM4_IRQ_12_MASK 0x7
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////////////////////////////////////////////////////////////
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// TX/RX buffers
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////////////////////////////////////////////////////////////
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#define EPRO_TX_LOWER_LIMIT 0x00
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#define EPRO_TX_UPPER_LIMIT 0x27
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#define EPRO_TX_LOWER_LIMIT_SHORT 0x0000
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#define EPRO_TX_UPPER_LIMIT_SHORT 0x2800
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#define EPRO_RX_LOWER_LIMIT 0x28
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#define EPRO_RX_UPPER_LIMIT 0x7f
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#define EPRO_RX_LOWER_LIMIT_SHORT 0x2800
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#define EPRO_RX_UPPER_LIMIT_SHORT 0x8000
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////////////////////////////////////////////////////////////
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// Configuration Defaults
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////////////////////////////////////////////////////////////
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//#define EPRO_CONFIG_1 0xa0 // a0
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#define EPRO_CONFIG_1 0xe0 // a0
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#define EPRO_CONFIG_2 0x16 // no broadcast
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// 4 different ones depending on the transceiver setting...
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#define EPRO_CONFIG_3_AUI 0x10
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#define EPRO_CONFIG_3_BNC 0x34
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#define EPRO_CONFIG_3_TPE 0x14
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#define EPRO_CONFIG_3_AUTO 0x00
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#define EPRO_NO_RX_STP_INTERRUPTS 0x01
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#define EPRO_NO_RX_INTERRUPTS 0x02
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#define EPRO_NO_TX_INTERRUPTS 0x04
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#define EPRO_NO_EXEC_INTERRUPTS 0x08
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#define EPRO_DEFAULT_INTERRUPTS 0x09 // RX and TX
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#define EPRO_ALL_INTERRUPTS 0x0f
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#define EPRO_RX_TX_EXE_INTERRUPTS 0x01
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////////////////////////////////////////////////////////////
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// Various states for our ISR
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////////////////////////////////////////////////////////////
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#define EPRO_INT_NONE_PENDING 0
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//#define EPRO_INT_IN_SETUP 1
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//#define EPRO_INT_RESET_PENDING 2
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//#define EPRO_INT_SET_PENDING 3
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#define EPRO_INT_MC_SET_PENDING 4
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////////////////////////////////////////////////////////////
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//
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////////////////////////////////////////////////////////////
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// How long do we wait for a TX to free up before we
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// consider ourselves hung?
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#define EPRO_TX_TIMEOUT 10000 // 10000 usec right now
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#endif // _IEPROHW_
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