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132 lines
7.8 KiB
132 lines
7.8 KiB
/****************************************************************************/
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/****************************************************************************/
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/* */
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/* THE MADGE ADAPTER CARD DEFINITIONS (EISA CARDS) */
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/* =============================================== */
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/* */
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/* FTK_EISA.H : Part of the FASTMAC TOOL-KIT (FTK) */
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/* */
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/* Copyright (c) Madge Networks Ltd. 1991-1994 */
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/* Developed by MF */
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/* CONFIDENTIAL */
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/* */
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/* */
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/****************************************************************************/
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/* */
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/* This header file contains the definitions for programming Madge EISA */
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/* adapter cards. Each adapter card has a number of control and status */
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/* registers. ALL bits in ALL registers are defined by Madge Networks Ltd, */
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/* however only a restricted number are defined below as used within the */
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/* FTK. All other bits must NOT be changed and no support will be offered */
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/* for any application that does so or uses the defined bits in any way */
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/* different to the FTK. */
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/* */
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/****************************************************************************/
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/****************************************************************************/
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/* */
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/* VERSION_NUMBER of FTK to which this FTK_EISA.H belongs : */
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/* */
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#define FTK_VERSION_NUMBER_FTK_EISA_H 221
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/****************************************************************************/
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/* */
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/* Values : EISA REGISTER MAP */
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/* */
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/* Madge EISA cards have the following register map. All SIF registers are */
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/* always visible. */
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/* */
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/* NB. The IO registers are actually in two groups 0x0000-0x000F (the SIF */
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/* registers) and 0x0C80-0x00C9F (the control type registers). */
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/* */
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#define EISA_IO_RANGE 16
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#define EISA_FIRST_SIF_REGISTER 0x0000
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#define EISA_IO_RANGE2 32
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#define EISA_IO_RANGE2_BASE 0x0C80
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#define EISA_ID_REGISTER_0 0x0C80
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#define EISA_ID_REGISTER_1 0x0C82
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#define EISA_CONTROLX_REGISTER 0x0C84
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#define EISA_BMIC_REGISTER_3 0x0C90
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/****************************************************************************/
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/* */
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/* Values : MC POS_REGISTER_0 */
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/* */
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/* These are the required contents of the EISA ID registers for Madge 16/4 */
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/* EISA mk1 and mk2 cards. */
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/* */
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#define EISA_ID0_MDG_CODE 0x8734 /* 'MDG' encoded */
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#define EISA_ID1_MK1_MDG_CODE 0x0100 /* '0001' encoded */
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#define EISA_ID1_MK2_MDG_CODE 0x0200 /* '0002' encoded */
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#define EISA_ID1_BRIDGE_MDG_CODE 0x0300 /* '0003' encoded */
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#define EISA_ID1_MK3_MDG_CODE 0x0400 /* '0004' encoded */
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/****************************************************************************/
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/* */
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/* Values : EISA CONTROLX_REGISTER */
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/* */
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/* These are the bit definitions for the expansion board control register */
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/* on EISA cards. */
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/* */
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#define EISA_CTRLX_CDEN ((BYTE) 0x01) /* card enabled */
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/****************************************************************************/
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/* */
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/* Values : EISA BMIC_REGISTER_3 */
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/* */
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/* These are the bit definitions for BMIC register 3 on EISA cards. */
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/* */
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#define EISA_BMIC3_IRQSEL ((BYTE) 0x0F) /* interrupt number (4 bits) */
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#define EISA_BMIC3_EDGE ((BYTE) 0x10) /* edge\level triggered ints */
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#define EISA_BMIC3_SPD ((BYTE) 0x80) /* any speed selected */
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/****************************************************************************/
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/* */
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/* Values : EISA EXTENDED EAGLE SIF REGISTERS */
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/* */
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/* The EAGLE SIF registers are in two groups - the normal SIF registers */
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/* (those from the old TI chipset) and the extended SIF registers (those */
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/* particular to the EAGLE). For Madge EISA adapter cards, both normal and */
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/* extended SIF registers are always accessible. */
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/* */
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/* The definitions for the normal SIF registers are in FTK_CARD.H because */
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/* they appear in the same relative IO locations for all adapter cards. The */
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/* extended SIF registers are here because they appear at different */
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/* relative IO locations for different types of adapter cards. */
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/* */
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#define EISA_EAGLE_SIFACL 8 /* adapter control */
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#define EISA_EAGLE_SIFADR_2 10 /* copy of SIFADR */
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#define EISA_EAGLE_SIFADX 12 /* DIO address (high) */
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#define EISA_EAGLE_DMALEN 14 /* DMA length */
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/****************************************************************************/
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/* */
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/* Values : VRAM enable on EIDA Mk3 */
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/* */
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#define DIO_LOCATION_EISA_VRAM_ENABLE ((DWORD) 0xC0000L)
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#define EISA_VRAM_ENABLE_WORD ((WORD) 0xFFFF)
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/* */
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/* */
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/************** End of FTK_EISA.H file **************************************/
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/* */
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/* */
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