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100 lines
5.7 KiB
100 lines
5.7 KiB
/****************************************************************************/
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/****************************************************************************/
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/* */
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/* THE MADGE ADAPTER CARD DEFINITIONS (SMART 16 CARDS) */
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/* ================================================ */
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/* */
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/* FTK_SM16.H : Part of the FASTMAC TOOL-KIT (FTK) */
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/* */
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/* Copyright (c) Madge Networks Ltd. 1991-1994 */
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/* Developed by AC */
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/* CONFIDENTIAL */
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/* */
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/* */
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/****************************************************************************/
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/* */
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/* This header file contains the definitions for programming Madge Smart 16 */
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/* adapter cards. These adapter cards have a couple of control registers, */
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/* in addition to the SIF registers. ALL bits in ALL control registers are */
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/* defined by Madge Networks Ltd */
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/* */
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/****************************************************************************/
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/****************************************************************************/
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/* */
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/* VERSION_NUMBER of FTK to which this FTK_SM16.H belongs : */
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/* */
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#define FTK_VERSION_NUMBER_FTK_SM16_H 221
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/****************************************************************************/
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/* */
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/* Values : SMART 16 REGISTER MAP */
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/* */
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/* The Madge Smart 16 Ringnode uses the following register layout. */
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/* N.B. The SIF registers are mapped linearly, with no overlaying. */
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/* */
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#define SMART16_IO_RANGE 32
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#define SMART16_DEFAULT_INTERRUPT 2
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#define SMART16_CONTROL_REGISTER_1 0
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#define SMART16_CONTROL_REGISTER_2 8
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#define SMART16_FIRST_SIF_REGISTER 16
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/****************************************************************************/
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/* */
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/* Values : SMART 16 CONTROL_REGISTER_1 */
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/* */
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/* These are the bit definitions for control register 1 on Smart 16 cards. */
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/* */
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/* NB. The bit definitions are mostly the same as MC CONTROL_REGISTER_1. */
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/* */
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#define SMART16_CTRL1_NSRESET ((BYTE) 0x01) /* SIF Reset signal */
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#define SMART16_CTRL1_SCS ((BYTE) 0x02) /* Chip select */
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/****************************************************************************/
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/* */
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/* Values : SMART 16 CONTROL_REGISTER_2 BITS */
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/* */
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/* These are the bit definitions for control register 2 on Smart 16 cards. */
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/* */
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#define SMART16_CTRL2_XTAL ((BYTE) 0x01) /* Used to decode BIA */
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#define SMART16_CTRL2_SCS ((BYTE) 0x02) /* Same as CTRL1_SCS */
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/****************************************************************************/
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/* */
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/* Values : SMART 16 SIFACL INTERRUPT SETTINGS */
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/* */
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/* These are the values to be written into the NSELOUT0/1 bits of SIFACL to */
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/* select the interrupt number on the adapter card. */
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/* */
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#define SMART16_IRQ_2 3
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#define SMART16_IRQ_3 0
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#define SMART16_IRQ_7 2
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/****************************************************************************/
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/* */
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/* Values : SMART 16 IO PORT MASK for revision type */
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/* */
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/* This bit in the IO address selects between rev3 and rev4 bus timings. */
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/* */
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#define SMART16_REV3 ((UINT) 0x1000)
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/* */
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/* */
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/************** End of FTK_SM16.H file **************************************/
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/* */
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/* */
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