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570 lines
12 KiB
570 lines
12 KiB
/*++
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Copyright (c) 1995 Microsoft Corporation
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Module Name:
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pciport.h
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Abstract:
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header file for pciport.sys
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Author:
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Ken Reneris (kenr) March-13-1885
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Environment:
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Kernel mode only.
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Revision History:
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--*/
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#include "nthal.h"
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#include "hal.h"
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#include "pci.h"
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#include "stdio.h"
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#include "stdarg.h"
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//
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// Structures
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//
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#define PciExtension Reserved[0]
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//
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// When queued, the following HAL_DEVICE_CONTROL_CONTEXT values are defined
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//
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#define ContextWorkQueue BusExtenderReserved[0]
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#define ContextControlHandler BusExtenderReserved[2]
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//
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// When in progress, the following HAL_DEVICE_CONTROL_CONTEXT values are defined
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//
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#define ContextArgument1 BusExtenderReserved[0]
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#define ContextArgument2 BusExtenderReserved[1]
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#define ContextBusyFlag BusExtenderReserved[2]
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#define PCIPORTDATA(a) \
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((PPCI_PORT) ( ((PPCIBUSDATA) (a)->BusData)->PciExtension))
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#define PCI_CONFIG_TYPE(PciData) \
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((PciData)->HeaderType & ~PCI_MULTIFUNCTION)
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#define Is64BitBaseAddress(a) \
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(((a & PCI_ADDRESS_IO_SPACE) == 0) && \
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((a & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT))
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#define MAX_VALID_DEVICE_HANDLE 0x7FFFFFFF
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// the follow are handle value states when the handle is > MAX_VALID_DEVICE_HANDLE
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#define INITIALIZE_DEVICE_HANDLE 0x80000000
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#define TRANSISTION_DEVICE_HANDLE 0x80000001
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#define INVALID_DEVICE_HANDLE 0x80000002
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typedef struct _DEVICE_DATA_ {
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SINGLE_LIST_ENTRY Next;
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//
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// SlotNumber for which this device data corrisponds
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//
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//PCI_SLOT_NUMBER SlotNumber;
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//
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//
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//
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BOOLEAN Valid;
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//
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// DeviceControl in progress flags
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//
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BOOLEAN SyncBusy;
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BOOLEAN AsyncBusy;
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//
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// Track the lock state of the device
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// PendPowerUp is used while an Unlock is in progress
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// to cause a power up request to wait
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//
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BOOLEAN Locked;
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BOOLEAN PendPowerUp;
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//
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// Track the power state of the device.
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// If it's powered off, track the device's configuration.
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//
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// If the powered off configuration has changed, track the
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// original configuration in case the new configuration is
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// not supported by the h/w. (would be a defective device)
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//
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BOOLEAN Power;
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PPCI_COMMON_CONFIG CurrentConfig;
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//
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// Since PCI doesn't have a runtime safe way to determine
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// the length of it's base register's will we keep track
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// of them here.
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//
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ULONG BARBits[PCI_TYPE0_ADDRESSES+1];
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//
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//
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//
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BOOLEAN BARBitsSet;
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//
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// Determine if the device's rom base address register should
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// be enabled
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//
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BOOLEAN EnableRom;
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//
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// Flag defective hardware which we've noticed that it's base
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// address registers do not function properly.
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//
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BOOLEAN BrokenDevice;
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} DEVICE_DATA, *PDEVICE_DATA;
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extern POBJECT_TYPE *IoDeviceHandlerObjectType;
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extern PULONG IoDeviceHandlerObjectSize;
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#define DeviceHandler2DeviceData(a) ((PDEVICE_DATA) (((PUCHAR) a) + PcipDeviceHandlerObjectSize))
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#define DeviceData2DeviceHandler(a) ((PDEVICE_HANDLER_OBJECT) (((PUCHAR) a) - PcipDeviceHandlerObjectSize))
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#define DeviceDataSlot(a) DeviceData2DeviceHandler(a)->SlotNumber
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typedef struct {
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BOOLEAN Control;
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} *PBCTL_SET_CONTROL;
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typedef struct {
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PBUS_HANDLER Handler;
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LIST_ENTRY CheckBus;
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LIST_ENTRY DeviceControl;
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ULONG NoValidSlots;
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SINGLE_LIST_ENTRY ValidSlots;
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PVOID Spare;
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} PCI_PORT, *PPCI_PORT;
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//
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// Internal DeviceControls
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//
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#define BCTL_ASSIGN_SLOT_RESOURCES 0x90000001
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#define BCTL_CHECK_DEVICE 0x90000002
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#define BCTL_INITIAL_DEVICE 0x90000003
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typedef struct {
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PUNICODE_STRING RegistryPath;
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PUNICODE_STRING DriverClassName;
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PDRIVER_OBJECT DriverObject;
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PCM_RESOURCE_LIST *AllocatedResources;
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} CTL_ASSIGN_RESOURCES, *PCTL_ASSIGN_RESOURCES;
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typedef BOOLEAN (FASTCALL * BGNFNC)(PDEVICE_DATA, PHAL_DEVICE_CONTROL_CONTEXT);
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typedef VOID (* CTLFNC)(PDEVICE_DATA, PHAL_DEVICE_CONTROL_CONTEXT);
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typedef struct {
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ULONG ControlCode;
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ULONG MinBuffer;
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BGNFNC BeginDeviceControl;
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CTLFNC ControlHandler;
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} DEVICE_CONTROL_HANDLER, *PDEVICE_CONTROL_HANDLER;
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//
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//
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//
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#if DBG
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VOID PciDebugPrint (
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ULONG Level,
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PCCHAR DebugMessage,
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...
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);
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#define DebugPrint(arg) PciDebugPrint arg
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#else
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#define DebugPrint(arg)
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#endif
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//
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// Globals
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//
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extern FAST_MUTEX PcipMutex;
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extern KSPIN_LOCK PcipSpinlock;
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extern LIST_ENTRY PcipControlWorkerList;
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extern LIST_ENTRY PcipControlDpcList;
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extern LIST_ENTRY PcipCheckBusList;
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extern ULONG PcipWorkerQueued;
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extern WORK_QUEUE_ITEM PcipWorkItem;
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extern KDPC PcipWorkDpc;
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extern ULONG PcipNextHandle;
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extern DEVICE_CONTROL_HANDLER PcipControl[];
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extern PDRIVER_OBJECT PciDriverObject;
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extern HAL_CALLBACKS PciHalCallbacks;
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extern PVOID PciSuspendRegistration;
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extern PVOID PciCodeLock;
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extern WCHAR rgzPCIDeviceName[];
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extern WCHAR rgzSuspendCallbackName[];
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extern WCHAR PCI_ID[];
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extern WCHAR PNP_VGA[];
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extern WCHAR PNP_IDE[];
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extern BOOLEAN PcipNoBusyFlag;
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extern ULONG PcipDeviceHandlerObjectSize;
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//
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// Prototypes
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//
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NTSTATUS
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DriverEntry(
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IN PDRIVER_OBJECT DriverObject,
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IN PUNICODE_STRING RegistryPath
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);
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NTSTATUS
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PciPortInitialize (
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PBUS_HANDLER PciBus
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);
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ULONG
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PcipGetBusData (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN PCI_SLOT_NUMBER SlotNumber,
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IN PUCHAR Buffer,
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IN ULONG Offset,
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IN ULONG Length
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);
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ULONG
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PcipGetDeviceData (
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IN struct _BUS_HANDLER *BusHandler,
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IN struct _BUS_HANDLER *RootHandler,
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IN PDEVICE_HANDLER_OBJECT DeviceHandler,
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IN ULONG DataType,
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IN PUCHAR Buffer,
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IN ULONG Offset,
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IN ULONG Length
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);
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ULONG
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PcipSetBusData (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN PCI_SLOT_NUMBER SlotNumber,
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IN PUCHAR Buffer,
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IN ULONG Offset,
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IN ULONG Length
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);
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ULONG
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PcipSetDeviceData (
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IN struct _BUS_HANDLER *BusHandler,
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IN struct _BUS_HANDLER *RootHandler,
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IN PDEVICE_HANDLER_OBJECT DeviceHandler,
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IN ULONG DataType,
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IN PUCHAR Buffer,
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IN ULONG Offset,
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IN ULONG Length
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);
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NTSTATUS
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PcipAssignSlotResources (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN PUNICODE_STRING RegistryPath,
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IN PUNICODE_STRING DriverClassName OPTIONAL,
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IN PDRIVER_OBJECT DriverObject,
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IN PDEVICE_OBJECT DeviceObject OPTIONAL,
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IN ULONG SlotNumber,
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IN OUT PCM_RESOURCE_LIST *AllocatedResources
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);
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NTSTATUS
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PcipQueryBusSlots (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN ULONG BufferSize,
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OUT PULONG SlotNumbers,
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OUT PULONG ReturnedLength
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);
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PDEVICE_HANDLER_OBJECT
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PcipReferenceDeviceHandler (
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IN struct _BUS_HANDLER *BusHandler,
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IN struct _BUS_HANDLER *RootHandler,
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IN PCI_SLOT_NUMBER SlotNumber
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);
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NTSTATUS
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PcipDeviceControl (
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IN PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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NTSTATUS
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PcipHibernateBus (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler
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);
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NTSTATUS
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PcipResumeBus (
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler
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);
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VOID
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PcipSuspendNotification (
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IN PVOID CallbackContext,
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IN PVOID Argument1,
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IN PVOID Argument2
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);
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VOID
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PcipStartWorker (
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VOID
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);
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VOID
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PcipControlWorker (
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IN PVOID WorkerContext
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);
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VOID
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PcipControlDpc (
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PKDPC Dpc,
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PVOID DeferredContext,
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PVOID SystemArgument1,
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PVOID SystemArgument2
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);
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VOID
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PcipDispatchControl (
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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BOOLEAN
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FASTCALL
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PciBCtlNone (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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BOOLEAN
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FASTCALL
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PciBCtlPower (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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BOOLEAN
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FASTCALL
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PciBCtlSync (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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BOOLEAN
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FASTCALL
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PciBCtlEject (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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BOOLEAN
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FASTCALL
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PciBCtlLock (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlEject (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlLock (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlPower (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlQueryDeviceId (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlQueryDeviceUniqueId (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlQueryDeviceResources (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlQueryDeviceResourceRequirements (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlSetDeviceResources (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlAssignSlotResources (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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BOOLEAN
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FASTCALL
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PciBCtlNone (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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BOOLEAN
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FASTCALL
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PciBCtlResume (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PciCtlForward (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PcipCompletePowerUp (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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VOID
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PcipCompleteDeviceControl (
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NTSTATUS Status,
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PHAL_DEVICE_CONTROL_CONTEXT Context,
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PDEVICE_DATA DeviceData
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);
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VOID
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PcipReadConfig (
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IN PBUS_HANDLER Handler,
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IN PDEVICE_DATA DeviceData,
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OUT PPCI_COMMON_CONFIG PciData
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);
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NTSTATUS
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PcipFlushConfig (
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IN PBUS_HANDLER Handler,
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IN PDEVICE_DATA DeviceData
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);
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BOOLEAN
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PcipCompareDecodes (
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IN PDEVICE_DATA DeviceData,
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IN PPCI_COMMON_CONFIG PciData,
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IN PPCI_COMMON_CONFIG PciData2
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);
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BOOLEAN
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PcipCalcBaseAddrPointers (
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IN PDEVICE_DATA DeviceData,
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IN PPCI_COMMON_CONFIG PciData,
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OUT PULONG *BaseAddress,
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OUT PULONG NoBaseAddress,
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OUT PULONG RomIndex
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);
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NTSTATUS
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PcipPowerDownSlot (
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PBUS_HANDLER Handler,
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PDEVICE_DATA DeviceData
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);
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VOID
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PciCtlCheckDevice (
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PDEVICE_DATA DeviceData,
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PHAL_DEVICE_CONTROL_CONTEXT Context
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);
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NTSTATUS
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PcipVerifyBarBits (
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PDEVICE_DATA DeviceData,
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PBUS_HANDLER Handler
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);
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NTSTATUS
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PcipGetBarBits (
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PDEVICE_DATA DeviceData,
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PBUS_HANDLER Handler
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);
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PDEVICE_DATA
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PcipFindDeviceData (
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IN PPCI_PORT PciPort,
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IN PCI_SLOT_NUMBER SlotNumber
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);
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VOID
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PcipCheckBus (
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PPCI_PORT PciPort,
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BOOLEAN Initialize
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);
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BOOLEAN
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PcipCrackBAR (
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IN PULONG *BaseAddress,
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IN PULONG BarBits,
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IN OUT PULONG Index,
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OUT PLONGLONG pbase,
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OUT PLONGLONG plength,
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OUT PLONGLONG pmax
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);
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NTSTATUS
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BugBugSubclass (
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VOID
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);
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