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1156 lines
25 KiB
1156 lines
25 KiB
/*++
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Copyright (c) 1994 Microsoft Corporation
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Module Name:
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x86bios.c
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Abstract:
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This module implements the platform specific interface between a device
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driver and the execution of x86 ROM bios code for the device.
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Author:
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David N. Cutler (davec) 17-Jun-1994
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Environment:
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Kernel mode only.
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Revision History:
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9/26/95 Steve Johns - Motorola
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- Don't scan last PCI slot if PowerStack
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- Don't execute PCI ROM if BaseClass indicates not video
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3/29/96 Scott Geranen - Motorola
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- call PCI BIOS with bus/dev/func arguments
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--*/
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#define USE_BIOS_EMULATOR
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#include "halp.h"
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#include "xm86.h"
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#include "x86new.h"
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#include "pxpcisup.h"
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#include "pxsystyp.h"
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#include "pci.h"
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extern ULONG HalpPciMaxSlots;
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extern ULONG HalpPciConfigSize;
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//
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// Define global data.
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//
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ULONG HalpX86BiosInitialized = FALSE;
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ULONG HalpEnableInt10Calls = FALSE;
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PVOID HalpIoMemoryBase = NULL;
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PUCHAR HalpRomBase = NULL;
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UCHAR HalpVideoBus; // Used as arguments to the PCI BIOS
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UCHAR HalpVideoDevice; // init function. Set HalpInitX86Emulator,
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UCHAR HalpVideoFunction; // used by HalpInitializeX86DisplayAdapter.
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UCHAR HalpLastPciBus; // Set by scanning the configuration data and
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// used by PCI BIOS eumulation code.
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//
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// The MPC105 and the IBM27-82660 map the device number to the AD
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// line differently. This value is used to compensate for the
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// difference. Any HAL #including this file should set this value
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// appropriately. Note that this value is subtracted from the
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// computed AD line.
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//
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#ifndef PCI_DEVICE_NUMBER_OFFSET
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#define PCI_DEVICE_NUMBER_OFFSET 0 // default value for eagle
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#endif
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ULONG ROM_Length;
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#define BUFFER_SIZE (64*1024)
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UCHAR ROM_Buffer[BUFFER_SIZE];
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BOOLEAN HalpInitX86Emulator(
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VOID)
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{
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ULONG ROM_size = 0;
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PHYSICAL_ADDRESS PhysAddr;
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USHORT Cmd, VendorID;
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ULONG Slot, EndSlot;
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PVOID HalpVideoConfigBase;
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PUCHAR ROM_Ptr, ROM_Shadow;
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ULONG i;
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UCHAR BaseClass;
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PhysAddr.HighPart = 0x00000000;
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EndSlot = HalpPciMaxSlots;
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if (HalpSystemType == MOTOROLA_POWERSTACK)
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EndSlot--;
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//
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// Scan PCI slots for video BIOS ROMs, except 2 PCI "slots" on motherboard
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//
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for (Slot = 2; Slot < EndSlot; Slot++) {
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//
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// Create a mapping to PCI configuration space
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//
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if( HalpPciConfigBase == NULL) {
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HalpPciConfigBase = KePhase0MapIo(PCI_CONFIG_PHYSICAL_BASE, HalpPciConfigSize);
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if (HalpPciConfigBase == NULL) {
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DbgPrint("\nCan't create mapping to PCI Configuration Space\n");
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return FALSE;
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}
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}
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HalpVideoConfigBase = (PVOID) ((ULONG) HalpPciConfigBase + HalpPciConfigSlot[Slot]);
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//
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// Read Vendor ID and check if slot is empty
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//
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VendorID = READ_REGISTER_USHORT(&((PCI_CONFIG)HalpVideoConfigBase)->VendorID);
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if (VendorID == 0xFFFF)
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continue; // Slot is empty; go to next slot
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//
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// If Base Class does not indicate video, go to next slot
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//
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BaseClass = READ_REGISTER_UCHAR(&((PCI_CONFIG)HalpVideoConfigBase)->ClassCode[2]);
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if (BaseClass != 0 && BaseClass != 3)
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continue;
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//
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// Get size of ROM
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//
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WRITE_REGISTER_ULONG(&((PCI_CONFIG)HalpVideoConfigBase)->ROMbase, 0xFFFFFFFF);
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ROM_size = READ_REGISTER_ULONG(&((PCI_CONFIG)HalpVideoConfigBase)->ROMbase);
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if ((ROM_size != 0xFFFFFFFF) && (ROM_size != 0)) {
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ROM_size = 0xD0000; // Map to end of option ROM space
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//
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// Set Expansion ROM Base Address & enable ROM
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//
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PhysAddr.LowPart = 0x000C0000 | 1;
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WRITE_REGISTER_ULONG(&((PCI_CONFIG)HalpVideoConfigBase)->ROMbase, PhysAddr.LowPart);
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//
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// Enable Memory & I/O spaces in command register
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//
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Cmd = READ_REGISTER_USHORT(&((PCI_CONFIG)HalpVideoConfigBase)->Command);
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WRITE_REGISTER_USHORT(&((PCI_CONFIG)HalpVideoConfigBase)->Command, Cmd | 3);
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//
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// Delete the mapping to PCI config space
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//
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HalpPciConfigBase = HalpVideoConfigBase = NULL;
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KePhase0DeleteIoMap( PCI_CONFIG_PHYSICAL_BASE, HalpPciConfigSize);
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//
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// Create a mapping to the PCI memory space
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//
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HalpIoMemoryBase = KePhase0MapIo(PCI_MEMORY_BASE, ROM_size);
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if (HalpIoMemoryBase == NULL) {
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DbgPrint("\nCan't create mapping to PCI memory space\n");
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return FALSE;
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}
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//
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// Look for PCI option video ROM signature
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//
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HalpRomBase = ROM_Ptr = (PUCHAR) HalpIoMemoryBase + 0xC0000;
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if (*ROM_Ptr == 0x55 && *(ROM_Ptr+1) == 0xAA) {
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//
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// Copy ROM to RAM. PCI Spec says you can't execute from ROM.
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// Sometimes option ROM and video RAM can't co-exist.
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//
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ROM_Length = *(ROM_Ptr+2) << 9;
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if (ROM_Length <= BUFFER_SIZE) {
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for (i=0; i<ROM_Length; i++)
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ROM_Buffer[i] = *ROM_Ptr++;
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HalpRomBase = (PUCHAR) ROM_Buffer;
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}
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//
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// Setup the PCI location for calling the BIOS init code.
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// "Slot" needs to be translated into the device number
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// suitable for CF8/CFC config accesses. In this case,
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// if bit 11 set, dev = 11, etc.
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//
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HalpVideoBus = 0;
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HalpVideoFunction = 0;
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i = HalpPciConfigSlot[Slot] >> 1;
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HalpVideoDevice = 0;
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while (i) {
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HalpVideoDevice++;
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i >>= 1;
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}
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HalpVideoDevice -= PCI_DEVICE_NUMBER_OFFSET;
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return TRUE; // Exit slot scan after finding 1st option ROM
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}
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//
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// Delete mapping to PCI memory space
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//
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HalpIoMemoryBase = NULL;
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KePhase0DeleteIoMap(PCI_MEMORY_BASE, HalpPciConfigSize);
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//
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// Restore PCI command register
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//
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HalpPciConfigBase = KePhase0MapIo(PCI_CONFIG_PHYSICAL_BASE, HalpPciConfigSize);
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if (HalpPciConfigBase == NULL) {
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DbgPrint("\nCan't create mapping to PCI Configuration Space\n");
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return FALSE;
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}
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HalpVideoConfigBase = (PVOID) ((ULONG) HalpPciConfigBase + HalpPciConfigSlot[Slot]);
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WRITE_REGISTER_USHORT(&((PCI_CONFIG)HalpVideoConfigBase)->Command, Cmd);
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} // end of if clause
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} // end of for loop
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//
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// Delete mapping to PCI config space
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//
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if (HalpPciConfigBase) {
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HalpPciConfigBase = NULL;
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KePhase0DeleteIoMap(PCI_CONFIG_PHYSICAL_BASE, HalpPciConfigSize);
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}
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//
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// Create a mapping to ISA memory space, unless one already exists
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//
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if (HalpIoMemoryBase == NULL) {
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HalpIoMemoryBase = KePhase0MapIo(PCI_MEMORY_BASE, ROM_size);
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}
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if (HalpIoMemoryBase == NULL) {
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return FALSE;
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} else {
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//
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// Look for ISA option video ROM signature
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//
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ROM_Ptr = (PUCHAR) HalpIoMemoryBase + 0xC0000;
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HalpRomBase = ROM_Ptr;
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if (*ROM_Ptr == 0x55 && *(ROM_Ptr+1) == 0xAA) {
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//
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// Copy ROM to RAM. PCI Spec says you can't execute from ROM.
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// ROM and video RAM sometimes can't co-exist.
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//
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ROM_Length = *(ROM_Ptr+2) << 9;
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if (ROM_Length <= BUFFER_SIZE) {
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for (i=0; i<ROM_Length; i++)
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ROM_Buffer[i] = *ROM_Ptr++;
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HalpRomBase = (PUCHAR) ROM_Buffer;
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}
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return TRUE;
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}
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//
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// No video option ROM was found. Delete mapping to PCI memory space.
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//
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KePhase0DeleteIoMap(PCI_MEMORY_BASE, ROM_size);
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return FALSE;
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}
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}
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BOOLEAN
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HalCallBios (
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IN ULONG BiosCommand,
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IN OUT PULONG Eax,
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IN OUT PULONG Ebx,
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IN OUT PULONG Ecx,
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IN OUT PULONG Edx,
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IN OUT PULONG Esi,
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IN OUT PULONG Edi,
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IN OUT PULONG Ebp
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)
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/*++
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Routine Description:
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This function provides the platform specific interface between a device
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driver and the execution of the x86 ROM bios code for the specified ROM
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bios command.
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Arguments:
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BiosCommand - Supplies the ROM bios command to be emulated.
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Eax to Ebp - Supplies the x86 emulation context.
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Return Value:
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A value of TRUE is returned if the specified function is executed.
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Otherwise, a value of FALSE is returned.
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--*/
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{
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#if defined(USE_BIOS_EMULATOR)
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XM86_CONTEXT Context;
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//
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// If the x86 BIOS Emulator has not been initialized, then return FALSE.
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//
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if (HalpX86BiosInitialized == FALSE) {
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return FALSE;
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}
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//
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// If the Video Adapter initialization failed and an Int10 command is
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// specified, then return FALSE.
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//
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if ((BiosCommand == 0x10) && (HalpEnableInt10Calls == FALSE)) {
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return FALSE;
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}
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//
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// Copy the x86 bios context and emulate the specified command.
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//
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Context.Eax = *Eax;
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Context.Ebx = *Ebx;
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Context.Ecx = *Ecx;
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Context.Edx = *Edx;
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Context.Esi = *Esi;
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Context.Edi = *Edi;
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Context.Ebp = *Ebp;
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if (x86BiosExecuteInterrupt((UCHAR)BiosCommand,
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&Context,
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HalpIoControlBase,
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HalpIoMemoryBase) != XM_SUCCESS) {
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return FALSE;
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}
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//
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// Copy the x86 bios context and return TRUE.
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//
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*Eax = Context.Eax;
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*Ebx = Context.Ebx;
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*Ecx = Context.Ecx;
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*Edx = Context.Edx;
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*Esi = Context.Esi;
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*Edi = Context.Edi;
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*Ebp = Context.Ebp;
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return TRUE;
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#else
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return FALSE;
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#endif
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}
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BOOLEAN
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HalpInitializeX86DisplayAdapter(
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IN PLOADER_PARAMETER_BLOCK LoaderBlock
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)
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/*++
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Routine Description:
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This function initializes a display adapter using the x86 bios emulator.
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Arguments:
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LoaderBlock for access to the number of PCI buses
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Return Value:
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None.
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--*/
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{
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#if defined(USE_BIOS_EMULATOR)
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PCONFIGURATION_COMPONENT_DATA ConfigurationEntry;
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PPCI_REGISTRY_INFO PCIRegInfo;
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ULONG MatchKey;
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PCM_PARTIAL_RESOURCE_LIST Descriptor;
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PCM_PARTIAL_RESOURCE_DESCRIPTOR Partial;
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XM86_CONTEXT State;
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//
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// If EISA I/O Ports or EISA memory could not be mapped, then don't
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// attempt to initialize the display adapter.
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//
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if (!HalpInitX86Emulator())
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return FALSE;
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if (HalpIoControlBase == NULL || HalpIoMemoryBase == NULL) {
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return FALSE;
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}
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//
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// Get the number of PCI buses for the PCI BIOS functions
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//
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//
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// Find the PCI info in the config data.
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//
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HalpLastPciBus = 0;
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MatchKey = 0;
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while ((ConfigurationEntry=KeFindConfigurationEntry(LoaderBlock->ConfigurationRoot,
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AdapterClass, MultiFunctionAdapter, &MatchKey)) != NULL) {
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if (!strcmp(ConfigurationEntry->ComponentEntry.Identifier,"PCI")) {
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Descriptor = (PCM_PARTIAL_RESOURCE_LIST)ConfigurationEntry->ConfigurationData;
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PCIRegInfo = (PPCI_REGISTRY_INFO)&Descriptor->PartialDescriptors[1];
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HalpLastPciBus = PCIRegInfo->NoBuses - 1;
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break;
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}
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MatchKey++;
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}
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//
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// Initialize the x86 bios emulator.
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//
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x86BiosInitializeBios(HalpIoControlBase, HalpIoMemoryBase);
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HalpX86BiosInitialized = TRUE;
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//
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// Attempt to initialize the display adapter by executing its ROM bios
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// code. The standard ROM bios code address for PC video adapters is
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// 0xC000:0000 on the ISA bus.
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//
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State.Eax = (HalpVideoBus << 8) |
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(HalpVideoDevice << 3) |
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HalpVideoFunction;
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State.Ecx = 0;
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State.Edx = 0;
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State.Ebx = 0;
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State.Ebp = 0;
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State.Esi = 0;
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State.Edi = 0;
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if (x86BiosInitializeAdapter(0xc0000, &State, HalpIoControlBase, HalpIoMemoryBase) != XM_SUCCESS) {
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HalpEnableInt10Calls = FALSE;
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return FALSE;
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}
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HalpEnableInt10Calls = TRUE;
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#endif
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return TRUE;
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}
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VOID
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HalpResetX86DisplayAdapter(
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VOID
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)
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/*++
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Routine Description:
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This function resets a display adapter using the x86 bios emulator.
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Arguments:
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None.
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Return Value:
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None.
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--*/
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{
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#if defined(USE_BIOS_EMULATOR)
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XM86_CONTEXT Context;
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//
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// Initialize the x86 bios context and make the INT 10 call to initialize
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// the display adapter to 80x25 color text mode.
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//
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Context.Eax = 0x0003; // Function 0, Mode 3
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Context.Ebx = 0;
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Context.Ecx = 0;
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Context.Edx = 0;
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Context.Esi = 0;
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Context.Edi = 0;
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Context.Ebp = 0;
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HalCallBios(0x10,
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&Context.Eax,
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&Context.Ebx,
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&Context.Ecx,
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&Context.Edx,
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&Context.Esi,
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&Context.Edi,
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&Context.Ebp);
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#endif
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return;
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}
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//
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// This code came from ..\..\x86new\x86bios.c
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//
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#define LOW_MEMORY_SIZE 0x800
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extern UCHAR x86BiosLowMemory[LOW_MEMORY_SIZE + 3];
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extern ULONG x86BiosScratchMemory;
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extern ULONG x86BiosIoMemory;
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extern ULONG x86BiosIoSpace;
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PVOID
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x86BiosTranslateAddress (
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IN USHORT Segment,
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IN USHORT Offset
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)
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|
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/*++
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Routine Description:
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This translates a segment/offset address into a memory address.
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Arguments:
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Segment - Supplies the segment register value.
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Offset - Supplies the offset within segment.
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Return Value:
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The memory address of the translated segment/offset pair is
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returned as the function value.
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--*/
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{
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ULONG Value;
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//
|
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// Compute the logical memory address and case on high hex digit of
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// the resultant address.
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//
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Value = Offset + (Segment << 4);
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Offset = (USHORT)(Value & 0xffff);
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Value &= 0xf0000;
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switch ((Value >> 16) & 0xf) {
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|
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//
|
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// Interrupt vector/stack space.
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//
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case 0x0:
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if (Offset > LOW_MEMORY_SIZE) {
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x86BiosScratchMemory = 0;
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return (PVOID)&x86BiosScratchMemory;
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|
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} else {
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return (PVOID)(&x86BiosLowMemory[0] + Offset);
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}
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|
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//
|
|
// The memory range from 0x10000 to 0x9ffff reads as zero
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// and writes are ignored.
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//
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|
|
case 0x1:
|
|
case 0x2:
|
|
case 0x3:
|
|
case 0x4:
|
|
case 0x5:
|
|
case 0x6:
|
|
case 0x7:
|
|
case 0x8:
|
|
case 0x9:
|
|
x86BiosScratchMemory = 0;
|
|
return (PVOID)&x86BiosScratchMemory;
|
|
|
|
//
|
|
// The memory range from 0xa0000 to 0xdffff maps to I/O memory.
|
|
//
|
|
|
|
case 0xa:
|
|
case 0xb:
|
|
return (PVOID)(x86BiosIoMemory + Offset + Value);
|
|
|
|
case 0xc:
|
|
case 0xd:
|
|
return (PVOID)(HalpRomBase + Offset);
|
|
|
|
//
|
|
// The memory range from 0x10000 to 0x9ffff reads as zero
|
|
// and writes are ignored.
|
|
//
|
|
|
|
case 0xe:
|
|
case 0xf:
|
|
x86BiosScratchMemory = 0;
|
|
return (PVOID)&x86BiosScratchMemory;
|
|
}
|
|
|
|
// NOT REACHED - NOT EXECUTED - Prevents Compiler Warning.
|
|
return (PVOID)NULL;
|
|
}
|
|
|
|
|
|
VOID HalpCopyROMs(VOID)
|
|
{
|
|
ULONG i;
|
|
PUCHAR ROM_Shadow;
|
|
|
|
if (ROM_Buffer[0] == 0x55 && ROM_Buffer[1] == 0xAA) {
|
|
HalpRomBase = ROM_Shadow = ExAllocatePool(NonPagedPool, ROM_Length);
|
|
for (i=0; i<ROM_Length; i++) {
|
|
*ROM_Shadow++ = ROM_Buffer[i];
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/****Include File x86new\x86bios.c Here - except the routine x86BiosTranslateAddress. ****/
|
|
|
|
/*++
|
|
|
|
Copyright (c) 1994 Microsoft Corporation
|
|
|
|
Module Name:
|
|
|
|
x86bios.c
|
|
|
|
Abstract:
|
|
|
|
This module implements supplies the HAL interface to the 386/486
|
|
real mode emulator for the purpose of emulating BIOS calls..
|
|
|
|
Author:
|
|
|
|
David N. Cutler (davec) 13-Nov-1994
|
|
|
|
Environment:
|
|
|
|
Kernel mode only.
|
|
|
|
Revision History:
|
|
|
|
--*/
|
|
|
|
#include "nthal.h"
|
|
#include "hal.h"
|
|
#include "xm86.h"
|
|
#include "x86new.h"
|
|
|
|
//
|
|
// Define the size of low memory.
|
|
//
|
|
|
|
#define LOW_MEMORY_SIZE 0x800
|
|
//
|
|
// Define storage for low emulated memory.
|
|
//
|
|
|
|
UCHAR x86BiosLowMemory[LOW_MEMORY_SIZE + 3];
|
|
ULONG x86BiosScratchMemory;
|
|
|
|
//
|
|
// Define storage to capture the base address of I/O space and the
|
|
// base address of I/O memory space.
|
|
//
|
|
|
|
ULONG x86BiosIoMemory;
|
|
ULONG x86BiosIoSpace;
|
|
|
|
//
|
|
// Define BIOS initialized state.
|
|
//
|
|
|
|
BOOLEAN x86BiosInitialized = FALSE;
|
|
|
|
//
|
|
// Hardware Configuration Mechanism #1 emulation.
|
|
//
|
|
// The eagle does not distinguish between CF8 and CFC on reads.
|
|
// At least one BIOS we know of writes/reads CF8 to see if HW
|
|
// mechanism 1 is implemented.
|
|
//
|
|
ULONG x86CF8Shadow;
|
|
|
|
//
|
|
// Hardware Configuration Mechanism #2 emulation.
|
|
//
|
|
static struct {
|
|
UCHAR CSE;
|
|
UCHAR Forward;
|
|
} x86ConfigMechanism2 = { 0, 0};
|
|
|
|
ULONG
|
|
x86BiosReadIoSpace (
|
|
IN XM_OPERATION_DATATYPE DataType,
|
|
IN USHORT PortNumber
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This function reads from emulated I/O space.
|
|
|
|
Arguments:
|
|
|
|
DataType - Supplies the datatype for the read operation.
|
|
|
|
PortNumber - Supplies the port number in I/O space to read from.
|
|
|
|
Return Value:
|
|
|
|
The value read from I/O space is returned as the function value.
|
|
|
|
N.B. If an aligned operation is specified, then the individual
|
|
bytes are read from the specified port one at a time and
|
|
assembled into the specified datatype.
|
|
|
|
--*/
|
|
|
|
{
|
|
|
|
ULONG Result;
|
|
|
|
union {
|
|
PUCHAR Byte;
|
|
PUSHORT Word;
|
|
PULONG Long;
|
|
} u;
|
|
|
|
//
|
|
// Convert mechanism #2 config accesses to mechanism #1.
|
|
//
|
|
if (((PortNumber & 0xF000) == 0xC000) &&
|
|
((x86ConfigMechanism2.CSE & 0xF0) != 0)) {
|
|
|
|
WRITE_REGISTER_ULONG(x86BiosIoSpace + 0xCF8,
|
|
(1 << 31) | // Enable
|
|
(x86ConfigMechanism2.Forward << 16) | // Bus
|
|
((((PortNumber & 0x0F00) >> 8) + 11) << 11) | // Dev
|
|
(((x86ConfigMechanism2.CSE & 0x0E) >> 1) << 8) | // Function
|
|
(PortNumber & 0x00FC) // Register
|
|
);
|
|
|
|
PortNumber = 0xCFC + (PortNumber & 3); // convert to config data port
|
|
// and let code below do the rest
|
|
}
|
|
|
|
//
|
|
// Compute port address and read port.
|
|
//
|
|
|
|
u.Long = (PULONG)(x86BiosIoSpace + PortNumber);
|
|
if (DataType == BYTE_DATA) {
|
|
//
|
|
// Emulate config mechanism #2
|
|
//
|
|
if (PortNumber == 0xCF8) {
|
|
Result = x86ConfigMechanism2.CSE;
|
|
} else if (PortNumber == 0xCFA) {
|
|
Result = x86ConfigMechanism2.Forward;
|
|
} else {
|
|
Result = READ_REGISTER_UCHAR(u.Byte);
|
|
}
|
|
|
|
} else if (DataType == LONG_DATA) {
|
|
if (((ULONG)u.Long & 0x3) != 0) {
|
|
Result = (READ_REGISTER_UCHAR(u.Byte + 0)) |
|
|
(READ_REGISTER_UCHAR(u.Byte + 1) << 8) |
|
|
(READ_REGISTER_UCHAR(u.Byte + 2) << 16) |
|
|
(READ_REGISTER_UCHAR(u.Byte + 3) << 24);
|
|
|
|
} else {
|
|
//
|
|
// Watch out for reads from CF8, the eagle will generate a config
|
|
// cycle rather than returning the contents of the CONFIG_ADDR reg.
|
|
//
|
|
if (PortNumber == 0xCF8) {
|
|
|
|
Result = x86CF8Shadow;
|
|
|
|
} else {
|
|
|
|
Result = READ_REGISTER_ULONG(u.Long);
|
|
}
|
|
}
|
|
|
|
} else {
|
|
if (((ULONG)u.Word & 0x1) != 0) {
|
|
Result = (READ_REGISTER_UCHAR(u.Byte + 0)) |
|
|
(READ_REGISTER_UCHAR(u.Byte + 1) << 8);
|
|
|
|
} else {
|
|
Result = READ_REGISTER_USHORT(u.Word);
|
|
}
|
|
}
|
|
|
|
return Result;
|
|
}
|
|
|
|
VOID
|
|
x86BiosWriteIoSpace (
|
|
IN XM_OPERATION_DATATYPE DataType,
|
|
IN USHORT PortNumber,
|
|
IN ULONG Value
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This function write to emulated I/O space.
|
|
|
|
N.B. If an aligned operation is specified, then the individual
|
|
bytes are written to the specified port one at a time.
|
|
|
|
Arguments:
|
|
|
|
DataType - Supplies the datatype for the write operation.
|
|
|
|
PortNumber - Supplies the port number in I/O space to write to.
|
|
|
|
Value - Supplies the value to write.
|
|
|
|
Return Value:
|
|
|
|
None.
|
|
|
|
--*/
|
|
|
|
{
|
|
|
|
union {
|
|
PUCHAR Byte;
|
|
PUSHORT Word;
|
|
PULONG Long;
|
|
} u;
|
|
|
|
//
|
|
// Convert mechanism #2 config accesses to mechanism #1.
|
|
//
|
|
if (((PortNumber & 0xF000) == 0xC000) &&
|
|
((x86ConfigMechanism2.CSE & 0xF0) != 0)) {
|
|
|
|
WRITE_REGISTER_ULONG(x86BiosIoSpace + 0xCF8,
|
|
(1 << 31) | // Enable
|
|
(x86ConfigMechanism2.Forward << 16) | // Bus
|
|
((((PortNumber & 0x0F00) >> 8) + 11) << 11) | // Dev
|
|
(((x86ConfigMechanism2.CSE & 0x0E) >> 1) << 8) | // Function
|
|
(PortNumber & 0x00FC) // Register
|
|
);
|
|
|
|
PortNumber = 0xCFC + (PortNumber & 3); // convert to config data port
|
|
// and let code below do the rest
|
|
}
|
|
|
|
//
|
|
// Compute port address and read port.
|
|
//
|
|
|
|
u.Long = (PULONG)(x86BiosIoSpace + PortNumber);
|
|
if (DataType == BYTE_DATA) {
|
|
//
|
|
// Emulate config mechanism #2
|
|
//
|
|
if (PortNumber == 0xCF8) {
|
|
x86ConfigMechanism2.CSE = (UCHAR)Value;
|
|
} else if (PortNumber == 0xCFA) {
|
|
x86ConfigMechanism2.Forward = (UCHAR)Value;
|
|
} else {
|
|
WRITE_REGISTER_UCHAR(u.Byte, (UCHAR)Value);
|
|
}
|
|
|
|
} else if (DataType == LONG_DATA) {
|
|
if (((ULONG)u.Long & 0x3) != 0) {
|
|
WRITE_REGISTER_UCHAR(u.Byte + 0, (UCHAR)(Value));
|
|
WRITE_REGISTER_UCHAR(u.Byte + 1, (UCHAR)(Value >> 8));
|
|
WRITE_REGISTER_UCHAR(u.Byte + 2, (UCHAR)(Value >> 16));
|
|
WRITE_REGISTER_UCHAR(u.Byte + 3, (UCHAR)(Value >> 24));
|
|
|
|
} else {
|
|
WRITE_REGISTER_ULONG(u.Long, Value);
|
|
|
|
//
|
|
// Shadow writes to CF8.
|
|
//
|
|
if (PortNumber == 0xCF8) {
|
|
x86CF8Shadow = Value;
|
|
}
|
|
}
|
|
|
|
} else {
|
|
if (((ULONG)u.Word & 0x1) != 0) {
|
|
WRITE_REGISTER_UCHAR(u.Byte + 0, (UCHAR)(Value));
|
|
WRITE_REGISTER_UCHAR(u.Byte + 1, (UCHAR)(Value >> 8));
|
|
|
|
} else {
|
|
WRITE_REGISTER_USHORT(u.Word, (USHORT)Value);
|
|
}
|
|
}
|
|
|
|
return;
|
|
}
|
|
|
|
VOID
|
|
x86BiosInitializeBios (
|
|
IN PVOID BiosIoSpace,
|
|
IN PVOID BiosIoMemory
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This function initializes x86 BIOS emulation.
|
|
|
|
Arguments:
|
|
|
|
BiosIoSpace - Supplies the base address of the I/O space to be used
|
|
for BIOS emulation.
|
|
|
|
BiosIoMemory - Supplies the base address of the I/O memory to be
|
|
used for BIOS emulation.
|
|
|
|
Return Value:
|
|
|
|
None.
|
|
|
|
--*/
|
|
|
|
{
|
|
|
|
//
|
|
// Zero low memory.
|
|
//
|
|
|
|
memset(&x86BiosLowMemory, 0, LOW_MEMORY_SIZE);
|
|
|
|
//
|
|
// Save base address of I/O memory and I/O space.
|
|
//
|
|
|
|
x86BiosIoSpace = (ULONG)BiosIoSpace;
|
|
x86BiosIoMemory = (ULONG)BiosIoMemory;
|
|
|
|
//
|
|
// Initialize the emulator and the BIOS.
|
|
//
|
|
|
|
XmInitializeEmulator(0,
|
|
LOW_MEMORY_SIZE,
|
|
x86BiosReadIoSpace,
|
|
x86BiosWriteIoSpace,
|
|
x86BiosTranslateAddress);
|
|
|
|
x86BiosInitialized = TRUE;
|
|
return;
|
|
}
|
|
|
|
XM_STATUS
|
|
x86BiosExecuteInterrupt (
|
|
IN UCHAR Number,
|
|
IN OUT PXM86_CONTEXT Context,
|
|
IN PVOID BiosIoSpace OPTIONAL,
|
|
IN PVOID BiosIoMemory OPTIONAL
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This function executes an interrupt by calling the x86 emulator.
|
|
|
|
Arguments:
|
|
|
|
Number - Supplies the number of the interrupt that is to be emulated.
|
|
|
|
Context - Supplies a pointer to an x86 context structure.
|
|
|
|
Return Value:
|
|
|
|
The emulation completion status.
|
|
|
|
--*/
|
|
|
|
{
|
|
|
|
XM_STATUS Status;
|
|
|
|
//
|
|
// If a new base address is specified, then set the appropriate base.
|
|
//
|
|
|
|
if (BiosIoSpace != NULL) {
|
|
x86BiosIoSpace = (ULONG)BiosIoSpace;
|
|
}
|
|
|
|
if (BiosIoMemory != NULL) {
|
|
x86BiosIoMemory = (ULONG)BiosIoMemory;
|
|
}
|
|
|
|
//
|
|
// Execute the specified interrupt.
|
|
//
|
|
|
|
Status = XmEmulateInterrupt(Number, Context);
|
|
if (Status != XM_SUCCESS) {
|
|
DbgPrint("HAL: Interrupt emulation failed, status %lx\n", Status);
|
|
}
|
|
|
|
return Status;
|
|
}
|
|
|
|
XM_STATUS
|
|
x86BiosInitializeAdapter (
|
|
IN ULONG Adapter,
|
|
IN OUT PXM86_CONTEXT Context OPTIONAL,
|
|
IN PVOID BiosIoSpace OPTIONAL,
|
|
IN PVOID BiosIoMemory OPTIONAL
|
|
)
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
This function initializes the adapter whose BIOS starts at the
|
|
specified 20-bit address.
|
|
|
|
Arguments:
|
|
|
|
Adpater - Supplies the 20-bit address of the BIOS for the adapter
|
|
to be initialized.
|
|
|
|
Return Value:
|
|
|
|
The emulation completion status.
|
|
|
|
--*/
|
|
|
|
{
|
|
|
|
PUCHAR Byte;
|
|
XM86_CONTEXT State;
|
|
USHORT Offset;
|
|
USHORT Segment;
|
|
XM_STATUS Status;
|
|
|
|
//
|
|
// If BIOS emulation has not been initialized, then return an error.
|
|
//
|
|
|
|
if (x86BiosInitialized == FALSE) {
|
|
return XM_EMULATOR_NOT_INITIALIZED;
|
|
}
|
|
|
|
//
|
|
// If an emulator context is not specified, then use a default
|
|
// context.
|
|
//
|
|
|
|
if (ARGUMENT_PRESENT(Context) == FALSE) {
|
|
State.Eax = 0;
|
|
State.Ecx = 0;
|
|
State.Edx = 0;
|
|
State.Ebx = 0;
|
|
State.Ebp = 0;
|
|
State.Esi = 0;
|
|
State.Edi = 0;
|
|
Context = &State;
|
|
}
|
|
|
|
//
|
|
// If a new base address is specified, then set the appropriate base.
|
|
//
|
|
|
|
if (BiosIoSpace != NULL) {
|
|
x86BiosIoSpace = (ULONG)BiosIoSpace;
|
|
}
|
|
|
|
if (BiosIoMemory != NULL) {
|
|
x86BiosIoMemory = (ULONG)BiosIoMemory;
|
|
}
|
|
|
|
//
|
|
// If the specified adpater is not BIOS code, then return an error.
|
|
//
|
|
|
|
Segment = (USHORT)((Adapter >> 4) & 0xf000);
|
|
Offset = (USHORT)(Adapter & 0xffff);
|
|
Byte = (PUCHAR)x86BiosTranslateAddress(Segment, Offset);
|
|
if ((*Byte++ != 0x55) || (*Byte != 0xaa)) {
|
|
return XM_ILLEGAL_CODE_SEGMENT;
|
|
}
|
|
|
|
//
|
|
// Call the BIOS code to initialize the specified adapter.
|
|
//
|
|
|
|
Adapter += 3;
|
|
Segment = (USHORT)((Adapter >> 4) & 0xf000);
|
|
Offset = (USHORT)(Adapter & 0xffff);
|
|
Status = XmEmulateFarCall(Segment, Offset, Context);
|
|
if (Status != XM_SUCCESS) {
|
|
DbgPrint("HAL: Adapter initialization falied, status %lx\n", Status);
|
|
}
|
|
|
|
return Status;
|
|
}
|
|
|