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134 lines
3.6 KiB
134 lines
3.6 KiB
/*++
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Copyright (c) 1993 Digital Equipment Corporation
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Module Name:
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eb64pdef.h
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Abstract:
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This module specifies platform-specific definitions for the
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EB64+ and AlphaPC64 modules.
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Author:
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Joe Notarangelo 25-Oct-1993
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Revision History:
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Jeff Wiedemeier [DEC] December 1994
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Adapted for AlphaPC64 from eb64pdef.h
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Dick Bissen [DEC] 12-May-1994
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Added defines so both passes of the EB64Plus modules can be supported.
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--*/
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#ifndef _EB64PDEF_H_
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#define _EB64PDEF_H_
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#include "alpharef.h"
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#include "axp21064.h"
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#include "apecs.h"
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#include "isaaddr.h"
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#define NUMBER_ISA_SLOTS 3
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#define NUMBER_PCI_SLOTS 4
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// Highest Virtual local PCI Slot is 9 == IDSEL PCI_AD[20]
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#define PCI_MAX_LOCAL_DEVICE (PCI_MAX_DEVICES - 1)
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// Highest PCI interrupt vector is in ISA Vector Space
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#define PCI_MAX_INTERRUPT_VECTOR (MAXIMUM_PCI_VECTOR - PCI_VECTORS)
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#define ALPHAPC64_INTERRUPT_MASK0_QVA \
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((PUCHAR)HAL_MAKE_QVA(APECS_PCI_IO_BASE_PHYSICAL) + 0x804)
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#define ALPHAPC64_INTERRUPT_MASK1_QVA \
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((PUCHAR)HAL_MAKE_QVA(APECS_PCI_IO_BASE_PHYSICAL) + 0x805)
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#define ALPHAPC64_INTERRUPT_MASK2_QVA \
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((PUCHAR)HAL_MAKE_QVA(APECS_PCI_IO_BASE_PHYSICAL) + 0x806)
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#define ALPHAPC64_SIO_INTERRUPT_MASK 0x10
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#define EB64P_INTERRUPT_MASK0_QVA \
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((PUCHAR)HAL_MAKE_QVA(APECS_PCI_IO_BASE_PHYSICAL) + 0x26)
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#define EB64P_INTERRUPT_MASK1_QVA \
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((PUCHAR)HAL_MAKE_QVA(APECS_PCI_IO_BASE_PHYSICAL) + 0x27)
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#define EB64P_INTERRUPT_MASK2_QVA NULL
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#define EB64P_SIO_INTERRUPT_MASK 0x20
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extern PVOID INTERRUPT_MASK0_QVA;
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extern PVOID INTERRUPT_MASK1_QVA;
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extern PVOID INTERRUPT_MASK2_QVA;
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extern ULONG SIO_INTERRUPT_MASK;
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//
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// Define the per-processor data structures allocated in the PCR
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// for each EV4 processor.
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//
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#if !defined (_LANGUAGE_ASSEMBLY)
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typedef struct _EB64P_PCR {
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ULONGLONG HalpCycleCount; // 64-bit per-processor cycle count
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EV4ProfileCount ProfileCount; // Profile counter state, do not move
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EV4IrqStatus IrqStatusTable[MaximumIrq]; // Irq status table
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} EB64P_PCR, *PEB64P_PCR;
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#define HAL_PCR ( (PEB64P_PCR)(&(PCR->HalReserved)) )
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#define PCI_SPARSE_IO_BASE_QVA \
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((ULONG)(HAL_MAKE_QVA(APECS_PCI_IO_BASE_PHYSICAL)))
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#define PCI_SPARSE_MEMORY_BASE_QVA \
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((ULONG)(HAL_MAKE_QVA(APECS_PCI_MEMORY_BASE_PHYSICAL)))
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//
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// PCI-E/ISA Bridge chip configuration space base is at physical address
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// 0x1e0000000. The equivalent QVA is:
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// ((0x1e0000000 + cache line offset) >> IO_BIT_SHIFT) | QVA_ENABLE
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//
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// N.B.: The PCI configuration space address is what we're really referring
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// to, here; both symbols are useful.
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//
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#define PCI_REVISION (0x0100 >> IO_BIT_SHIFT)
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#define PCI_CONFIGURATION_BASE_QVA ((ULONG)APECS_PCI_CONFIG_BASE_QVA)
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#define PCI_BRIDGE_CONFIGURATION_BASE_QVA ((ULONG)APECS_PCI_CONFIG_BASE_QVA)
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#define PCI_CONFIG_CYCLE_TYPE_0 0x0 // Local PCI device
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#define PCI_CONFIG_CYCLE_TYPE_1 0x1 // Nested PCI device
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#define PCI_ISA_BRIDGE_HEADER_OFFSET_P2 (0x00080000 >> IO_BIT_SHIFT) // AD[18]
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#define PCI_ISA_BRIDGE_HEADER_OFFSET_P1 (0x01000000 >> IO_BIT_SHIFT) // AD[18]
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#endif //!_LANGUAGE_ASSEMBLY
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//
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// Define primary (and only) CPU on an EB64+ system
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//
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#define HAL_PRIMARY_PROCESSOR ((ULONG)0x0)
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#define HAL_MAXIMUM_PROCESSOR ((ULONG)0x0)
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//
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// Define the default processor frequency to be used before the actual
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// processor frequency can be determined.
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//
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#define DEFAULT_PROCESSOR_FREQUENCY_MHZ (275)
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//
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// Define the location of the flash environment block
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//
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#define ALPHAPC64_ENVIRONMENT_QVA \
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((ULONG)HAL_MAKE_QVA(APECS_PCI_MEMORY_BASE_PHYSICAL) + 0xf0000)
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extern BOOLEAN SystemIsAlphaPC64;
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#endif // _EB64PDEF_H_
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