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340 lines
6.0 KiB
340 lines
6.0 KiB
/*++
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Copyright (c) 1991-1993 Microsoft Corporation
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Module Name:
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jxsysint.c
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Abstract:
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This module implements the HAL enable/disable system interrupt, and
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request interprocessor interrupt routines for a MIPS R3000 or R4000
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Jazz system.
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Environment:
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Kernel mode
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Revision History:
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--*/
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#include "halp.h"
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VOID
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HalDisableSystemInterrupt (
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IN ULONG Vector,
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IN KIRQL Irql
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)
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/*++
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Routine Description:
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This routine disables the specified system interrupt.
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Arguments:
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Vector - Supplies the vector of the system interrupt that is disabled.
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Irql - Supplies the IRQL of the interrupting source.
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Return Value:
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None.
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--*/
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{
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KIRQL OldIrql;
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//
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// Raise IRQL to the highest level and acquire device enable spinlock.
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//
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KeRaiseIrql(HIGH_LEVEL, &OldIrql);
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KiAcquireSpinLock(&HalpSystemInterruptLock);
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//
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// If the vector number is within the range of builtin devices, then
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// disable the builtin device interrupt.
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//
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//
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// If the vector number is within the range
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// of the EISA interrupts controlled by the
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// 82374, then disable the EISA interrrupt.
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//
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if ( (Vector >= EISA_VECTORS) && (Vector <= MAXIMUM_EISA_VECTOR) && (Irql == FALCON_LEVEL) ) {
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HalpDisableEisaInterrupt(Vector);
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}
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//
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// Release the device enable spin loc and lower IRQL to the previous level.
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//
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KiReleaseSpinLock(&HalpSystemInterruptLock);
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KeLowerIrql(OldIrql);
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return;
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}
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BOOLEAN
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HalEnableSystemInterrupt (
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IN ULONG Vector,
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IN KIRQL Irql,
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IN KINTERRUPT_MODE InterruptMode
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)
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/*++
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Routine Description:
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This routine enables the specified system interrupt.
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Arguments:
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Vector - Supplies the vector of the system interrupt that is enabled.
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Irql - Supplies the IRQL of the interrupting source.
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InterruptMode - Supplies the mode of the interrupt; LevelSensitive or
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Latched.
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Return Value:
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TRUE if the system interrupt was enabled
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--*/
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{
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KIRQL OldIrql;
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//
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// Raise IRQL to the highest level and acquire device enable spinlock.
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//
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KeRaiseIrql(HIGH_LEVEL, &OldIrql);
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KiAcquireSpinLock(&HalpSystemInterruptLock);
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//
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// If the vector number is within the range
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// of the EISA interrupts controlled by the
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// 82374, then enable the EISA interrrupt.
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//
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if ( (Vector >= EISA_VECTORS) && (Vector <= MAXIMUM_EISA_VECTOR) && (Irql == FALCON_LEVEL) ) {
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HalpEnableEisaInterrupt(Vector, InterruptMode);
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}
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//
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// Release the device enable spin loc and lower IRQL to the previous level.
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//
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KiReleaseSpinLock(&HalpSystemInterruptLock);
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KeLowerIrql(OldIrql);
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return TRUE;
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}
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ULONG
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HalpGetSystemInterruptVector(
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN ULONG BusInterruptLevel,
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IN ULONG BusInterruptVector,
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OUT PKIRQL Irql,
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OUT PKAFFINITY Affinity
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)
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{
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UNREFERENCED_PARAMETER( BusHandler );
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UNREFERENCED_PARAMETER( RootHandler );
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UNREFERENCED_PARAMETER( BusInterruptVector );
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//
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// Set affinity to base processor 0.
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//
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*Affinity = 1;
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//
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// return processor IRQL
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//
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*Irql = FALCON_LEVEL;
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//
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// The vector is equal to the specified bus level.
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//
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return(BusInterruptVector);
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}
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ULONG
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HalpGetEisaInterruptVector(
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN ULONG BusInterruptLevel,
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IN ULONG BusInterruptVector,
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OUT PKIRQL Irql,
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OUT PKAFFINITY Affinity
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)
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{
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UNREFERENCED_PARAMETER( BusHandler );
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UNREFERENCED_PARAMETER( RootHandler );
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UNREFERENCED_PARAMETER( BusInterruptVector );
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//
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// Set affinity according to how many
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// processors we have. If an MP (two
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// processor) system, direct IO interrupts
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// to the second processor; otherwise,
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// all interrupts go to the same processor.
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//
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#ifdef IO_INTERRUPT_STEERING
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if (HalpPmpProcessorBPresent) {
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*Affinity = 2;
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} else {
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*Affinity = 1;
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}
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#else
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*Affinity = 1;
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#endif
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//
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// return processor IRQL
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//
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*Irql = FALCON_LEVEL;
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//
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// Bus interrupt level 2 is actually mapped to bus level 9 in the Eisa
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// hardware.
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//
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if (BusInterruptLevel == 2) {
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BusInterruptLevel = 9;
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}
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//
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// The vector is equal to the specified bus level plus the EISA_VECTOR.
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//
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return(BusInterruptLevel + EISA_VECTORS);
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}
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ULONG
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HalpGetPCIInterruptVector(
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IN PBUS_HANDLER BusHandler,
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IN PBUS_HANDLER RootHandler,
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IN ULONG BusInterruptLevel,
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IN ULONG BusInterruptVector,
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OUT PKIRQL Irql,
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OUT PKAFFINITY Affinity
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)
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{
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UNREFERENCED_PARAMETER( BusHandler );
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UNREFERENCED_PARAMETER( RootHandler );
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UNREFERENCED_PARAMETER( BusInterruptVector );
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//
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// Set affinity according to how many
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// processors we have. If an MP (two
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// processor) system, direct IO interrupts
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// to the second processor; otherwise,
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// all interrupts go to the same processor.
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//
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#ifdef IO_INTERRUPT_STEERING
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if (HalpPmpProcessorBPresent) {
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*Affinity = 2;
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} else {
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*Affinity = 1;
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}
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#else
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*Affinity = 1;
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#endif
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//
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// return processor IRQL
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//
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*Irql = FALCON_LEVEL;
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//
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// The vector is equal to the specified bus level plus the EISA_VECTOR.
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//
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return(BusInterruptLevel + EISA_VECTORS);
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}
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VOID
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HalRequestIpi (
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IN ULONG Mask
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)
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/*++
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Routine Description:
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This routine requests an interprocessor interrupt on a set of processors.
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N.B. This routine must ensure that the interrupt is posted at the target
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processor(s) before returning.
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Arguments:
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Mask - Supplies the set of processors that are sent an interprocessor
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interrupt.
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Return Value:
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None.
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--*/
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{
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//
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// Request an interprocessor interrupt on each of the specified target
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// processors.
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//
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// Be sure no upper bits set as Mask is ULONG
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//
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Mask &= 0xFFFF;
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WRITE_REGISTER_ULONG(HalpPmpIpIntAck, (Mask << 16) | Mask);
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return;
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}
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