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338 lines
9.3 KiB
338 lines
9.3 KiB
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// TITLE("Interval and Profile Clock Interrupts")
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//++
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//
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// Copyright (c) 1991-1993 Microsoft Corporation
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//
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// Module Name:
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//
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// x4clock.s
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//
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// Abstract:
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//
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// This module implements the code necessary to field and process the
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// interval and profile clock interrupts on a MIPS R4000 system.
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//
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//--
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#include "halmips.h"
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#include "faldef.h"
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SBTTL("System Clock Interrupt - Processor 0")
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//++
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interrupt generated by
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// the interval timer. Its function is to acknowledge the interrupt and
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// transfer control to the standard system routine to update the system
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// time and the execution time of the current thread and process.
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//
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// Arguments:
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//
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// s8 - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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.struct 0
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CiArgs: .space 4 * 4 // saved arguments
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.space 3 * 4 // fill
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CiRa: .space 4 // saved return address
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CiFrameLength: //
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NESTED_ENTRY(HalpClockInterrupt0, CiFrameLength, zero)
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subu sp,sp,CiFrameLength // allocate stack frame
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sw ra,CiRa(sp) // save return address
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PROLOGUE_END
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.set noreorder
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//
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// Clear Timer interrupt by reading
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// TimerIntAck register in PMP chip
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// only if this is PMP_V3 or later.
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// NOTE: There are NO PMP_V1 in existence,
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// therefore only checking that PMP_V2
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// or NOT PMP_V2.
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//
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la t0, HalpPmpRevision
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lw t1, 0(t0)
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li t2, 2
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beq t1, t2, 2f
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nop
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lw t0, HalpPmpTimerIntAck
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lw t0, 0(t0)
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2:
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.set reorder
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move a0,s8 // set address of trap frame
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lw a1,HalpCurrentTimeIncrement // set current time increment
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lw t0,__imp_KeUpdateSystemTime // update system time
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jal t0 //
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//
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// At each clock interrupt the next time increment is moved to the current
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// time increment to "pipeline" the update of the current increment at the
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// correct time. If the next interval count is nonzero, then the new time
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// increment is moved to the next time increment and the next interval count
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// register is loaded with the specified interval count minus one (i.e., ms).
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//
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lw t0,KdDebuggerEnabled // get address of debugger enable
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lw t1,HalpNextIntervalCount // get next interval count
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lw t2,HalpNextTimeIncrement // get the next increment value
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lbu t0,0(t0) // get debugger enable flag
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lw t3,HalpNewTimeIncrement // get new new time increment value
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lw ra,CiRa(sp) // restore return address
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or t4,t1,t0 // set interval count or debugger?
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sw t2,HalpCurrentTimeIncrement // set current increment value
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bne zero,t4,20f // if ne, interval change or debugger
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addu sp,sp,CiFrameLength // deallocate stack frame
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j ra // return
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//
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// The interval count must be changed or the debugger is enabled.
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//
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20:
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beq zero,t1,30f // if eq, not interval count change
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sw zero,HalpNextIntervalCount // clear next interval count
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.set noreorder
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//
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// Determine which version of
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// the PMP we have so we can
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// update the correct counter
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// in the 82374.
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//
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// NOTE: Any machine with PMP_V2
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// uses Counter 0. Any machine
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// with PMP_V3 or better uses
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// Counter 2.
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//
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la a0, HalpPmpRevision
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lw a0, 0(a0)
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li a1, 2
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beq a0, a1, 3f
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nop
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//
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// Set next interval count for
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// Timer 1, Counter 2
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//
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lw a0, HalpEisaControlBase
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li a2, 0xB6 // Counter2, r/w LSB then MSB, Mode 3
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sb a2, 0x43(a0)
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sb t1, 0x42(a0)
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srl a1, t1, 8
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b 4f
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sb a1, 0x42(a0)
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3:
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//
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// Set next interval count for
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// Timer 1, Counter 0
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//
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lw a0, HalpEisaControlBase
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li a2, 0x36 // Counter0, r/w LSB then MSB, Mode 3
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sb a2, 0x43(a0)
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sb t1, 0x40(a0)
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srl a1, t1, 8
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sb a1, 0x40(a0)
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4:
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.set reorder
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sw t3,HalpNextTimeIncrement // set next time increment value
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30: beq zero,t0,40f // if eq, debugger not enabled
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jal KdPollBreakIn // check if breakin is requested
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beq zero,v0,40f // if eq, no breakin requested
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li a0,DBG_STATUS_CONTROL_C // break in and send
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jal DbgBreakPointWithStatus // status to debugger
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40: lw ra,CiRa(sp) // restore return address
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addu sp,sp,CiFrameLength // deallocate stack frame
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j ra // return
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.end HalpClockInterrupt0
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SBTTL("System Clock Interrupt - Processor N")
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//++
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interrupt generated by
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// the interval timer. Its function is to acknowledge the interrupt
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// and transfer control to the standard system routine to update the
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// execution time of the current thread and process.
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//
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// Arguments:
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//
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// s8 - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(HalpClockInterrupt1)
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//
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// clear Timer interrupt by reading
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// TimerIntAck register in PMP chip
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// only if this is not the first
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// version of the PMP chip.
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//
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lw t0, HalpPmpTimerIntAckProcB
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lw t0, 0(t0)
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move a0,s8 // set address of trap frame
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lw t1,__imp_KeUpdateRunTime // update system runtime
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j t1
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.end HalpClockInterrupt1
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SBTTL("Profile Clock Interrupt")
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//++
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interrupt generated by the
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// profile clock. Its function is to acknowledge the profile interrupt,
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// compute the next compare value, update the performance counter, and
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// transfer control to the standard system routine to process any active
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// profiles.
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//
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// Arguments:
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//
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// s8 - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(HalpProfileInterrupt)
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.set noreorder
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.set noat
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mfc0 t1,count // get current count value
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mfc0 t0,compare // get current comparison value
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addu t1,t1,8 // factor in lost cycles
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subu t1,t1,t0 // compute initial count value
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mtc0 t0,compare // dismiss interrupt
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mtc0 t1,count // set new count register value
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.set at
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.set reorder
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lw t1,KiPcr + PcPrcb(zero) // get current processor block address
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la t2,HalpPerformanceCounter // get performance counter address
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lbu t1,PbNumber(t1) // get processor number
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sll t1,t1,3 // compute address of performance count
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addu t1,t1,t2 //
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lw t2,LiLowPart(t1) // get low part of performance count
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lw t3,LiHighPart(t1) // get high part of performance count
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addu t2,t2,t0 // update low part of performance count
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sw t2,LiLowPart(t1) // store low part of performance count
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sltu t4,t2,t0 // generate carry into high part
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addu t3,t3,t4 // update high part of performance count
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sw t3,LiHighPart(t1) // store high part of performance count
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move a0,s8 // set address of trap frame
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lw t4,__imp_KeProfileInterrupt // process profile interrupt
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j t4 //
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.end HalpProfileInterrupt
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SBTTL("Read Count Register")
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//++
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//
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// ULONG
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// HalpReadCountRegister (
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// VOID
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// );
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//
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// Routine Description:
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//
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// This routine reads the current value of the count register and
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// returns the value.
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//
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// Arguments:
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//
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// None.
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//
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// Return Value:
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//
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// Current value of the count register.
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//
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//--
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LEAF_ENTRY(HalpReadCountRegister)
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.set noreorder
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.set noat
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mfc0 v0,count // get count register value
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.set at
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.set reorder
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j ra // return
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.end HalpReadCountRegister
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SBTTL("Write Compare Register And Clear")
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//++
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//
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// ULONG
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// HalpWriteCompareRegisterAndClear (
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// IN ULONG Value
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// );
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//
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// Routine Description:
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//
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// This routine reads the current value of the count register, writes
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// the value of the compare register, clears the count register, and
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// returns the previous value of the count register.
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//
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// Arguments:
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//
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// Value - Supplies the value written to the compare register.
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//
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// Return Value:
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//
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// Previous value of the count register.
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//
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//--
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LEAF_ENTRY(HalpWriteCompareRegisterAndClear)
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.set noreorder
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.set noat
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mfc0 v0,count // get count register value
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mtc0 a0,compare // set compare register value
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li t0,7 // set lost cycle count
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mtc0 t0,count // set count register to zero
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.set at
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.set reorder
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j ra // return
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.end HalpWriteCompareRegisterAndClear
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