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478 lines
14 KiB
478 lines
14 KiB
title "MP primitives for Compaq SystemPro"
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;++
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;
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;Copyright (c) 1991 Microsoft Corporation
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;
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;Module Name:
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;
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; oliproca.asm
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;
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;Abstract:
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;
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; SystemPro Start Next Processor assemble code
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;
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; This module along with mpspro.c implement the code to start
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; off the second processor on the Compaq SystemPro.
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;
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;Author:
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;
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; Ken Reneris (kenr) 12-Jan-1992
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;
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; Bruno Sartirana (o-obruno) 3-Mar-92
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; Added support for the Olivetti LSX5030.
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;
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;Revision History:
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;
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;--
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.386p
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.xlist
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include hal386.inc
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include callconv.inc
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include i386\kimacro.inc
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include mac386.inc
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;LSX5030 start
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include i386\ix8259.inc
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include i386\olimp.inc
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;LSX5030 end
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.list
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EXTRNP _HalpBuildTiledCR3,1
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EXTRNP _HalpFreeTiledCR3,0
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extrn _MppIDT:DWORD
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extrn _MpLowStub:DWORD
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extrn _MpLowStubPhysicalAddress:DWORD
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extrn ProcessorControlPort:WORD
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;LSX5030 start
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extrn _CpuLeft:DWORD
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extrn _NextCpuToStart:DWORD
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extrn DbgDelay:DWORD
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;LSX5030 end
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;
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; Internal defines and structures
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;
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PxParamBlock struc
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SPx_flag dd ?
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SPx_TiledCR3 dd ?
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SPx_P0EBP dd ?
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SPx_ControlPort dd ?
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SPx_PB db processorstatelength dup (?)
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PxParamBlock ends
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_TEXT SEGMENT PARA PUBLIC 'CODE' ; Start 32 bit code
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ASSUME DS:FLAT, ES:FLAT, SS:NOTHING, FS:NOTHING, GS:NOTHING
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;++
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;
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; BOOLEAN
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; HalStartNextProcessor (
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; IN PLOADER_BLOCK pLoaderBlock,
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; IN PKPROCESSOR_STATE pProcessorState
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; )
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;
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; Routine Description:
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;
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; This routine is called by the kernel durning kernel initialization
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; to obtain more processors. It is called until no more processors
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; are available.
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;
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; If another processor exists this function is to initialize it to
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; the passed in processorstate structure, and return TRUE.
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;
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; If another processor does not exists, then a FALSE is returned.
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;
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; Also note that the loader block has been setup for the next processor.
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; The new processor logical thread number can be obtained from it, if
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; required.
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;
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; Arguments:
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; pLoaderBlock, - Loader block which has been intialized for the
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; next processor.
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;
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; pProcessorState - The processor state which is to be loaded into
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; the next processor.
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;
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;
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; Return Value:
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;
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; TRUE - ProcessorNumber was dispatched.
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; FALSE - A processor was not dispatched. no other processors exists.
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;
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;--
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pLoaderBlock equ dword ptr [ebp+8] ; zero based
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pProcessorState equ dword ptr [ebp+12]
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;
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; Local variables
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;
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PxFrame equ [ebp - size PxParamBlock]
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cPublicProc _HalStartNextProcessor ,2
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push ebp ; save ebp
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mov ebp, esp ;
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sub esp, size PxParamBlock ; Make room for local vars
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DBG_DISPLAY 0f0h
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push esi
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push edi
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push ebx
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xor eax, eax
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mov PxFrame.SPx_flag, eax
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cmp _CpuLeft, eax
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je snp_exit ; exit FALSE
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mov esi, OFFSET FLAT:StartPx_RMStub
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mov ecx, StartPx_RMStub_Len
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mov edi, _MpLowStub ; Copy RMStub to low memory
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add edi, size PxParamBlock
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rep movsb
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lea edi, PxFrame.SPx_PB
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mov esi, pProcessorState
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mov ecx, processorstatelength ; Copy processorstate
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rep movsb ; to PxFrame
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stdCall _HalpBuildTiledCR3,<pProcessorState>
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mov PxFrame.SPx_TiledCR3, eax
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mov PxFrame.SPx_P0EBP, ebp
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mov eax, pLoaderBlock ; lookup processor # we are
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mov eax, [eax].LpbPrcb ; starting
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movzx eax, byte ptr [eax].PbNumber
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movzx edx, ProcessorControlPort[eax*2] ; Get processor's control port
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mov PxFrame.SPx_ControlPort, edx ; Pass it along
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mov ecx, size PxParamBlock ; copy param block
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lea esi, PxFrame ; to low memory stub
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mov edi, _MpLowStub
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mov eax, edi
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rep movsb
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add eax, size PxParamBlock
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mov ebx, OFFSET FLAT:StartPx_RMStub
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sub eax, ebx ; (eax) = adjusted pointer
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mov bx, word ptr [PxFrame.SPx_PB.PsContextFrame.CsSegCs]
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mov [eax.SPrxFlatCS], bx ; patch realmode stub with
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mov [eax.SPrxPMStub], offset _StartPx_PMStub ; valid long jump
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mov ebx, _MppIDT
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add ebx, WarmResetVector
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cli
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push dword ptr [ebx] ; Save current vector
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mov eax, _MpLowStubPhysicalAddress
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shl eax, 12 ; seg:0
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add eax, size PxParamBlock
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mov dword ptr [ebx], eax ; start Px here
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;LSX5030 start
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mov eax, _NextCpuToStart
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mov dx, word ptr ProcessorControlPort[eax*2]
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in al, dx
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or al, RESET ; assert RESET
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out dx, al
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and al, not RESET ; the 1-0 transition of PCR
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; reset bit resets the
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; processor
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out dx, al ; reset processor
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;LSX5030 end
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@@:
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cmp PxFrame.SPx_flag, 0 ; wait for Px to get it's
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jz @b ; info
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pop dword ptr [ebx] ; restore WarmResetVector
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sti
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stdCall _HalpFreeTiledCR3 ; free memory used for tiled
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; CR3
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;LSX5030 start
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DBG_DISPLAY 0ffh
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dec _CpuLeft ; one less
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inc _NextCpuToStart ; next CPU # to start
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;LSX5030 end
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mov eax, 1 ; return TRUE
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snp_exit:
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DBG_DISPLAY 0feh
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pop ebx
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pop edi
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pop esi
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mov esp, ebp
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pop ebp
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stdRET _HalStartNextProcessor
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_HalStartNextProcessor endp
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_TEXT ends ; end 32 bit code
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_TEXT16 SEGMENT DWORD PUBLIC USE16 'CODE' ; start 16 bit code
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;++
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;
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; VOID
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; StartPx_RMStub
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;
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; Routine Description:
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;
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; When a new processor is started, it starts in real-mode and is
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; sent to a copy of this function which has been copied into low memory.
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; (below 1m and accessable from real-mode).
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;
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; Once CR0 has been set, this function jmp's to a StartPx_PMStub
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;
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; Arguments:
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; none
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;
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; Return Value:
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; does not return, jumps to StartPx_PMStub
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;
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;--
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cPublicProc StartPx_RMStub,0
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cli
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db 066h ; load the GDT
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lgdt fword ptr cs:[SPx_PB.PsSpecialRegisters.SrGdtr]
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db 066h ; load the IDT
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lidt fword ptr cs:[SPx_PB.PsSpecialRegisters.SrIdtr]
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mov eax, cs:[SPx_TiledCR3]
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mov cr3, eax
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mov ebp, dword ptr cs:[SPx_P0EBP]
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mov ecx, dword ptr cs:[SPx_PB.PsContextFrame.CsSegDs]
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mov ebx, dword ptr cs:[SPx_PB.PsSpecialRegisters.SrCr3]
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mov eax, dword ptr cs:[SPx_PB.PsSpecialRegisters.SrCr0]
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mov cr0, eax ; into prot mode
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db 066h
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db 0eah ; reload cs:eip
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SPrxPMStub dd 0
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SPrxFlatCS dw 0
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StartPx_RMStub_Len equ $ - StartPx_RMStub
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stdENDP StartPx_RMStub
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_TEXT16 ends ; End 16 bit code
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_TEXT SEGMENT ; Start 32 bit code
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;++
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;
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; VOID
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; StartPx_PMStub
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;
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; Routine Description:
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;
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; This function completes the processor's state loading, and signals
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; the requesting processor that the state has been loaded.
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;
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; Arguments:
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; ebx - requested CR3 for this processors_state
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; cx - requested ds for this processors_state
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; ebp - EBP of P0
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;
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; Return Value:
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; does not return - completes the loading of the processors_state
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;
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;--
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align 16 ; to make sure we don't cross a page boundry
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; before reloading CR3
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public _StartPx_PMStub
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_StartPx_PMStub proc
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; process is now in the load image copy of this function.
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; (ie, it's not the low memory copy)
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mov cr3, ebx ; get real CR3
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mov ds, cx ; set real ds
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lea esi, PxFrame.SPx_PB.PsSpecialRegisters
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lldt word ptr ds:[esi].SrLdtr ; load ldtr
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ltr word ptr ds:[esi].SrTr ; load tss
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lea edi, PxFrame.SPx_PB.PsContextFrame
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mov es, word ptr ds:[edi].CsSegEs ; Set other selectors
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mov fs, word ptr ds:[edi].CsSegFs
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mov gs, word ptr ds:[edi].CsSegGs
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mov ss, word ptr ds:[edi].CsSegSs
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add esi, SrKernelDr0
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.errnz (SrKernelDr1 - SrKernelDr0 - 1 * 4)
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.errnz (SrKernelDr2 - SrKernelDr0 - 2 * 4)
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.errnz (SrKernelDr3 - SrKernelDr0 - 3 * 4)
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.errnz (SrKernelDr6 - SrKernelDr0 - 4 * 4)
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.errnz (SrKernelDr7 - SrKernelDr0 - 5 * 4)
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lodsd
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mov dr0, eax ; load dr0-dr7
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lodsd
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mov dr1, eax
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lodsd
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mov dr2, eax
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lodsd
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mov dr3, eax
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lodsd
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mov dr6, eax
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lodsd
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mov dr7, eax
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mov esp, dword ptr ds:[edi].CsEsp
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mov esi, dword ptr ds:[edi].CsEsi
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mov ecx, dword ptr ds:[edi].CsEcx
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push dword ptr ds:[edi].CsEflags
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popfd ; load eflags
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push dword ptr ds:[edi].CsEip ; make a copy of remaining
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push dword ptr ds:[edi].CsEax ; registers which need
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push dword ptr ds:[edi].CsEbx ; loaded
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push dword ptr ds:[edi].CsEdx
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push dword ptr ds:[edi].CsEdi
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push dword ptr ds:[edi].CsEbp
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; eax, ebx, edx are still free
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;LSX5030 start
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mov eax, _NextCpuToStart
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mov dx, word ptr ProcessorControlPort[eax*2]
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in al, dx ; Get register
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and al, not IPI_EN ; disable PINTs for now
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out dx, al
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;and dx, Px_SLOT_MASK ; get processor slot (olibus)
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;or dx, LEV2_CACHE_REG ; calculate address of the 2nd
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; level cache policy register
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; for this processor
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;in al, dx ; Get register
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;and al, not LEV2_CACHE_ON ; turn cache off
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;or al, LEV2_CACHE_ON ; turn cache on
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;out dx, al
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;and dx, Px_SLOT_MASK ; get processor slot (olibus)
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;or dx, SLOT_CONFIG_REG_0 ; calculate address of
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; configuration register 0 for
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; this processor
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;in al, dx ; get register
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;and al, not INTERNAL_CACHE_ON ; turn internal cache off
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;or al, INTERNAL_CACHE_ON ; turn processor's internal
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; cache on
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;out dx, al
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;DBG_DISPLAY 0b0h
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; sti
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inc [PxFrame.SPx_flag] ; Signal p0 that we are
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; done with its data
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;DBG_DISPLAY 0bfh
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;LSX5030 end
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; Set remaining registers
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pop ebp
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pop edi
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pop edx
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pop ebx
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pop eax
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ret ; Set eip
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_StartPx_PMStub endp
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;LSX5030 start
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;++
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;
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; ULONG
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; HalpGetNumberOfProcessors()
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;
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; Routine Description:
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;
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; This routine queries the CMOS to determine the number of processors
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; that can be started.
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; Also, it rearranges the ProcessorControlPort array to make it
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; non-sparse. This means that, eventually, ProcessorControlPort[n]
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; will contain the slot # of the processor n, where n=0,1,2,3.
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; For example, if the machine has two processors, one in slot 0 and
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; the other in slot 3, only the ProcessorControlPort array elements
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; #0 and #1 will be meaningful.
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;
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; Arguments:
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;
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; None.
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;
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; Return Value:
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;
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; The number of available processors in register eax.
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;
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;--
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cPublicProc _HalpGetNumberOfProcessors,0
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push ebx
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push ecx
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push edx
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mov al, CMOS_GET_MP_STATUS
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CMOS_READ
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mov ch, al ; al[7-4] = CPU card present bits
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; al[3-0] = CPU diagnostics passed bits
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shr al, 4 ; al[3-0] = CPU card present bits
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mov cl, al ; ch[3-0] = CPU card diag passed bits
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; cl[3-0] = CPU card present bits
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and cl, ch ; CPUs actually available (bit mapped)
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mov edx, 1 ; there's always the CPU0, so skip it
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mov eax, 1 ; logical processor #
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NextCPU:
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bt ecx, edx
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jnc IncLoopCounter
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mov bx, word ptr ProcessorControlPort[edx*2] ; get address of
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; PCP #edx
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mov word ptr ProcessorControlPort[eax*2], bx ; set PCP address
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; for processor #eax
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inc eax
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IncLoopCounter:
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inc edx
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cmp edx, MAX_NUMBER_PROCESSORS
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jl NextCPU
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pop edx
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pop ecx
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pop ebx
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stdRET _HalpGetNumberOfProcessors
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stdENDP _HalpGetNumberOfProcessors
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;LSX5030 end
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_TEXT ends ; end 32 bit code
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end
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