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445 lines
15 KiB
445 lines
15 KiB
/*++
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Copyright (c) 1992 ACER Labs Inc.
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Module Name:
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pxs3.h
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Abstract:
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This header file defines the S3 86C911 GUI accelerator registers.
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Author:
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Version 1.0 Kevin Chen 2-Apr-1992
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Version 2.0 Andrew Chou Nov-24-1992
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Version 3.0 Jess Botts Oct-06-1993 Power PC Initial Version
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--*/
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#define VERTICALRESOLUTION 768
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#define HORIZONTALRESOLUTION 1024
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#define OriginalPoint 0
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#define BLUE 192
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#define WHITE 255
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#define CRT_OFFSET 2
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#define SEQ_OFFSET 27
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#define GRAPH_OFFSET 32
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#define ATTR_OFFSET 41
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//
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// Define virtual address of the video memory and control registers.
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//
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extern PVOID HalpIoControlBase;
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//
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// Define S3 register I/O Macros
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//
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//=============================================================================
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//
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// IBMBJB Changed the semicolons separating statements in the write macros to
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// commas so that if the macro is used as the only statement in a loop
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// all of the statements in the macro will be part of the loop.
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//
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// Commas were used instead of putting braces around the statements
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// because if the macro is used in the true part of a conditional the
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// braces will cause the compiler to generate a syntax error.
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#define WRITE_S3_UCHAR(port,data) \
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*(volatile unsigned char *)((ULONG)HalpIoControlBase + (port)) = (UCHAR)(data), \
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KeFlushWriteBuffer()
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#define WRITE_S3_USHORT(port,data) \
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*(volatile PUSHORT)((ULONG)HalpIoControlBase + (port)) = (USHORT)(data), \
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KeFlushWriteBuffer()
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#define READ_S3_UCHAR(port) \
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*(volatile unsigned char *)((ULONG)HalpIoControlBase + (port))
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#define READ_S3_USHORT(port) \
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*(volatile unsigned short *)((ULONG)HalpIoControlBase + (port))
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#define READ_S3_VRAM(port) \
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*(HalpVideoMemoryBase + (port))
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#define WRITE_S3_VRAM(port,data) \
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*(HalpVideoMemoryBase + (port)) = (data), \
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KeFlushWriteBuffer()
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//=============================================================================
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#define DISPLAY_BITS_PER_PIXEL 8 // display bits per pixel
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#define NUMBER_OF_COLORS 256 // number of colors
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#define CURSOR_WIDTH 64 // width of hardware cursor
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#define CURSOR_HEIGHT 64 // height of hardware cursor
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#define CURSOR_BITS_PER_PIXEL 2 // hardware cursor bits per pixel
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//
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// S3 86C911 GUI, accelerator Video Controller Definitions.
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//
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// Define video register format.
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//
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#define PosID_LO 0x100 // R/W
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#define PosID_HI 0x101 // R/W
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#define Setup_OP 0x102 // R/W
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#define Chck_Ind 0x105 // R
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#define Mono_3B4 0x3B4 // R/W
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#define Mono_3B5 0x3B5 // R/W
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#define MDA_Mode 0x3B8 // W
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#define HGC_SLPEN 0x3B9 // R/W
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#define Stat1_MonoIn 0x3BA // R
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#define FC_MonoW 0x3BA // W
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#define HGC_CLPEN 0x3BB // W
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#define HGC_Config 0x3BF // W
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#define Attr_Index 0x3C0 // R/W
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#define Attr_Data 0x3C0 // R/W
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#define Stat0_In 0x3C2 // R
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#define MiscOutW 0x3C2 // W
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#define VSub_EnB 0x3C3 // R/W
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#define Seq_Index 0x3C4 // R/W
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#define Seq_Data 0x3C5 // R/W
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#define DAC_Mask 0x3C6 // R/W
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#define DAC_RIndex 0x3C7 // W
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#define DAC_Status 0x3C7 // W
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#define DAC_WIndex 0x3C8 // R/W
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#define DAC_Data 0x3C9 // R/W
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#define FC_Read 0x3CA // R
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#define MiscOutR 0x3CC // R
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#define GC_Index 0x3CE // R/W
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#define GC_Data 0x3CF // R/W
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#define S3_3D4_Index 0x3D4 // R/W
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#define S3_3D5_Data 0x3D5 // R/W
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#define CGA_Mode 0x3D8 // W
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#define CGA_Color 0x3D9 // W
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#define Stat1_In 0x3DA // R
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#define FC_Write 0x3DA // W
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#define CLPEN 0x3DB
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#define SLPEN 0x3DC
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//
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// Define Enhanced registers for S3_86C911
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//
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#define SUBSYS_STAT 0x42E8 // R
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#define SUBSYS_CNTL 0x42E8 // W
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#define SUBSYS_ENB 0x46E8 // R/W
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#define ADVFUNC_CNTL 0x4AE8 // W
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#define CUR_Y 0x82E8 // R/W
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#define CUR_X 0x86E8 // R/W
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#define DESTY 0x8AE8 // W
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#define AXIAL_STEP 0x8AE8 // W
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#define DESTX 0x8EE8 // W
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#define DIAG_STEP 0x8EE8 // W
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#define ERR_TERM 0x92E8 // R
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#define MAJ_AXIS_PCNT 0x96E8 // W
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#define RWIDTH 0x96E8 // W
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#define GP_STAT 0x9AE8 // R
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#define DRAW_CMD 0x9AE8 // W
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#define SHORT_STROKE 0x9EE8 // W
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#define BKGD_COLOR 0xA2E8 // W
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#define FRGD_COLOR 0xA6E8 // W
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#define WRITE_MASK 0xAAE8 // W
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#define READ_MASK 0xAEE8 // W
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#define BKGD_MIX 0xB6E8 // W
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#define FRGD_MIX 0xBAE8 // W
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#define MULTIFUNC_CNTL 0xBEE8 // W
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#define RHEIGHT 0xBEE8 // W
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#define PIX_TRANS 0xE2E8 // W
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//
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// Define Attribute Controller Indexes : ( out 3C0, Index )
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//
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#define PALETTE0 0
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#define PALETTE1 1
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#define PALETTE2 2
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#define PALETTE3 3
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#define PALETTE4 4
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#define PALETTE5 5
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#define PALETTE6 6
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#define PALETTE7 7
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#define PALETTE8 8
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#define PALETTE9 9
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#define PALETTE10 10
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#define PALETTE11 11
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#define PALETTE12 12
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#define PALETTE13 13
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#define PALETTE14 14
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#define PALETTE15 15
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#define ATTR_MODE_CTRL 16
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#define BORDER_COLOR 17
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#define COLOR_PLANE_ENABLE 18
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#define HORI_PIXEL_PANNING 19
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#define PIXEL_PADDING 20
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//
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// Define Sequencer Indexes ( out 3C4, Index)
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//
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#define RESET 0
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#define CLOCKING_MODE 1
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#define ENABLE_WRITE_PLANE 2
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#define CHARACTER_FONT_SELECT 3
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#define MEMORY_MODE_CONTROL 4
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//
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// Define Graphics Controller Index ( out 3CE, Index )
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//
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#define SET_RESET 0
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#define ENABLE_SET_RESET 1
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#define COLOR_COMPARE 2
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#define DATA_ROTATE 3
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#define READ_PLANE_SELECT 4
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#define GRAPHICS_CTRL_MODE 5
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#define MEMORY_MAP_MODE 6
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#define COLOR_DONT_CARE 7
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#define BIT_MASK 8
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//
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// Define CRTC, VGA S3, SYS_CTRL Index : ( Out 3D4, Index )
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//
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// Define CRTC Controller Indexes
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//
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#define HORIZONTAL_TOTAL 0
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#define HORIZONTAL_DISPLAY_END 1
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#define START_HORIZONTAL_BLANK 2
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#define END_HORIZONTAL_BLANK 3
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#define HORIZONTAL_SYNC_POS 4
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#define END_HORIZONTAL_SYNC 5
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#define VERTICAL_TOTAL 6
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#define CRTC_OVERFLOW 7
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#define PRESET_ROW_SCAN 8
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#define MAX_SCAN_LINE 9
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#define CURSOR_START 10
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#define CURSOR_END 11
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#define START_ADDRESS_HIGH 12
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#define START_ADDRESS_LOW 13
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#define CURSOR_LOCATION_HIGH 14
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#define CURSOR_FCOLOR 14
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#define CURSOR_BCOLOR 15
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#define CURSOR_LOCATION_LOW 15
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#define VERTICAL_RETRACE_START 16
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#define VERTICAL_RETRACE_END 17
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#define VERTICAL_DISPLAY_END 18
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#define OFFSET_SCREEN_WIDTH 19
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#define UNDERLINE_LOCATION 20
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#define START_VERTICAL_BLANK 21
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#define END_VERTICAL_BLANK 22
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#define CRT_MODE_CONTROL 23
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#define LINE_COMPARE 24
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#define CPU_LATCH_DATA 34
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#define ATTRIBUTE_INDEX1 36
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#define ATTRIBUTE_INDEX2 38
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//
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// Define VGA S3 Indexes
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//
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#define S3R0 0x30
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#define S3R1 0x31
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#define S3R2 0x32
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#define S3R3 0x33
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#define S3R4 0x34
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#define S3R5 0x35
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#define S3R6 0x36
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#define S3R7 0x37
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#define S3R8 0x38
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#define S3R9 0x39
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#define S3R0A 0x3A
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#define S3R0B 0x3B
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#define S3R0C 0x3C
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#define SC0 0x40
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#define SC2 0x42
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#define SC3 0x43
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#define SC5 0x45
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//
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// Define System Control Indexes
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//
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#define SYS_CNFG 64
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#define SOFT_STATUS 65
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#define MODE_CTRL 66
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#define EXT_MODE 67
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#define HGC_MODE 69
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#define HGC_ORGX0 70
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#define HGC_ORGX1 71
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#define HGC_ORGY0 72
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#define HGC_ORGY1 73
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#define HGC_YSTART0 76
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#define HGC_YSTART1 77
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#define HGC_DISPX 78
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#define HGC_DISPY 79
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#define ENABLE_HARDWARE_CURSOR 1
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#define DISABLE_HARDWARE_CURSOR 0
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//
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// define advanced function control register structure
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//
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#define RES_640x480 0
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#define RES_1024x768 1
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#define RES_800x600 1
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#define ENABLE_VGA 6
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#define ENABLE_ENHANCED 7
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//
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// define draw command register values
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//
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#define NOP_COMMAND 0x0
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#define DRAW_LINE_COMMAND 0x2000
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#define RECTANGLE_FILL_COMMAND 0x4000
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#define BITBLT_COMMAND 0xc000
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#define BYTE_SWAP 0x1000
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#define NO_BYTE_SWAP 0x0
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#define SIXTEEN_BIT_BUS 0x0200
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#define EIGHT_BIT_BUS 0x0
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#define WAIT 0x0100
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#define NO_WAIT 0x0
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#define R0 0x0
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#define R45 0x20
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#define R90 0x40
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#define R135 0x60
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#define R180 0x80
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#define R225 0xa0
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#define R270 0xc0
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#define R315 0xe0
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#define XMAJ 0x0
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#define YMAJ 0x40
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#define XPositive 0x20
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#define YPositive 0x80
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#define XNegative 0x0
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#define YNegative 0x0
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#define DRAW_YES 0x10
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#define DRAW_NO 0x0
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#define RADIAL 8
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#define XY_BASE 0
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#define LAST_PIXEL_OFF 4
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#define LAST_PIXEL_ON 0
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#define MULTIPLE_PIXEL 2
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#define SINGLE_PIXEL 0
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#define DRAW_READ 0
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#define DRAW_WRITE 1
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#define SSV_DRAW 0x1000
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#define SSV_MOVE 0x0
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#define OneEmpty 0x80
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#define TwoEmpty 0x40
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#define ThreeEmpty 0x20
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#define FourEmpty 0x10
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#define FiveEmpty 0x8
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#define SixEmpty 0x4
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#define SevenEmpty 0x2
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#define EightEmpty 0x1
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#define BACKGROUND_COLOR 0
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#define FOREGROUND_COLOR 0x20
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#define CPU_DATA 0x40
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#define DISPLAY_MEMORTY 0x60
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#define NOT_SCREEN 0
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#define LOGICAL_ZERO 1
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#define LOGICAL_ONE 2
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#define LEAVE_ALONE 3
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#define NOT_NEW 4
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#define SCREEN_XOR_NEW 5
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#define NOT_SCREEN_XOR_NEW 6
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#define OVERPAINT 7 //( NEW )
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#define NOT_SCREEN_OR_NOT_NEW 8
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#define SCREEN_OR_NOT_NEW 9
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#define NOT_SCREEN_OR_NEW 10
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#define SCREEN_OR_NEW 11
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#define SCREEN_AND_NEW 12
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#define NOT_SCREEN_AND_NEW 13
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#define SCREEN_AND_NOT_NEW 14
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#define NOT_SCREEN_AND_NOT_NEW 15
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#define BEE8_1H 1
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#define BEE8_2H 2
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#define BEE8_3H 3
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#define BEE8_4H 4
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#define BEE8_0H 0
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#define L_CLIP 0x1000
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#define R_CLIP 0x2000
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#define B_CLIP 0x3000
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#define T_CLIP 0x4000
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#define DATA_EXTENSION 0xa000 // 10100000B
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#define CPU_EXT 0x80
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#define DISPLAY_EXT 0xc0
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#define NO_EXTENSION 0x0
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#define PACK_DATA 0x4
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#define NO_PACK_DATA 0x0
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#define SET_THIS_BIT_TO_ZERO 0;
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//
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// Define bits per pixel codes.
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//
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#define ONE_BIT_PER_PIXEL 0 // 1-bit per pixel
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#define TWO_BITS_PER_PIXEL 1 // 2-bits per pixel
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#define FOUR_BITS_PER_PIXEL 2 // 4-bits per pixel
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#define EIGHT_BITS_PER_PIXEL 3 // 8-bits per pixel
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//
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// Define address step value.
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//
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#define ADDRESS_STEP_INCREMENT 1 // vram transfer address increment
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//
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// Define cross hair thickness values.
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//
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#define ONE_PIXEL_THICK 0x0 // one pixel in thickness
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#define THREE_PIXELS_THICK 0x1 // three pixels in thickness
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#define FIVE_PIXELS_THICK 0x2 // five pixels in thickness
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#define SEVEN_PIXELS_THICK 0x3 // seven pixels in thickness
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//
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// Define multiplexer control values.
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//
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#define ONE_TO_ONE 0x0 // 1:1 multiplexing
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#define FOUR_TO_ONE 0x1 // 4:1 multiplexing
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#define FIVE_TO_ONE 0x2 // 5:1 multiplexing
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//
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// Define cursor origin values.
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//
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#define CURSOR_X_ORIGIN (((2*HORIZONAL_SYNC_VALUE)+BACK_PORCH_VALUE)*4-36)
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#define CURSOR_Y_ORIGIN ((VERTICAL_BLANK_VALUE/2)+24)
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ULONG HotspotX, HotspotY;
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// Extended VGA BIOS
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#define SUPER_VGA_SUPPORT 4FH
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#define RET_EXT_VGA_INFO 00H
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#define RET_EXT_VGA_MODE_INFO 01H
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#define SET_EXT_VGA_MODE 02H
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#define QUERY_CUR_EXT_VGA_MODE 03H
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#define SAVE_RESTORE_FUNCTION 04H
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// Function 04.0 Query Save/Restore Buffer Size
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#define GET_SAVE_BUFFER_SIZE 00H
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// Function 04.1 Save Extended Video state
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#define SAVE_STATE 01H
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// Function 04.2 Restore Extended VGA state
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#define RESTORE_STATE 02H
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#define WINDOWS_CONTROL 05H
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// Function 05.0 Set Window Control
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#define SELECT_PAGE_TO_BE_MAPPED 00H
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// fUNCTION 05.1 Get Window Control Setting
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#define GET_PAGE_MAPPED 01H
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#define SET_RESET_DUAL_DISPLAY_MODE FFH
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BOOLEAN ColorMonitor;
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PVOID S3_3x4, S3_3x5;
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