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355 lines
8.7 KiB
355 lines
8.7 KiB
// #pragma comment(exestr, "@(#) jxsysint.c 1.1 95/09/28 15:40:45 nec")
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/*++
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Copyright (c) 1991-1993 Microsoft Corporation
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Module Name:
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jxsysint.c
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Abstract:
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This module implements the HAL enable/disable system interrupt, and
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request interprocessor interrupt routines for a MIPS R3000 or R4000
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Jazz system.
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Author:
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David N. Cutler (davec) 6-May-1991
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Environment:
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Kernel mode
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Revision History:
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Modification History for NEC R94A (MIPS R4400):
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H000 Thu Sep 8 10:32:42 JST 1994 kbnes!kishimoto
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- HalDisableSystemInterrupt()
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change Irql from EISA_DEVICE_LEVEL to EISA_PCI_DEVICE_LEVEL.
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add the PCI interrupt vector.
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Interrupt Enable register is zero origin on beta-version of
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STORM chipset.
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if ASIC3 register is zero, then chipset is beta-version.
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- HalEnableSystemInterrupt()
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change Irql from EISA_DEVICE_LEVEL to EISA_PCI_DEVICE_LEVEL.
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add the PCI interrupt vector.
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Interrupt Enable register is zero origin on beta-version of
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STORM chipset.
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if ASIC3 register is zero, then chipset is beta-version.
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- HalGetInterruptVector()
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add PCIBus interface.
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change Irql from EISA_DEVICE_LEVEL to EISA_PCI_DEVICE_LEVEL.
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If InterfaceType is Internal and ASIC3 register is zero,
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then return the vector which was plus the offset of DEVICE_VECTORS.
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H001 Mon Oct 17 14:21:21 JST 1994 kbnes!kishimoto
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- Hal(p)EisaPCIXXX() rename to Hal(p)EisaXXX()
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- XXX_EISA_PCI_XXX rename to XXX_EISA_XXX
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- MAXIMUM_PCI_SLOT rename to R94A_PCI_SLOT
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- HalGetInterruptVector()
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returns PCI-vector plus offset PCI_VECTORS.
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- modify original compile error
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CMP001 [email protected] Tue Oct 18 15:46:35 JST 1994
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- reslve compile error
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H002 Mon Oct 31 17:45:56 1994 kbnes!kishimoto
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- HalGetInterruptVector()
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Internal SCSI interrupt vector set to 5 (for BBM only)
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M003 [email protected] Fri Mar 31 17:06:37 JST 1995
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- add _IPI_LIMIT_ support
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S004 [email protected] Sat Apr 01 11:10:52 JST 1995
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- compile error clear
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H005 Fri Aug 11 16:53:13 1995 kbnes!kishimoto
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- delete M003, and HalGetInterruptVector(move to bushnd.c)
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M006 [email protected]
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- add for merge R94A/R94A'/R94D HAL
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--*/
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#include "halp.h"
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VOID
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HalDisableSystemInterrupt (
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IN ULONG Vector,
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IN KIRQL Irql
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)
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/*++
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Routine Description:
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This routine disables the specified system interrupt.
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Arguments:
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Vector - Supplies the vector of the system interrupt that is disabled.
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Irql - Supplies the IRQL of the interrupting source.
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Return Value:
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None.
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--*/
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{
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KIRQL OldIrql;
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//
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// Raise IRQL to the highest level and acquire device enable spinlock.
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//
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KeRaiseIrql(HIGH_LEVEL, &OldIrql);
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KiAcquireSpinLock(&HalpSystemInterruptLock);
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//
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// If the vector number is within the range of builtin devices, then
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// disable the builtin device interrupt.
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//
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if ((Vector >= (DEVICE_VECTORS + 1)) && (Vector <= MAXIMUM_BUILTIN_VECTOR)) {
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HalpBuiltinInterruptEnable &= ~(1 << (Vector - DEVICE_VECTORS - 1));
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#if defined(_R94A_)
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if ( READ_REGISTER_ULONG(&((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->ASIC3Revision.Long) == 0 ){
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//
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// The bit assign of TYPHOON(in STORM chipset)'s I/O Device Interrupt
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// Enable register is zero origin.
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//
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// N.B. This obstruction is limiteded to beta-version of STORM chipset.
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//
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WRITE_REGISTER_USHORT(&((PINTERRUPT_REGISTERS)INTERRUPT_VIRTUAL_BASE)->Fill,
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HalpBuiltinInterruptEnable);
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} else {
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WRITE_REGISTER_USHORT(&((PINTERRUPT_REGISTERS)INTERRUPT_VIRTUAL_BASE)->Enable,
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HalpBuiltinInterruptEnable);
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}
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#else
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WRITE_REGISTER_USHORT(&((PINTERRUPT_REGISTERS)INTERRUPT_VIRTUAL_BASE)->Enable,
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HalpBuiltinInterruptEnable);
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#endif
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}
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//
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// If the vector number is within the range of the EISA interrupts, then
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// disable the EISA interrrupt.
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//
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if (Vector >= EISA_VECTORS &&
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Vector < EISA_VECTORS + MAXIMUM_EISA_VECTOR &&
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Irql == EISA_DEVICE_LEVEL) {
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HalpDisableEisaInterrupt(Vector);
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}
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#if defined(_R94A_)
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//
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// If the vector number is within the range of the PCI interrupts, then
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// disable the PCI interrrupt.
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//
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if (Vector >= PCI_VECTORS &&
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Vector <= PCI_VECTORS + R94A_PCI_SLOT &&
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Irql == EISA_DEVICE_LEVEL) {
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HalpDisablePCIInterrupt(Vector);
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}
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#endif
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//
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// Release the device enable spin loc and lower IRQL to the previous level.
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//
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KiReleaseSpinLock(&HalpSystemInterruptLock);
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KeLowerIrql(OldIrql);
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return;
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}
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BOOLEAN
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HalEnableSystemInterrupt (
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IN ULONG Vector,
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IN KIRQL Irql,
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IN KINTERRUPT_MODE InterruptMode
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)
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/*++
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Routine Description:
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This routine enables the specified system interrupt.
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Arguments:
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Vector - Supplies the vector of the system interrupt that is enabled.
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Irql - Supplies the IRQL of the interrupting source.
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InterruptMode - Supplies the mode of the interrupt; LevelSensitive or
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Latched.
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Return Value:
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TRUE if the system interrupt was enabled
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--*/
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{
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KIRQL OldIrql;
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//
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// Raise IRQL to the highest level and acquire device enable spinlock.
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//
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KeRaiseIrql(HIGH_LEVEL, &OldIrql);
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KiAcquireSpinLock(&HalpSystemInterruptLock);
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//
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// If the vector number is within the range of builtin devices, then
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// enable the builtin device interrupt.
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//
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if ((Vector >= (DEVICE_VECTORS + 1)) && (Vector <= MAXIMUM_BUILTIN_VECTOR)) {
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HalpBuiltinInterruptEnable |= (1 << (Vector - DEVICE_VECTORS - 1));
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#if defined(_R94A_)
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if ( READ_REGISTER_ULONG(&((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->ASIC3Revision.Long) == 0 ){
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//
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// The bit assign of TYPHOON(in STORM chipset)'s I/O Device Interrupt
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// Enable register is zero origin.
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//
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// N.B. This obstruction is limiteded to beta-version of STORM chipset.
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//
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WRITE_REGISTER_USHORT(&((PINTERRUPT_REGISTERS)INTERRUPT_VIRTUAL_BASE)->Fill,
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HalpBuiltinInterruptEnable);
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} else {
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WRITE_REGISTER_USHORT(&((PINTERRUPT_REGISTERS)INTERRUPT_VIRTUAL_BASE)->Enable,
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HalpBuiltinInterruptEnable);
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}
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#else
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WRITE_REGISTER_USHORT(&((PINTERRUPT_REGISTERS)INTERRUPT_VIRTUAL_BASE)->Enable,
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HalpBuiltinInterruptEnable);
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#endif
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}
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//
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// If the vector number is within the range of the EISA interrupts, then
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// enable the EISA interrrupt and set the Level/Edge register.
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//
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if (Vector >= EISA_VECTORS &&
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Vector < EISA_VECTORS + MAXIMUM_EISA_VECTOR &&
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Irql == EISA_DEVICE_LEVEL) {
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HalpEnableEisaInterrupt( Vector, InterruptMode);
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}
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#if defined(_R94A_)
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//
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// If the vector number is within the range of the PCI interrupts, then
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// enable the PCI interrrupt.
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//
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if (Vector >= PCI_VECTORS &&
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Vector <= PCI_VECTORS + R94A_PCI_SLOT &&
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Irql == EISA_DEVICE_LEVEL) {
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HalpEnablePCIInterrupt(Vector);
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}
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#endif
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//
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// Release the device enable spin loc and lower IRQL to the previous level.
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//
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KiReleaseSpinLock(&HalpSystemInterruptLock);
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KeLowerIrql(OldIrql);
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return TRUE;
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}
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VOID
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HalRequestIpi (
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IN ULONG Mask
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)
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/*++
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Routine Description:
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This routine requests an interprocessor interrupt on a set of processors.
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N.B. This routine must ensure that the interrupt is posted at the target
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processor(s) before returning.
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Arguments:
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Mask - Supplies the set of processors that are sent an interprocessor
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interrupt.
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Return Value:
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None.
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--*/
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{
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#if defined(_DUO_) // S004
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//
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// For Merge R94A/R94A'/R94D HAL
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//
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// Old version need ChipSet Bug Workaround.
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//
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ULONG OldIpiReq;
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KIRQL OldIrql;
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if (HalpUseChipSetWorkaround) {
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//
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// Request an interprocessor interrupt on each of the specified target
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// processors.
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//
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KeRaiseIrql(HIGH_LEVEL,&OldIrql);
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KiAcquireSpinLock(&HalpIpiRequestLock);
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OldIpiReq = READ_REGISTER_ULONG(&((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->IpInterruptRequest.Long);
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WRITE_REGISTER_ULONG(&((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->IpInterruptRequest.Long,
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OldIpiReq | Mask);
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READ_REGISTER_ULONG(&((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->IpInterruptRequest.Long);
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KiReleaseSpinLock(&HalpIpiRequestLock);
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KeLowerIrql(OldIrql);
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} else {
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WRITE_REGISTER_ULONG(&((PDMA_REGISTERS)DMA_VIRTUAL_BASE)->IpInterruptRequest.Long, Mask);
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}
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#endif
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return;
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}
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