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200 lines
3.7 KiB
200 lines
3.7 KiB
#pragma comment(exestr, "@(#) allstart.c 1.6 94/12/07 23:10:52 nec")
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/*++
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Copyright (c) 1994 Microsoft Corporation
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Module Name:
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allstart.c
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Abstract:
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This module implements the platform specific operations that must be
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performed after all processors have been started.
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--*/
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/*
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* Original source: Build Number 1.807
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*
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* Modify for R98(MIPS/R4400)
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*
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***********************************************************************
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*
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* S001 '94.10/14 T.Samezima
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* Add HalpConnectInt1Interrupt()
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* valiable HalpInt1Affinity.
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* Call HalpConnectInt1Interrupt()
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* Del Call HalpCreateEisaStructures()
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*
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* S002 '94.10/18 T.Samezima
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* Chg Enable interrupt on MKR register only exist device,
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*
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* S003 '94.10/22 T.Samezima
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* Chg Issue restart timer interrupt on CPU#0 to all CPU
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*
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* S004 '94.12/07 T.Samezima
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* Del warning
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*
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*/
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#include "halp.h"
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// S001 vvv
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//
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// Define INT1 interrupt affinity.
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//
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KAFFINITY HalpInt1Affinity;
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BOOLEAN // S004
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HalpConnectInt1Interrupt(
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VOID
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);
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// S001 ^^^
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BOOLEAN
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HalAllProcessorsStarted (
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VOID
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)
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/*++
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Routine Description:
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This function executes platform specific operations that must be
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performed after all processors have been started. It is called
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for each processor in the host configuration.
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Arguments:
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None.
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Return Value:
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If platform specific operations are successful, then return TRUE.
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Otherwise, return FALSE.
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--*/
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{
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// S001, S003 vvv
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// Restart all timer interrupt. because, generate interrupt for same time
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//
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if (PCR->Number == 0) {
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WRITE_REGISTER_ULONG( &( PMC_CONTROL1 )->TCIR.Long,
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TCIR_ALL_CLOCK_RESTART); // S007
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}
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// S001, S003 ^^^
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//
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// If the number of processors in the host configuration is one,
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// then connect EISA interrupts to that processor zero. Otherwise,
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// connect EISA interrupts to processor one.
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//
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if (**((PULONG *)(&KeNumberProcessors)) == 1) {
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return HalpConnectInt1Interrupt(); // S001
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} else if (PCR->Number == 1) {
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return HalpConnectInt1Interrupt(); // S001
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} else {
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return TRUE;
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}
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}
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// S001 vvv
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ULONG AII1Mask;
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ULONG AII2Mask;
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BOOLEAN // S004
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HalpConnectInt1Interrupt(
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VOID
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)
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/*++
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Routine Description:
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This function connect int1 interrupt on execution processor.
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Arguments:
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None.
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Return Value:
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return TRUE.
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--*/
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{
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ULONG number;
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ULONG pmcRegisterAddr;
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ULONG pmcRegisterUpperPart;
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ULONG pmcRegisterLowerPart;
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//
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// Get CPU number.
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//
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number = PCR->Number;
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//
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// Set route for notice of interrupt
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//
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AII1Mask = AII_INIT_DATA >> number;
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AII2Mask = ( ((AII_INIT_DATA >> number) & 0xffff0000)
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| (AII_INIT_DATA & 0x0000ffff) );
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WRITE_REGISTER_ULONG( &( IOB_CONTROL )->AII1.Long,
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AII1Mask );
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WRITE_REGISTER_ULONG( &( IOB_CONTROL )->AII2.Long,
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AII2Mask );
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//
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// Enable INT1 interrupt on PMC
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//
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pmcRegisterAddr = (ULONG)( &(PMC_CONTROL1)->MKR );
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HalpReadLargeRegister( pmcRegisterAddr,
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&pmcRegisterUpperPart,
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&pmcRegisterLowerPart );
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pmcRegisterLowerPart = ( pmcRegisterLowerPart | MKR_INT1_DEVICE_ENABLE_LOW ); // S002
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HalpWriteLargeRegister( pmcRegisterAddr,
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&pmcRegisterUpperPart,
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&pmcRegisterLowerPart );
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PCR->ReservedVectors |= (1 << INT1_LEVEL);
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//
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// Set Int1 interrupt affinity.
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//
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HalpInt1Affinity = PCR->SetMember;
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//
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// Initialize the interrupt dispatcher for I/O interrupts.
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//
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PCR->InterruptRoutine[INT1_LEVEL] = (PKINTERRUPT_ROUTINE) HalpInt1Dispatch;
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//
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// Initialize EISA bus interrupts.
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//
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HalpCreateEisaStructures();
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//
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// Initialize PCI bus interrupts.
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//
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return HalpCreatePciStructures ();
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}
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// S001 ^^^
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