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454 lines
10 KiB
454 lines
10 KiB
#ident "@(#) NEC jxsysint.c 1.13 94/11/08 16:20:09"
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/*++
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Copyright (c) 1991-1994 Microsoft Corporation
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Module Name:
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jxsysint.c
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Abstract:
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This module implements the HAL enable/disable system interrupt, and
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request interprocessor interrupt routines for R98
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--*/
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/*
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* Original source: Build Number 1.612
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*
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* Modify for R98(MIPS/R4400)
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*
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***********************************************************************
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*
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* M001 94.03/25-5/31 T.Samezima
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*
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* Change Interrupt control
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* Irql level
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*
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* Add Correspond to PCIBus
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* Exchange mask data
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* define table of ipi interrupt request
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*
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* Del #ifdef DUO
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*
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***********************************************************************
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*
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* S002 94.06/02 T.Samezima
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*
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* Add HalGetInterruptVector
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*
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***********************************************************************
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*
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* S003 94,6/10 T.Samezima
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*
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* Del Compile err
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*
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***********************************************************************
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*
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* S004 94,7/5 T.Samezima
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*
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* Chg Mask value
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* Maximun EISA vecter
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*
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***********************************************************************
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*
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* S005 94,7/8 T.Samezima
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*
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* Chg Maximun EISA vecter
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*
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***********************************************************************
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*
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* S006 94,7/21 T.Samezima
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*
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* Chg Fixd to PCI
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*
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*
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***********************************************************************
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*
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* S007 94,8/22 T.Samezima on SNES
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*
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* Chg Designate member
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*
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***********************************************************************
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*
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* K001 94/09/26 N.Kugimoto
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* Mov Move Source code to r98busdat.c
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***********************************************************************
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*
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* S008 94/09/30 T.Samezima
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*
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* Bug Miss define of PCI Interrupt vector.
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*
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* S009 94/11/08 T.Samezima
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* Bug Miss define of IpiRequestMask.
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*
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*
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*/
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#include "halp.h"
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/* Start M001 */
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//
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// Define Ipi Interrupt Reqest value table.
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//
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/* Start S003 */
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ULONG HalpIpiIntRequestMask[] = {
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IntIR_REQUEST_IPI | (0x00 << IntIR_CPU3_BIT) , // 0000 -> 0000
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IntIR_REQUEST_IPI | (0x08 << IntIR_CPU3_BIT) , // 0001 -> 1000
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IntIR_REQUEST_IPI | (0x04 << IntIR_CPU3_BIT) , // 0010 -> 0100
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IntIR_REQUEST_IPI | (0x0c << IntIR_CPU3_BIT) , // 0011 -> 1100
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IntIR_REQUEST_IPI | (0x02 << IntIR_CPU3_BIT) , // 0100 -> 0010
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IntIR_REQUEST_IPI | (0x0a << IntIR_CPU3_BIT) , // 0101 -> 1010
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IntIR_REQUEST_IPI | (0x06 << IntIR_CPU3_BIT) , // 0110 -> 0110
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IntIR_REQUEST_IPI | (0x0e << IntIR_CPU3_BIT) , // 0111 -> 1110
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IntIR_REQUEST_IPI | (0x01 << IntIR_CPU3_BIT) , // 1000 -> 0001
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IntIR_REQUEST_IPI | (0x09 << IntIR_CPU3_BIT) , // 1001 -> 1001
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IntIR_REQUEST_IPI | (0x05 << IntIR_CPU3_BIT) , // 1010 -> 0101
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IntIR_REQUEST_IPI | (0x0d << IntIR_CPU3_BIT) , // 1011 -> 1101
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IntIR_REQUEST_IPI | (0x03 << IntIR_CPU3_BIT) , // 1100 -> 0011 // S009
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IntIR_REQUEST_IPI | (0x0b << IntIR_CPU3_BIT) , // 1101 -> 1011
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IntIR_REQUEST_IPI | (0x07 << IntIR_CPU3_BIT) , // 1110 -> 0111
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IntIR_REQUEST_IPI | (0x0f << IntIR_CPU3_BIT) // 1111 -> 1111
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};
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/* End S003 */
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/* End M001 */
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VOID
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HalDisableSystemInterrupt (
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IN ULONG Vector,
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IN KIRQL Irql
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)
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/*++
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Routine Description:
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This routine disables the specified system interrupt.
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Arguments:
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Vector - Supplies the vector of the system interrupt that is disabled.
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Irql - Supplies the IRQL of the interrupting source.
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Return Value:
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None.
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--*/
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{
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KIRQL OldIrql;
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//
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// Raise IRQL to the highest level and acquire device enable spinlock.
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//
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KeRaiseIrql(HIGH_LEVEL, &OldIrql);
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KiAcquireSpinLock(&HalpSystemInterruptLock);
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//
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// If the vector number is within the range of builtin devices, then
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// disable the builtin device interrupt.
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//
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if ((Vector >= (DEVICE_VECTORS + 1)) && (Vector <= MAXIMUM_BUILTIN_VECTOR)) {
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HalpBuiltinInterruptEnable &= ~(1 << (Vector - DEVICE_VECTORS - 1));
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/* Start M001 */
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WRITE_REGISTER_ULONG( &( LR_CONTROL2 )->iREN,
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HalpBuiltinInterruptEnable);
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/* End M001 */
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}
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//
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// If the vector number is within the range of the EISA interrupts, then
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// disable the EISA interrrupt.
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//
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/* Start M001 */
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/* Start S003 */
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if (Vector >= EISA_VECTORS &&
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Vector <= MAXIMUM_EISA_VECTORS && // S004
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Irql == INT1_LEVEL) {
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HalpDisableEisaInterrupt(Vector);
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}
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/* End S003 */
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//
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// If the vector number is within the range of the PCI interrupts, then
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// disable the PCI interrrupt.
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//
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/* Start S006 */
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if (Vector == PCI_DEVICE_VECTOR && Irql == INT1_LEVEL) {
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HalpDisablePciInterrupt(Vector);
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}
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/* End S006 */
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/* End M001 */
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//
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// Release the device enable spin loc and lower IRQL to the previous level.
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//
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KiReleaseSpinLock(&HalpSystemInterruptLock);
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KeLowerIrql(OldIrql);
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return;
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}
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BOOLEAN
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HalEnableSystemInterrupt (
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IN ULONG Vector,
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IN KIRQL Irql,
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IN KINTERRUPT_MODE InterruptMode
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)
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/*++
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Routine Description:
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This routine enables the specified system interrupt.
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Arguments:
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Vector - Supplies the vector of the system interrupt that is enabled.
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Irql - Supplies the IRQL of the interrupting source.
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InterruptMode - Supplies the mode of the interrupt; LevelSensitive or
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Latched.
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Return Value:
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TRUE if the system interrupt was enabled
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--*/
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{
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KIRQL OldIrql;
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//
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// Raise IRQL to the highest level and acquire device enable spinlock.
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//
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KeRaiseIrql(HIGH_LEVEL, &OldIrql);
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KiAcquireSpinLock(&HalpSystemInterruptLock);
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//
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// If the vector number is within the range of builtin devices, then
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// enable the builtin device interrupt.
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//
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if ((Vector >= (DEVICE_VECTORS + 1)) && (Vector <= MAXIMUM_BUILTIN_VECTOR)) {
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HalpBuiltinInterruptEnable |= (1 << (Vector - DEVICE_VECTORS - 1));
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/* Start M001 */
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WRITE_REGISTER_ULONG( &( LR_CONTROL2 )->iREN,
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HalpBuiltinInterruptEnable);
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/* End M001 */
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}
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//
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// If the vector number is within the range of the EISA interrupts, then
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// enable the EISA interrrupt and set the Level/Edge register.
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//
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/* Start M001 */
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/* Start S003 */
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if (Vector >= EISA_VECTORS &&
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Vector <= MAXIMUM_EISA_VECTORS && // S005
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Irql == INT1_LEVEL) {
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HalpEnableEisaInterrupt( Vector, InterruptMode);
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}
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/* End S003 */
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//
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// If the vector number is within the range of the PCI interrupts, then
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// disable the PCI interrrupt.
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//
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/* Start S006 */
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if (Vector == PCI_DEVICE_VECTOR && Irql == INT1_LEVEL) {
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HalpEnablePciInterrupt(Vector);
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}
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/* End S006 */
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/* End M001 */
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//
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// Release the device enable spin loc and lower IRQL to the previous level.
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//
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KiReleaseSpinLock(&HalpSystemInterruptLock);
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KeLowerIrql(OldIrql);
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return TRUE;
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}
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VOID
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HalRequestIpi (
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IN ULONG Mask
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)
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/*++
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Routine Description:
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This routine requests an interprocessor interrupt on a set of processors.
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N.B. This routine must ensure that the interrupt is posted at the target
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processor(s) before returning.
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Arguments:
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Mask - Supplies the set of processors that are sent an interprocessor
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interrupt.
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Return Value:
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None.
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--*/
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{
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/* Start M001 */
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ULONG buffer;
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/* End M001 */
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//
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// Request an interprocessor interrupt on each of the specified target
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// processors.
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//
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/* Start M001 */
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buffer = HalpIpiIntRequestMask[(Mask & 0xf)] | // S004
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( (((PCR->Prcb)->Number) & 0x3) << IntIR_CODE_BIT );
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WRITE_REGISTER_ULONG( &( PMC_CONTROL1 )->IntIR.Long, buffer); // S007
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/* End M001 */
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return;
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}
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#if 0 //K001
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ULONG
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HalGetInterruptVector(
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IN INTERFACE_TYPE InterfaceType,
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IN ULONG BusNumber,
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IN ULONG BusInterruptLevel,
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IN ULONG BusInterruptVector,
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OUT PKIRQL Irql,
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OUT PKAFFINITY Affinity
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)
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/*++
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Routine Description:
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This function returns the system interrupt vector and IRQL level
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corresponding to the specified bus interrupt level and/or vector.
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The system interrupt vector and IRQL are suitable for use in a
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subsequent call to KeInitializeInterrupt.
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Arguments:
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InterfaceType - Supplies the type of bus which the vector is for.
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BusNumber - Supplies the bus number for the device.
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BusInterruptLevel - Supplies the bus specific interrupt level.
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BusInterruptVector - Supplies the bus specific interrupt vector.
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Irql - Returns the system request priority.
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Affinity - Returns the affinity for the requested vector.
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Return Value:
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Returns the system interrupt vector corresponding to the specified device.
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--*/
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{
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//
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// N.B. On Jazz systems which are single processor systems, all interrupts
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// go to processor 0. On Duo systems both processors could handle
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// interrupts, but the hardware does not arbitrate and distribute
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// interrupts, and therefore, both processors would get all interrupts.
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//
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*Affinity = 1;
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//
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// If this is for the internal bus then just return the passed parameter.
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//
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if (InterfaceType == Internal) {
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//
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// Return the passed parameters.
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//
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*Irql = (KIRQL)BusInterruptLevel;
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/* Start S002 */
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return(BusInterruptVector + DEVICE_VECTORS);
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/* End S002 */
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}
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/* Start S002 */
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//
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// If this is for the pci bus then just return the passed parameter.
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//
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if (InterfaceType == PCIBus) {
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//
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// Return the passed parameters.
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//
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*Irql = INT1_LEVEL;
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return(PCI_DEVICE_VECTOR); // S008
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}
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/* End S002 */
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if (InterfaceType != Isa && InterfaceType != Eisa) {
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//
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// Not on this system return nothing.
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//
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*Affinity = 0;
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*Irql = 0;
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return(0);
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}
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//
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// Jazz and Duo only have one I/O bus which is an EISA, so the bus
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// number and the bus interrupt vector are unused.
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//
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// The IRQL level is always equal to the EISA level.
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//
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/* Start S001 */
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*Irql = INT1_LEVEL;
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/* End S001 */
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//
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// Bus interrupt level 2 is actually mapped to bus level 9 in the Eisa
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// hardware.
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//
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if (BusInterruptLevel == 2) {
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BusInterruptLevel = 9;
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}
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//
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// The vector is equal to the specified bus level plus the EISA_VECTOR.
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//
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return(BusInterruptLevel + EISA_VECTORS);
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}
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#endif
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