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93 lines
4.4 KiB
93 lines
4.4 KiB
//#pragma comment(exestr, "$Header: /usr4/winnt/SOURCES/ddk35/src/hal/halsni/mips/RCS/deskdef.h,v 1.1 1994/10/13 15:47:06 holli Exp $")
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/*+++
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Copyright (c) 1993-1994 Siemens Nixdorf Informationssysteme AG
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Module Name:
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DESKdef.h
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Abstract:
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This file describes hardware addresses for the new
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SNI Desktop Model (RM200)
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which are not common to all SNI machines.
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---*/
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#ifndef _DESKDEF_
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#define _DESKDEF_
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//
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// define various masks for the interrupt sources register
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//
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/*
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The interrupt Source Register on an Desktop has the following bits:
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7 6 5 4 3 2 1 0
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+---------------|---------------+
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| 0 | 0 | x | 0 | 1 | 0 | 1 | 1 | 0 Low Activ; 1 High activ; x not connected
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+---------------|---------------+
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|________ ISA (onboard)Interrupt
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|____________ EISA (extension board) Interrupt
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|________________ SCSI Interrupt (SCSI Driver)
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|____________________ Ethernet (Net driver)
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|________________________ Push Button (HalpInt5Dispatch)
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|____________________________ unused
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|________________________________ TimeOut Interrupt
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|____________________________________ Eisa extension board installed
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*/
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#define RM200_ONBOARD_MASK 0x01
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#define RM200_EISA_MASK 0x02
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#define RM200_SCSI_MASK 0x04
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#define RM200_NET_MASK 0x08
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#define RM200_PB_MASK 0x10
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#define RM200_TIMEOUT_MASK 0x20
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#define RM200_INTERRUPT_MASK 0x54
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#define RM200_ONBOARD_CONTROL_PHYSICAL_BASE 0x16000000
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#define RM200_ONBOARD_MEMORY_PHYSICAL_BASE 0x12000000
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#define RM200_ONBOARD_IO (RM200_ONBOARD_CONTROL_PHYSICAL_BASE | KSEG1_BASE)
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#define RM200_ONBOARD_MEMORY (RM200_ONBOARD_MEMORY_PHYSICAL_BASE | KSEG1_BASE)
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//
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// SNI ASIC registers
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//
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#define RM200_ONBOARD_INT_ACK_PHYSICAL_BASE 0x1a080000 // physical base of interrupt (ext. request) register
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#define RM200_ONBOARD_INT_ACK_REGISTER 0xba080000 // physical base | KSEG1_BASE
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#define RM200_EISA_INT_ACK_PHYSICAL_BASE 0x1a000000 // physical base of EISA interrupt ack for the chipset
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#define RM200_EISA_INT_ACK_REGISTER 0xba000000 // physical base | KSEG1_BASE
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#define RM200_INTERRUPT_SOURCE_PHYSICAL_BASE 0x1c000000 // physical base of interrupt source register
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#define RM200_INTERRUPT_SOURCE_REGISTER 0xbc000000 // physical base | KSEG1_BASE
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#define RM200_INTERRUPT_MASK_PHYSICAL_BASE 0x1c080000 // physical base of interrupt mask register
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#define RM200_INTERRUPT_MASK_REGISTER 0xbc080000 // physical base | KSEG1_BASE
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#define RM200_ONBOARD_MAP_PHYSICAL_BASE 0x1fc80000 // physical base of ISA map register (for BusMaster Devices)
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#define RM200_ONBOARD_MAP 0xbfc80000 // physical base | KSEG1_BASE
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#define RM200_EXTENSION_BOARD_MAP_PHYS_BASE 0x1fca0000 // physical base of ISA map register (for BusMaster Devices)
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#define RM200_EXTENSION_BOARD_MAP 0xbfca0000 // physical base | KSEG1_BASE
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#define RM200_VESA_MAP_PHYSICAL_BASE 0x1fcc0000 // physical base of VLB map register
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#define RM200_VESA_MAP 0xbfcc0000 // physical base | KSEG1_BASE
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#define RM200_ONBOARD_VRAM_PHYSICAL_BASE 0x1e000000 // physical base of onboard Video Ram
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#define RM200_ONBOARD_VRAM 0xbe000000 // physical base | KSEG1_BASE
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#define RM200_LED_PHYSICAL_ADDR 0x1fe00000 // LED Register physical
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#define RM200_LED_ADDR 0xbfe00000 // LED Register | KSEG1_BASE
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#define RM200_MCR_PHYSICAL_ADDR 0x1fd80000 // MachineConfigRegister
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#define RM200_MCR_ADDR 0xbfd80000 // MachineConfigRegister | KSEG1
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#define RM200_NVRAM_PHYSICAL_BASE 0x1cd40000 // physical base of nonvolatile RAM and RTC
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#define RM200_REAL_TIME_CLOCK_ADDRESS 0x1cd40000 // physical base of RTC
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#define RM200_REAL_TIME_CLOCK 0xbcd40000 // physical base of RTC | KSEG1_BASE
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#define RM200_RESET_DBG_BUT 0xbfe80000 // reset debugger int | KSEG1_BASE
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#define RM200_RESET_TEMPBAT_INTR 0xbfe80000 // reset Temperature/Battery int | KSEG1
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#endif // _DESKDEF_
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