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422 lines
7.8 KiB
422 lines
7.8 KiB
//#pragma comment(exestr, "$Header: /usr4/winnt/SOURCES/halpcims/src/hal/halsnipm/mips/RCS/snihalp.h,v 1.5 1996/03/12 14:56:20 pierre Exp $")
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/*++
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Copyright (c) 1991-1993 Microsoft Corporation
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Module Name:
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SNIhalp.h, original file jxhalp.h
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Abstract:
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This header file defines the private Hardware Architecture Layer (HAL)
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SNI specific interfaces, defines and structures.
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--*/
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#ifndef _SNIHALP_
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#define _SNIHALP_
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#include "SNIdef.h"
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//
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// Determine if an virtual address is really a physical address.
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//
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#define HALP_IS_PHYSICAL_ADDRESS(Va) \
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((((ULONG)Va >= KSEG0_BASE) && ((ULONG)Va < KSEG2_BASE)) ? TRUE : FALSE)
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#define IS_KSEG0_ADDRESS(Va) \
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((((ULONG)Va >= KSEG0_BASE) && ((ULONG)Va < KSEG1_BASE)) ? TRUE : FALSE)
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#define IS_KSEG1_ADDRESS(Va) \
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((((ULONG)Va >= KSEG1_BASE) && ((ULONG)Va < KSEG2_BASE)) ? TRUE : FALSE)
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#define KSEG0_TO_KSEG1(Va) { \
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Va &= ~KSEG0_BASE; \
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Va |= KSEG1_BASE; \
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}
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//
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// Define global data used to locate the EISA control space and the realtime
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// clock registers.
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//
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extern PVOID HalpEisaControlBase;
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extern PVOID HalpOnboardControlBase;
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extern PVOID HalpEisaMemoryBase;
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extern PVOID HalpRealTimeClockBase;
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extern PVOID HalpEisaMemoryBase;
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extern UCHAR HalpIsMulti;
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extern BOOLEAN HalpIsTowerPci;
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extern ULONG HalpMpaCacheReplace; // address to be used for cache replace operation.
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extern ULONG HalpTwoWayBit; // size of one set for associative cache R5000-R4600-R4700
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//
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// possibly processor types for SNI machines ...
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//
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typedef enum _HalpProcessorType {
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ORIONSC, // Orion + Writeback secondary cache
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MPAGENT, // R4000 + MpAgent
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R4x00, // R4000 SC
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UNKNOWN // not yet identified (initial value)
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} HalpProcessorType;
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//
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// Kind of processor of SNI machines
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//
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extern HalpProcessorType HalpProcessorId;
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#define HalpR4600 32
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#define HalpR4700 33
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//
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// possibly moterboard types for SNI machines ...
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//
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typedef enum _MotherBoardType {
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// M8022 = 2, // RM400-10 mother board
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// M8022D = 3, // RM400-10 mother board (new PCB)
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// M8032 = 4, // RM400 Tower
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// M8042 = 5, // RM400 Minitower
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M8150 = 6, // RM400 PCI Tower
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// M8036 = 7, // RM200 Desktop
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MinitowerPCI= 8, // minitower PCI
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DesktopPCI = 9 // Desktop PCI
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} MotherBoardType;
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//
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// Kind of Mainboard of SNI machines
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//
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extern MotherBoardType HalpMainBoard;
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//
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// Define map register translation entry structure.
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//
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typedef struct _TRANSLATION_ENTRY {
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PVOID VirtualAddress;
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ULONG PhysicalAddress;
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ULONG Index;
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} TRANSLATION_ENTRY, *PTRANSLATION_ENTRY;
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//
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// Define adapter object structure.
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//
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typedef struct _ADAPTER_OBJECT {
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CSHORT Type;
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CSHORT Size;
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struct _ADAPTER_OBJECT *MasterAdapter;
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ULONG MapRegistersPerChannel;
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PVOID AdapterBaseVa;
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PVOID MapRegisterBase;
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ULONG NumberOfMapRegisters;
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ULONG CommittedMapRegisters;
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struct _WAIT_CONTEXT_BLOCK *CurrentWcb;
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KDEVICE_QUEUE ChannelWaitQueue;
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PKDEVICE_QUEUE RegisterWaitQueue;
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LIST_ENTRY AdapterQueue;
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KSPIN_LOCK SpinLock;
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PRTL_BITMAP MapRegisters;
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PUCHAR PagePort;
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UCHAR ChannelNumber;
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UCHAR AdapterNumber;
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USHORT DmaPortAddress;
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UCHAR AdapterMode;
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BOOLEAN NeedsMapRegisters;
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BOOLEAN MasterDevice;
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BOOLEAN Width16Bits;
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BOOLEAN ScatterGather;
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INTERFACE_TYPE InterfaceType;
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} ADAPTER_OBJECT;
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extern PADAPTER_OBJECT MasterAdapterObject;
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extern POBJECT_TYPE *IoAdapterObjectType;
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extern BOOLEAN LessThan16Mb;
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extern BOOLEAN HalpEisaDma;
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//
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// Map buffer parameters. These are initialized in HalInitSystem
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//
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extern PHYSICAL_ADDRESS HalpMapBufferPhysicalAddress;
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extern ULONG HalpMapBufferSize;
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//
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// Firmware interface
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//
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typedef struct {
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CHAR (*getchar)();
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PCHAR (*gets)();
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VOID (*printf)();
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PCHAR (*parsefile)();
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VOID (*reinit_slave)();
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ULONG DCU_reserved;
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UCHAR ActiveProcessor[4];
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USHORT DCU_reserved_bis;
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USHORT EccErrorSimmNum;
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ULONG EccErrorAddress;
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struct mpmsg_s *MsgPassArea;
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struct bank *MemConfArea;
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ULONG NbMemBanks;
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ULONG scram_ctlr; // fw reserved (ram disk)
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ULONG (*EipRoutine)();
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ULONG EipContext;
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UCHAR EipHalInfo;
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UCHAR pad[3];
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ULONG reserved[5];
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} SNI_PRIVATE_VECTOR;
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// definitions for DCU_reserved_bis
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#define FLAG_ECC_ERROR 1
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struct mpmsg_s {
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ULONG *mpmsg_wlckp; /* pointer to the writer lock */
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ULONG *mpmsg_bp; /* beginning pointer message[0] */
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ULONG *mpmsg_ep; /* endding pointer message[MPMSG_NMAXMSG] */
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ULONG *mpmsg_rp; /* current read pointer in message[] */
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ULONG *mpmsg_wp; /* current write pointer in message[] */
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};
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struct bank {
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ULONG total_size;
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UCHAR *first_addr;
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ULONG first_piece_size;
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UCHAR *second_addr;
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ULONG second_piece_size;
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};
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//
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// Define function prototypes.
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//
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ULONG
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HalpGetStatusRegister(
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VOID
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);
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ULONG
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HalpSetStatusRegister(
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ULONG Value
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);
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ULONG
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HalpGetCauseRegister(
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VOID
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);
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ULONG
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HalpSetCauseRegister(
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ULONG value
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);
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ULONG
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HalpGetConfigRegister(
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VOID
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);
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ULONG
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HalpSetConfigRegister(
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ULONG value
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);
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BOOLEAN
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HalpMapIoSpace(
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VOID
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);
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VOID
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HalpInitializePCIBus (
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VOID
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);
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BOOLEAN
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HalpCreateIntStructures(
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VOID
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);
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BOOLEAN
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HalpCreateIntMultiStructures (
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VOID
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);
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BOOLEAN
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HalpCreateIntPciStructures (
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VOID
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);
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BOOLEAN
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HalpCreateEisaStructures(
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IN INTERFACE_TYPE Interface
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);
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VOID
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HalpDisableEisaInterrupt(
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IN ULONG Vector
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);
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VOID
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HalpDisableInterrupts(
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VOID
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);
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VOID
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HalpEnableEisaInterrupt(
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IN ULONG Vector,
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IN KINTERRUPT_MODE InterruptMode
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);
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VOID
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HalpDisableOnboardInterrupt(
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IN ULONG Vector
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);
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VOID
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HalpEnableOnboardInterrupt(
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IN ULONG Vector,
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IN KINTERRUPT_MODE InterruptMode
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);
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BOOLEAN
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HalpGrowMapBuffers(
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PADAPTER_OBJECT AdapterObject,
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ULONG Amount
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);
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PADAPTER_OBJECT
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HalpAllocateAdapter(
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IN ULONG MapRegistersPerChannel,
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IN PVOID AdapterBaseVa,
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IN PVOID MapRegisterBase
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);
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ULONG
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HalpAllocPhysicalMemory(
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IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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IN ULONG MaxPhysicalAddress,
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IN ULONG NoPages,
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IN BOOLEAN bAlignOn64k
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);
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BOOLEAN
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HalpPciInt0Dispatch(
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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BOOLEAN
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HalpPciTowerInt0Dispatch(
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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BOOLEAN
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HalpPciTowerInt3Dispatch(
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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BOOLEAN
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HalpRM200Int0Dispatch(
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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BOOLEAN
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HalpRM400Int0Dispatch(
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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BOOLEAN
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HalpRM400TowerInt0Dispatch(
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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BOOLEAN
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HalpInt1Dispatch(
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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BOOLEAN
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HalpRM400Int3Process (
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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BOOLEAN
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HalpRM400Int4Process (
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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BOOLEAN
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HalpRM400Int5Process (
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext
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);
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VOID
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HalpSystemInit(
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VOID
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);
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VOID
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HalpDisplayCopyRight(
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VOID
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);
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VOID
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HalpClearVGADisplay(
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VOID
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);
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VOID
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HalpIpiInterrupt(
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VOID
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);
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VOID
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HalpInitMPAgent(
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ULONG Number
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);
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ULONG
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HalpProcIdentify(
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VOID
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);
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BOOLEAN
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HalpPciEccCorrector(
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ULONG Addr,
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ULONG Pfn,
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ULONG Length
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);
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BOOLEAN
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HalpMultiPciEccCorrector(
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ULONG Addr,
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ULONG Pfn,
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ULONG Length
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);
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#endif // _SNIHALP_
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