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428 lines
7.8 KiB
428 lines
7.8 KiB
/*++ BUILD Version: 0001 // Increment this if a change has global effects
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Copyright (c) 1991 Microsoft Corporation
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Module Name:
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halp.h
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Abstract:
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This header file defines the private Hardware Architecture Layer (HAL)
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interfaces, defines and structures.
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Author:
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John Vert (jvert) 11-Feb-92
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Revision History:
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--*/
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#ifndef _HALP_
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#define _HALP_
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#include "nthal.h"
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#include "hal.h"
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#include "halnls.h"
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#ifndef _HALI_
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#include "..\inc\hali.h"
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#endif
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#ifdef RtlMoveMemory
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#undef RtlMoveMemory
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#undef RtlCopyMemory
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#undef RtlFillMemory
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#undef RtlZeroMemory
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#define RtlCopyMemory(Destination,Source,Length) RtlMoveMemory((Destination),(Source),(Length))
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VOID
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RtlMoveMemory (
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PVOID Destination,
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CONST VOID *Source,
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ULONG Length
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);
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VOID
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RtlFillMemory (
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PVOID Destination,
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ULONG Length,
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UCHAR Fill
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);
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VOID
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RtlZeroMemory (
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PVOID Destination,
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ULONG Length
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);
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#endif
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#if MCA
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#include "ixmca.h"
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#else
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#include "ixisa.h"
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#endif
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#include "ix8259.inc"
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//
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// Define map register translation entry structure.
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//
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typedef struct _TRANSLATION_ENTRY {
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PVOID VirtualAddress;
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ULONG PhysicalAddress;
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ULONG Index;
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} TRANSLATION_ENTRY, *PTRANSLATION_ENTRY;
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//
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// Some devices require a phyicially contiguous data buffers for DMA transfers.
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// Map registers are used give the appearance that all data buffers are
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// contiguous. In order to pool all of the map registers a master
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// adapter object is used. This object is allocated and saved internal to this
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// file. It contains a bit map for allocation of the registers and a queue
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// for requests which are waiting for more map registers. This object is
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// allocated during the first request to allocate an adapter which requires
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// map registers.
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//
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// In this system, the map registers are translation entries which point to
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// map buffers. Map buffers are physically contiguous and have physical memory
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// addresses less than 0x01000000. All of the map registers are allocated
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// initialially; however, the map buffers are allocated base in the number of
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// adapters which are allocated.
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//
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// If the master adapter is NULL in the adapter object then device does not
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// require any map registers.
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//
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extern PADAPTER_OBJECT MasterAdapterObject;
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extern POBJECT_TYPE *IoAdapterObjectType;
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extern BOOLEAN LessThan16Mb;
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extern BOOLEAN HalpEisaDma;
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//
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// Map buffer prameters. These are initialized in HalInitSystem
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//
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extern PHYSICAL_ADDRESS HalpMapBufferPhysicalAddress;
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extern ULONG HalpMapBufferSize;
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extern ULONG HalpBusType;
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extern ULONG HalpCpuType;
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extern UCHAR HalpSerialLen;
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extern UCHAR HalpSerialNumber[];
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//
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// The following macros are taken from mm\i386\mi386.h. We need them here
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// so the HAL can map its own memory before memory-management has been
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// initialized, or during a BugCheck.
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//
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#define PTE_BASE ((ULONG)0xC0000000)
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#define PDE_BASE ((ULONG)0xC0300000)
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//
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// MiGetPdeAddress returns the address of the PDE which maps the
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// given virtual address.
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//
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#define MiGetPdeAddress(va) ((PHARDWARE_PTE)(((((ULONG)(va)) >> 22) << 2) + PDE_BASE))
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//
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// MiGetPteAddress returns the address of the PTE which maps the
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// given virtual address.
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//
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#define MiGetPteAddress(va) ((PHARDWARE_PTE)(((((ULONG)(va)) >> 12) << 2) + PTE_BASE))
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//
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// Resource usage information
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//
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#pragma pack(1)
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typedef struct {
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UCHAR Flags;
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KIRQL Irql;
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UCHAR BusReleativeVector;
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} IDTUsage;
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typedef struct _HalAddressUsage{
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struct _HalAddressUsage *Next;
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CM_RESOURCE_TYPE Type; // Port or Memory
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UCHAR Flags; // same as IDTUsage.Flags
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struct {
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ULONG Start;
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ULONG Length;
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} Element[];
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} ADDRESS_USAGE;
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#pragma pack()
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#define IDTOwned 0x01 // IDT is not available for others
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#define InterruptLatched 0x02 // Level or Latched
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#define InternalUsage 0x11 // Report usage on internal bus
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#define DeviceUsage 0x21 // Report usage on device bus
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extern IDTUsage HalpIDTUsage[];
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extern ADDRESS_USAGE *HalpAddressUsageList;
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#define HalpRegisterAddressUsage(a) \
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(a)->Next = HalpAddressUsageList, HalpAddressUsageList = (a);
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//
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// Temp definitions to thunk into supporting new bus extension format
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//
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VOID
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HalpRegisterInternalBusHandlers (
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VOID
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);
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PBUS_HANDLER
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HalpAllocateBusHandler (
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IN INTERFACE_TYPE InterfaceType,
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IN BUS_DATA_TYPE BusDataType,
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IN ULONG BusNumber,
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IN INTERFACE_TYPE ParentBusDataType,
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IN ULONG ParentBusNumber,
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IN ULONG BusSpecificData
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);
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#define HalpHandlerForBus HaliHandlerForBus
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#define HalpSetBusHandlerParent(c,p) (c)->ParentHandler = p;
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//
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// Define function prototypes.
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//
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VOID
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HalInitSystemPhase2(
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VOID
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);
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KIRQL
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HaliRaiseIrqlToDpcLevel (
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VOID
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);
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BOOLEAN
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HalpGrowMapBuffers(
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PADAPTER_OBJECT AdapterObject,
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ULONG Amount
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);
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PADAPTER_OBJECT
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HalpAllocateAdapter(
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IN ULONG MapRegistersPerChannel,
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IN PVOID AdapterBaseVa,
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IN PVOID MapRegisterBase
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);
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VOID
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HalpClockInterrupt(
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VOID
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);
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VOID
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HalpDisableAllInterrupts (
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VOID
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);
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VOID
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HalpProfileInterrupt(
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VOID
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);
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VOID
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HalpInitializeClock(
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VOID
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);
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VOID
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HalpInitializeDisplay(
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VOID
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);
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VOID
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HalpInitializeStallExecution(
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IN CCHAR ProcessorNumber
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);
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VOID
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HalpInitializePICs(
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VOID
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);
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VOID
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HalpIrq13Handler (
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VOID
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);
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VOID
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HalpFlushTLB (
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VOID
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);
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VOID
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HalpSerialize (
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VOID
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);
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PVOID
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HalpMapPhysicalMemory(
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IN PVOID PhysicalAddress,
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IN ULONG NumberPages
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);
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PVOID
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HalpMapPhysicalMemoryWriteThrough(
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IN PVOID PhysicalAddress,
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IN ULONG NumberPages
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);
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ULONG
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HalpAllocPhysicalMemory(
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IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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IN ULONG MaxPhysicalAddress,
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IN ULONG NoPages,
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IN BOOLEAN bAlignOn64k
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);
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VOID
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HalpBiosDisplayReset(
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IN VOID
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);
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HAL_DISPLAY_BIOS_INFORMATION
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HalpGetDisplayBiosInformation (
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VOID
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);
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VOID
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HalpDisplayDebugStatus(
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IN PUCHAR Status,
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IN ULONG Length
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);
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VOID
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HalpInitializeCmos (
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VOID
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);
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VOID
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HalpReadCmosTime (
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PTIME_FIELDS TimeFields
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);
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VOID
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HalpWriteCmosTime (
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PTIME_FIELDS TimeFields
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);
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VOID
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HalpAcquireCmosSpinLock (
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VOID
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);
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VOID
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HalpReleaseCmosSpinLock (
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VOID
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);
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VOID
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HalpResetAllProcessors (
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VOID
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);
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VOID
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HalpCpuID (
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ULONG InEax,
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PULONG OutEax,
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PULONG OutEbx,
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PULONG OutEcx,
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PULONG OutEdx
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);
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ULONGLONG
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FASTCALL
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RDMSR (
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IN ULONG MsrAddress
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);
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VOID
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WRMSR (
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IN ULONG MsrAddress,
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IN ULONGLONG MsrValue
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);
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VOID
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HalpEnableInterruptHandler (
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IN UCHAR ReportFlags,
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IN ULONG BusInterruptVector,
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IN ULONG SystemInterruptVector,
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IN KIRQL SystemIrql,
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IN VOID (*HalInterruptServiceRoutine)(VOID),
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IN KINTERRUPT_MODE InterruptMode
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);
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VOID
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HalpRegisterVector (
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IN UCHAR ReportFlags,
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IN ULONG BusInterruptVector,
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IN ULONG SystemInterruptVector,
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IN KIRQL SystemIrql
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);
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VOID
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HalpReportResourceUsage (
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IN PUNICODE_STRING HalName,
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IN INTERFACE_TYPE DeviceInterfaceToUse
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);
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//
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// Defines for HalpFeatureBits
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//
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#define HAL_PERF_EVENTS 0x00000001
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#define HAL_NO_SPECULATION 0x00000002
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#define HAL_MCA_PRESENT 0x00000004 // Intel MCA Available
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#define HAL_MCE_PRESENT 0x00000008 // ONLY Pentium style MCE available
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extern ULONG HalpFeatureBits;
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//
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// Defines for Processor Features returned from CPUID instruction
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//
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#define CPUID_MCA_MASK 0x4000
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#define CPUID_MCE_MASK 0x0080
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NTSTATUS
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HalpGetMcaLog(
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OUT PMCA_EXCEPTION Exception,
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OUT PULONG ReturnedLength
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);
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NTSTATUS
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HalpMcaRegisterDriver(
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IN PMCA_DRIVER_INFO pMcaDriverInfo // Info about registering driver
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);
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VOID
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HalpMcaInit(
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VOID
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);
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#endif // _HALP_
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