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462 lines
10 KiB
462 lines
10 KiB
/*++
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Copyright (c) 1991 Microsoft Corporation
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Module Name:
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xxhal.c
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Abstract:
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This module implements the initialization of the system dependent
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functions that define the Hardware Architecture Layer (HAL) for an
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x86 system.
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Author:
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David N. Cutler (davec) 25-Apr-1991
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Environment:
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Kernel mode only.
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Revision History:
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--*/
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#include "halp.h"
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ULONG HalpBusType;
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extern ADDRESS_USAGE HalpDefaultPcIoSpace;
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extern ADDRESS_USAGE HalpEisaIoSpace;
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extern UCHAR HalpSzPciLock[];
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extern UCHAR HalpSzBreak[];
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extern BOOLEAN HalpPciLockSettings;
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extern UCHAR HalpGenuineIntel[];
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VOID
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HalpGetParameters (
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IN PLOADER_PARAMETER_BLOCK LoaderBlock
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);
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ULONG
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HalpGetFeatureBits (
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VOID
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);
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#ifndef NT_UP
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ULONG
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HalpInitMP(
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IN ULONG Phase,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock
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);
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#endif
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extern KSPIN_LOCK Halp8254Lock;
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KSPIN_LOCK HalpSystemHardwareLock;
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#ifdef ALLOC_PRAGMA
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#pragma alloc_text(INIT,HalpGetParameters)
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#pragma alloc_text(INIT,HalInitSystem)
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#pragma alloc_text(INIT,HalpGetFeatureBits)
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#endif
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VOID
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HalpGetParameters (
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IN PLOADER_PARAMETER_BLOCK LoaderBlock
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)
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/*++
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Routine Description:
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This gets any parameters from the boot.ini invocation line.
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Arguments:
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None.
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Return Value:
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None
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--*/
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{
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PCHAR Options;
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if (LoaderBlock != NULL && LoaderBlock->LoadOptions != NULL) {
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Options = LoaderBlock->LoadOptions;
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//
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// Check if PCI settings are locked down
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//
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if (strstr(Options, HalpSzPciLock)) {
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HalpPciLockSettings = TRUE;
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}
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//
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// Has the user asked for an initial BreakPoint?
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//
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if (strstr(Options, HalpSzBreak)) {
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DbgBreakPoint();
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}
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}
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return;
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}
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BOOLEAN
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HalInitSystem (
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IN ULONG Phase,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock
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)
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/*++
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Routine Description:
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This function initializes the Hardware Architecture Layer (HAL) for an
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x86 system.
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Arguments:
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None.
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Return Value:
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A value of TRUE is returned is the initialization was successfully
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complete. Otherwise a value of FALSE is returend.
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--*/
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{
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PMEMORY_ALLOCATION_DESCRIPTOR Descriptor;
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PLIST_ENTRY NextMd;
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KIRQL CurrentIrql;
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PKPRCB pPRCB;
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pPRCB = KeGetCurrentPrcb();
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if (Phase == 0) {
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HalpBusType = LoaderBlock->u.I386.MachineType & 0x00ff;
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HalpGetParameters (LoaderBlock);
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//
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// Verify Prcb version and build flags conform to
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// this image
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//
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#if DBG
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if (!(pPRCB->BuildType & PRCB_BUILD_DEBUG)) {
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// This checked hal requires a checked kernel
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KeBugCheckEx (MISMATCHED_HAL,
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2, pPRCB->BuildType, PRCB_BUILD_DEBUG, 0);
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}
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#else
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if (pPRCB->BuildType & PRCB_BUILD_DEBUG) {
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// This free hal requires a free kernel
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KeBugCheckEx (MISMATCHED_HAL, 2, pPRCB->BuildType, 0, 0);
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}
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#endif
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#ifndef NT_UP
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if (pPRCB->BuildType & PRCB_BUILD_UNIPROCESSOR) {
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// This MP hal requires an MP kernel
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KeBugCheckEx (MISMATCHED_HAL, 2, pPRCB->BuildType, 0, 0);
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}
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#endif
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if (pPRCB->MajorVersion != PRCB_MAJOR_VERSION) {
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KeBugCheckEx (MISMATCHED_HAL,
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1, pPRCB->MajorVersion, PRCB_MAJOR_VERSION, 0);
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}
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//
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// Phase 0 initialization
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// only called by P0
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//
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//
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// Check to make sure the MCA HAL is not running on an ISA/EISA
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// system, and vice-versa.
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//
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#if MCA
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if (HalpBusType != MACHINE_TYPE_MCA) {
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KeBugCheckEx (MISMATCHED_HAL,
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3, HalpBusType, MACHINE_TYPE_MCA, 0);
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}
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#else
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if (HalpBusType == MACHINE_TYPE_MCA) {
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KeBugCheckEx (MISMATCHED_HAL,
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3, HalpBusType, 0, 0);
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}
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#endif
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HalpInitializePICs();
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//
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// Now that the PICs are initialized, we need to mask them to
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// reflect the current Irql
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//
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CurrentIrql = KeGetCurrentIrql();
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CurrentIrql = KfRaiseIrql(CurrentIrql);
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//
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// Initialize CMOS
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//
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HalpInitializeCmos();
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//
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// Fill in handlers for APIs which this hal supports
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//
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HalQuerySystemInformation = HaliQuerySystemInformation;
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HalSetSystemInformation = HaliSetSystemInformation;
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//
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// Register cascade vector
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//
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HalpRegisterVector (
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InternalUsage,
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PIC_SLAVE_IRQ + PRIMARY_VECTOR_BASE,
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PIC_SLAVE_IRQ + PRIMARY_VECTOR_BASE,
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HIGH_LEVEL );
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//
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// Register base IO space used by hal
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//
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HalpRegisterAddressUsage (&HalpDefaultPcIoSpace);
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if (HalpBusType == MACHINE_TYPE_EISA) {
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HalpRegisterAddressUsage (&HalpEisaIoSpace);
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}
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//
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// Note that HalpInitializeClock MUST be called after
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// HalpInitializeStallExecution, because HalpInitializeStallExecution
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// reprograms the timer.
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//
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HalpInitializeStallExecution(0);
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//
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// Setup the clock
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//
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HalpInitializeClock();
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//
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// Make sure profile is disabled
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//
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HalStopProfileInterrupt(0);
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HalpInitializeDisplay();
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//
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// Initialize spinlock used by HalGetBusData hardware access routines
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//
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KeInitializeSpinLock(&HalpSystemHardwareLock);
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//
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// Determine if there is physical memory above 16 MB.
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//
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LessThan16Mb = TRUE;
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NextMd = LoaderBlock->MemoryDescriptorListHead.Flink;
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while (NextMd != &LoaderBlock->MemoryDescriptorListHead) {
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Descriptor = CONTAINING_RECORD( NextMd,
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MEMORY_ALLOCATION_DESCRIPTOR,
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ListEntry );
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if (Descriptor->MemoryType != LoaderFirmwarePermanent &&
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Descriptor->MemoryType != LoaderSpecialMemory &&
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Descriptor->BasePage + Descriptor->PageCount > 0x1000) {
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LessThan16Mb = FALSE;
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break;
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}
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NextMd = Descriptor->ListEntry.Flink;
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}
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//
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// Determine the size need for map buffers. If this system has
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// memory with a physical address of greater than
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// MAXIMUM_PHYSICAL_ADDRESS, then allocate a large chunk; otherwise,
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// allocate a small chunk.
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//
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if (LessThan16Mb) {
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//
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// Allocate a small set of map buffers. They are only need for
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// slave DMA devices.
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//
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HalpMapBufferSize = INITIAL_MAP_BUFFER_SMALL_SIZE;
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} else {
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//
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// Allocate a larger set of map buffers. These are used for
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// slave DMA controllers and Isa cards.
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//
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HalpMapBufferSize = INITIAL_MAP_BUFFER_LARGE_SIZE;
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}
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//
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// Allocate map buffers for the adapter objects
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//
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HalpMapBufferPhysicalAddress.LowPart =
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HalpAllocPhysicalMemory (LoaderBlock, MAXIMUM_PHYSICAL_ADDRESS,
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HalpMapBufferSize >> PAGE_SHIFT, TRUE);
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HalpMapBufferPhysicalAddress.HighPart = 0;
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if (!HalpMapBufferPhysicalAddress.LowPart) {
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//
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// There was not a satisfactory block. Clear the allocation.
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//
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HalpMapBufferSize = 0;
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}
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} else {
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//
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// Phase 1 initialization
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//
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if (pPRCB->Number == 0) {
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//
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// If P0, then setup global vectors
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//
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HalpRegisterInternalBusHandlers ();
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//
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// Set feature bits
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//
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HalpFeatureBits = HalpGetFeatureBits();
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HalpEnableInterruptHandler (
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DeviceUsage, // Report as device vector
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V2I (CLOCK_VECTOR), // Bus interrupt level
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CLOCK_VECTOR, // System IDT
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CLOCK2_LEVEL, // System Irql
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HalpClockInterrupt, // ISR
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Latched );
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HalpEnableInterruptHandler (
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DeviceUsage, // Report as device vector
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V2I (PROFILE_VECTOR), // Bus interrupt level
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PROFILE_VECTOR, // System IDT
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PROFILE_LEVEL, // System Irql
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HalpProfileInterrupt, // ISR
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Latched );
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//
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// If 486, the FP error will be routed via trap10. So we
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// don't enable irq13. Otherwise (CPU=386), we will enable irq13
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// to handle FP error.
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//
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if (pPRCB->CpuType == 3) {
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HalpEnableInterruptHandler (
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DeviceUsage, // Report as device vector
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V2I (I386_80387_VECTOR), // Bus interrupt level
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I386_80387_VECTOR, // System IDT
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I386_80387_IRQL, // System Irql
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HalpIrq13Handler, // ISR
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Latched );
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}
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}
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}
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#ifndef NT_UP
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HalpInitMP (Phase, LoaderBlock);
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#endif
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return TRUE;
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}
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ULONG
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HalpGetFeatureBits (
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VOID
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)
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{
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UCHAR Buffer[50];
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ULONG Junk, ProcessorFeatures, Bits;
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PKPRCB Prcb;
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Bits = 0;
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Prcb = KeGetCurrentPrcb();
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if (!Prcb->CpuID) {
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return Bits;
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}
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//
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// Determine the processor type
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//
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HalpCpuID (0, &Junk, (PULONG) Buffer+0, (PULONG) Buffer+2, (PULONG) Buffer+1);
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Buffer[12] = 0;
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//
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// If this is an Intel processor, determine whichNT compatible
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// features are present
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//
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if (strcmp (Buffer, HalpGenuineIntel) == 0) {
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HalpCpuID (1, &Junk, &Junk, &Junk, &ProcessorFeatures);
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//
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// Check Intel feature bits for HAL features needed
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//
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if (Prcb->CpuType == 6) {
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Bits |= HAL_PERF_EVENTS;
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}
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if (Prcb->CpuType < 6) {
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Bits |= HAL_NO_SPECULATION;
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}
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if (ProcessorFeatures & CPUID_MCA_MASK) {
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Bits |= HAL_MCA_PRESENT;
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}
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if (ProcessorFeatures & CPUID_MCE_MASK) {
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Bits |= HAL_MCE_PRESENT;
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}
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}
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return Bits;
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}
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