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559 lines
13 KiB
559 lines
13 KiB
/*++
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Copyright (c) 1992 Microsoft Corporation
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Module Name:
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Modeset.h
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Abstract:
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This module contains all the global data used by the VGA miniport
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driver.
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Environment:
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Kernel mode
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Revision History:
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--*/
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#include "cmdcnst.h"
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//
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// Color graphics mode 0x12, 640x480 16 colors.
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#ifndef INT10_MODE_SET
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//
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USHORT VGA_640x480[] = {
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OWM, // start sync reset program up sequencer
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SEQ_ADDRESS_PORT,
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5,
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0x0100,0x0101,0x0f02,0x0003,0x0604,
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OB,
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MISC_OUTPUT_REG_WRITE_PORT, // Misc output register
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0xe3,
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OW, // Set chain mode in sync reset
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GRAPH_ADDRESS_PORT,
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0x0506,
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OB, // EndSyncResetCmd
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SEQ_ADDRESS_PORT,
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IND_SYNC_RESET,
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OB,
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SEQ_DATA_PORT,
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END_SYNC_RESET_VALUE,
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OW, // Unlock CRTC registers 0-7
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CRTC_ADDRESS_PORT_COLOR,
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0x0511,
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METAOUT+INDXOUT, // program crtc registers
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CRTC_ADDRESS_PORT_COLOR,
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VGA_NUM_CRTC_PORTS, // count
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0, // start index
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0x5F,0x4F,0x50,0x82,0x54,0x80,0x0B,0x3E,0x00,0x40,0x0,0x0,0x0,0x0,0x0,0x0,
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0xEA,0x8C,0xDF,0x28,0x0,0xE7,0x4,0xE3,0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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METAOUT+ATCOUT, // program attribute controller registers
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ATT_ADDRESS_PORT, // port
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VGA_NUM_ATTRIB_CONT_PORTS, // count
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0, // start index
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0x0,0x1,0x2,0x3,0x4,0x5,0x14,0x7,0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
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0x01,0x0,0x0F,0x0,0x0,
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METAOUT+INDXOUT, // program graphics controller registers
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GRAPH_ADDRESS_PORT, // port
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VGA_NUM_GRAPH_CONT_PORTS, // count
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0, // start index
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0x00,0x0,0x0,0x0,0x0,0x0,0x05,0x0F,0x0FF,
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OB, // DAC mask registers
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DAC_PIXEL_MASK_PORT,
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0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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OB, // turn video on.
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ATT_ADDRESS_PORT,
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VIDEO_ENABLE,
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EOD
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};
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//
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// Color graphics mode 0x2E, 640x480 256 colors.
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//
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USHORT VGA_640x480x8[] = {
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OWM, // start sync reset program up sequencer
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SEQ_ADDRESS_PORT,
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5,
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0x0100,0x0101,0x0f02,0x0003,0x0604,
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OB,
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MISC_OUTPUT_REG_WRITE_PORT, // Misc output register
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0xe3,
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OW, // Set chain mode in sync reset
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GRAPH_ADDRESS_PORT,
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0x0506,
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OB, // EndSyncResetCmd
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SEQ_ADDRESS_PORT,
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IND_SYNC_RESET,
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OB,
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SEQ_DATA_PORT,
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END_SYNC_RESET_VALUE,
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OW, // Unlock CRTC registers 0-7
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CRTC_ADDRESS_PORT_COLOR,
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0x0511,
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METAOUT+INDXOUT, // program crtc registers
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CRTC_ADDRESS_PORT_COLOR,
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VGA_NUM_CRTC_PORTS, // count
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0, // start index
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0xC3,0x9F,0xA1,0x85,0xA6,0x1F,0x0B,0x3E,0x00,0x40,0x0,0x0,0x0,0x0,0x0,0x0,
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0xEA,0x8C,0xDF,0x80,0x40,0xE7,0x4,0xE3,0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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METAOUT+ATCOUT, // program attribute controller registers
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ATT_ADDRESS_PORT, // port
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VGA_NUM_ATTRIB_CONT_PORTS, // count
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0, // start index
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0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF,
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0x41,0x0,0x0F,0x0,0x0,
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METAOUT+INDXOUT, // program graphics controller registers
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GRAPH_ADDRESS_PORT, // port
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VGA_NUM_GRAPH_CONT_PORTS, // count
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0, // start index
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0x00,0x0,0x0,0x0,0x0,0x0,0x05,0x0F,0x0FF,
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OB, // DAC mask registers
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DAC_PIXEL_MASK_PORT,
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0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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OB, // turn video on.
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ATT_ADDRESS_PORT,
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VIDEO_ENABLE,
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EOD
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};
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//
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// Color graphics mode 0x29, 800x600 16 colors.
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//
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USHORT VGA_800x600[] = {
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OWM, // start sync reset program up sequencer
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SEQ_ADDRESS_PORT,
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5,
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0x0100,0x0101,0x0f02,0x0003,0x0604,
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OB,
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MISC_OUTPUT_REG_WRITE_PORT, // Misc output register
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0xeb,
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OW, // Set chain mode in sync reset
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GRAPH_ADDRESS_PORT,
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0x0506,
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OB, // EndSyncResetCmd
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SEQ_ADDRESS_PORT,
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IND_SYNC_RESET,
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OB,
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SEQ_DATA_PORT,
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END_SYNC_RESET_VALUE,
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OW, // Unlock CRTC registers 0-7
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CRTC_ADDRESS_PORT_COLOR,
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0x0511,
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METAOUT+INDXOUT, // program crtc registers
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CRTC_ADDRESS_PORT_COLOR,
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VGA_NUM_CRTC_PORTS, // count
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0, // start index
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0x84,0x63,0x64,0x87,0x6B,0x1C,0x73,0xF0,0xF0,0x0,0x60,0x0,0x0,0x0,0x0,0x0,
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0x58,0x5C,0x57,0x32,0x0,0x58,0x72,0xE3,0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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METAOUT+ATCOUT, // program attribute controller registers
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ATT_ADDRESS_PORT, // port
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VGA_NUM_ATTRIB_CONT_PORTS, // count
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0, // start index
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0x0,0x1,0x2,0x3,0x4,0x5,0x14,0x7,0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
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0x01,0x0,0x0F,0x0,0x0,
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METAOUT+INDXOUT, // program graphics controller registers
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GRAPH_ADDRESS_PORT, // port
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VGA_NUM_GRAPH_CONT_PORTS, // count
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0, // start index
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0x00,0x0,0x0,0x0,0x0,0x0,0x05,0x0F,0x0FF,
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OB, // DAC mask registers
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DAC_PIXEL_MASK_PORT,
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0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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OB, // turn video on.
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ATT_ADDRESS_PORT,
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VIDEO_ENABLE,
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EOD
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};
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//
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// Color text mode, 720x480
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//
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USHORT VGA_TEXT_0[] = {
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OWM,
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SEQ_ADDRESS_PORT,
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5,
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0x0100,0x0001,0x0302,0x0003,0x0204, // program up sequencer
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OB,
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MISC_OUTPUT_REG_WRITE_PORT,
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0x67,
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OW,
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GRAPH_ADDRESS_PORT,
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0x0e06,
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// EndSyncResetCmd
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OB,
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SEQ_ADDRESS_PORT,
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IND_SYNC_RESET,
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OB,
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SEQ_DATA_PORT,
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END_SYNC_RESET_VALUE,
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OW,
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CRTC_ADDRESS_PORT_COLOR,
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0x0E11,
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METAOUT+INDXOUT, // program crtc registers
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CRTC_ADDRESS_PORT_COLOR,
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VGA_NUM_CRTC_PORTS, // count
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0, // start index
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0x5F,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,0x00,0x4f,0xd,0xe,0x0,0x0,0x0,0x0,
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0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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METAOUT+ATCOUT, //
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ATT_ADDRESS_PORT, // port
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VGA_NUM_ATTRIB_CONT_PORTS, // count
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0, // start index
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0x0,0x1,0x2,0x3,0x4,0x5,0x14,0x7,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
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0x04,0x0,0x0F,0x8,0x0,
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METAOUT+INDXOUT, //
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GRAPH_ADDRESS_PORT, // port
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VGA_NUM_GRAPH_CONT_PORTS, // count
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0, // start index
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0x00,0x0,0x0,0x0,0x0,0x10,0x0e,0x0,0x0FF,
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OB,
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DAC_PIXEL_MASK_PORT,
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0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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OB, // turn video on.
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ATT_ADDRESS_PORT,
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VIDEO_ENABLE,
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EOD
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};
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#endif //!INT10 Modeset
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//
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// Color text mode, 640x480
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//
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USHORT VGA_TEXT_1[] = {
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OWM,
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SEQ_ADDRESS_PORT,
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5,
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0x0100,0x0101,0x0302,0x0003,0x0204, // program up sequencer
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OB,
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MISC_OUTPUT_REG_WRITE_PORT,
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0xa3,
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OW,
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GRAPH_ADDRESS_PORT,
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0x0e06,
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// EndSyncResetCmd
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OB,
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SEQ_ADDRESS_PORT,
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IND_SYNC_RESET,
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OB,
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SEQ_DATA_PORT,
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END_SYNC_RESET_VALUE,
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OW,
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CRTC_ADDRESS_PORT_COLOR,
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0x0511,
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METAOUT+INDXOUT, // program crtc registers
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CRTC_ADDRESS_PORT_COLOR,
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VGA_NUM_CRTC_PORTS, // count
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0, // start index
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0x5F,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,0x00,0x4d,0xb,0xc,0x0,0x0,0x0,0x0,
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0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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METAOUT+ATCOUT, //
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ATT_ADDRESS_PORT, // port
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VGA_NUM_ATTRIB_CONT_PORTS, // count
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0, // start index
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0x0,0x1,0x2,0x3,0x4,0x5,0x14,0x7,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
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0x00,0x0,0x0F,0x0,0x0,
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METAOUT+INDXOUT, //
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GRAPH_ADDRESS_PORT, // port
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VGA_NUM_GRAPH_CONT_PORTS, // count
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0, // start index
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0x00,0x0,0x0,0x0,0x0,0x10,0x0e,0x0,0x0FF,
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OB,
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DAC_PIXEL_MASK_PORT,
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0xFF,
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IB, // prepare atc for writing
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INPUT_STATUS_1_COLOR,
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OB, // turn video on.
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ATT_ADDRESS_PORT,
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VIDEO_ENABLE,
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EOD
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};
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//
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// Memory map table -
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//
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// These memory maps are used to save and restore the physical video buffer.
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//
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//
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// Memory map table definition
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//
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typedef struct {
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ULONG MaxSize; // Maximum addressable size of memory.
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ULONG Start; // Start address of mode.
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} MEMORYMAPS;
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MEMORYMAPS MemoryMaps[] = {
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// length start
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// ------ -----
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{ 0x08000, 0xB0000}, // all mono text modes (7)
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{ 0x08000, 0xB8000}, // all color text modes (0, 1, 2, 3,
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{ 0x20000, 0xA0000}, // all VGA graphics modes
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};
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//
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// Video mode table - contains information and commands for initializing each
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// mode. These entries must correspond with those in VIDEO_MODE_VGA. The first
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// entry is commented; the rest follow the same format, but are not so
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// heavily commented.
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//
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#define NUM_VIDEO_MODES 5
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VIDEOMODE ModesVGA[NUM_VIDEO_MODES] = {
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//
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// Standard VGA modes.
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//
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//
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// Mode index 0
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// Color text mode 3, 720x400, 9x16 char cell (VGA).
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//
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{
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VIDEO_MODE_COLOR, // flags that this mode is a color mode, but not graphics
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4, // four planes
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1, // one bit of color per plane
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80, 25, // 80x25 text resolution
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720, 400, // 720x400 pixels on screen
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160, 0x10000, // 160 bytes per scan line, 64K of CPU-addressable bitmap
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NoBanking, // no banking supported or needed in this mode
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MemMap_CGA, // the memory mapping is the standard CGA memory mapping
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// of 32K at B8000
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PANEL | CRT, // Displays supported
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TRUE, // Valid Mode
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#ifdef INT10_MODE_SET
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0x3 // int 10 mode number
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#else
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VGA_TEXT_0 // pointer to the command strings
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#endif
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},
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//
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// Mode index 1.
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// Color text mode 3, 640x350, 8x14 char cell (EGA).
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//
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{
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VIDEO_MODE_COLOR, 4, 1, 80, 25,
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640, 350, 160, 0x10000, NoBanking, MemMap_CGA,
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PANEL | CRT,
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TRUE,
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#ifdef INT10_MODE_SET
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0x3
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#else
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VGA_TEXT_1
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#endif
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},
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//
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//
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// Mode index 2
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// Standard VGA Color graphics mode 0x12, 640x480 16 colors.
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//
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{
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VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 80, 30,
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640, 480, 80, 0x10000, NoBanking, MemMap_VGA,
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PANEL | CRT,
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TRUE,
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#ifdef INT10_MODE_SET
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0x12
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#else
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VGA_640x480
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#endif
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},
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//
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// Mode index 3
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// 640x480 256 colors.
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//
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{ VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 1, 8, 80, 30,
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640, 480, 1024, 0x80000, NormalBanking, MemMap_VGA,
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PANEL | CRT,
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TRUE,
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#ifdef INT10_MODE_SET
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0x2E
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#else
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VGA_640x480x8
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#endif
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},
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//
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// Mode index 4
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// 800x600 16 colors.
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//
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{ VIDEO_MODE_COLOR+VIDEO_MODE_GRAPHICS, 4, 1, 100, 37,
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800, 600, 100, 0x10000, NoBanking, MemMap_VGA,
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CRT,
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FALSE,
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#ifdef INT10_MODE_SET
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0x6A
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#else
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VGA_800x600
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#endif
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}
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};
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//
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//
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// Data used to set the Graphics and Sequence Controllers to put the
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// VGA into a planar state at A0000 for 64K, with plane 2 enabled for
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// reads and writes, so that a font can be loaded, and to disable that mode.
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//
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// Settings to enable planar mode with plane 2 enabled.
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//
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USHORT EnableA000Data[] = {
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OWM,
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SEQ_ADDRESS_PORT,
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1,
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0x0100,
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OWM,
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GRAPH_ADDRESS_PORT,
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3,
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0x0204, // Read Map = plane 2
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0x0005, // Graphics Mode = read mode 0, write mode 0
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0x0406, // Graphics Miscellaneous register = A0000 for 64K, not odd/even,
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// graphics mode
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OWM,
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SEQ_ADDRESS_PORT,
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3,
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0x0402, // Map Mask = write to plane 2 only
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0x0404, // Memory Mode = not odd/even, not full memory, graphics mode
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0x0300, // end sync reset
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EOD
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};
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//
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// Settings to disable the font-loading planar mode.
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//
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USHORT DisableA000Color[] = {
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OWM,
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SEQ_ADDRESS_PORT,
|
|
1,
|
|
0x0100,
|
|
|
|
OWM,
|
|
GRAPH_ADDRESS_PORT,
|
|
3,
|
|
0x0004, 0x1005, 0x0E06,
|
|
|
|
OWM,
|
|
SEQ_ADDRESS_PORT,
|
|
3,
|
|
0x0302, 0x0204, 0x0300, // end sync reset
|
|
EOD
|
|
|
|
};
|