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87 lines
3.8 KiB
87 lines
3.8 KiB
#define READ_PCI_CONFIG_LONG(addr) (HalpReadPCIConfigLong(addr))
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#define READ_PCI_CONFIG_WORD(addr) (HalpReadPCIConfigWord(addr))
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#define READ_PCI_CONFIG_BYTE(addr) (HalpReadPCIConfigByte(addr))
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#define WRITE_PCI_CONFIG_LONG(addr,data) (HalpWritePCIConfigLong((addr),(data)))
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#define WRITE_PCI_CONFIG_WORD(addr,data) (HalpWritePCIConfigWord((addr),(data)))
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#define WRITE_PCI_CONFIG_BYTE(addr,data) (HalpWritePCIConfigByte((addr),(data)))
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#define READ_PCI_MEMORY_LONG(addr) (HalpReadPCIMemoryLong(addr))
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// #define READ_PCI_MEMORY_WORD(addr) (HalpReadPCIMemoryWord(addr))
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// #define READ_PCI_MEMORY_BYTE(addr) (HalpReadPCIMemoryByte(addr))
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#define WRITE_PCI_MEMORY_LONG(addr,data) (HalpWritePCIMemoryLong((addr),(data)))
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// #define WRITE_PCI_MEMORY_WORD(addr,data) (HalpWritePCIMemoryWord((addr),(data)))
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// #define WRITE_PCI_MEMORY_BYTE(addr,data) (HalpWritePCIMemoryByte((addr),(data)))
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#define MOVE_PCI_MEMORY_LONG(dest,src,count) (HalpMovePCIMemoryLong(dest,src,count))
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#if 0
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// Following defines are "#if 0" 'ed out because the compiler generated the
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// wrong code for them. Although I've tried to force 64 bit computation
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// by typing to both UQUAD and ULONGLONG, it appears as if the compiler
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// still is using only 32 bits for its address computation. Example:
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// READ_PCI_CONFIG_LONG (0x00020000);
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// generates:
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// ldah t0, -1FC0(zero)
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// ldl t1, 18(t0)
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// Note that t0 incorrectly contains FFFF.FFFF.E040.0000 instead of
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// the correct value of 0000.0001.E040.0000
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// EB66 (sparse space) defines.
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// These routines are a HACK because they go directly to the hardware
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// while they should go through HAL routines. But such HAL routines
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// do not yet exist. When they do, these routines must be changed.
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// BUGBUG Need to be 64 bit Superpage addresses: FFFFFC00 00000000
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#define READ_PCI_CONFIG_LONG(addr) \
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(* (PULONG)((((UQUAD)(addr) & 0x00FFFFFC) << 5) | 0x1E0000018) )
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#define READ_PCI_CONFIG_WORD(addr) \
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(* (PUWORD)((((UQUAD)(addr) & 0x00FFFFFE) << 5) | 0x1E0000010) )
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#define READ_PCI_CONFIG_BYTE(addr) \
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(* (PUCHAR)((((UQUAD)(addr) & 0x00FFFFFF) << 5) | 0x1E0000000) )
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#define WRITE_PCI_CONFIG_LONG(addr,data) \
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(* (PULONG)((((UQUAD)(addr) & 0x00FFFFFC) << 5) | 0x1E0000018) = (data))
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#define WRITE_PCI_CONFIG_WORD(addr,data) \
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(* (PUWORD)((((UQUAD)(addr) & 0x00FFFFFE) << 5) | 0x1E0000010) = (data))
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#define WRITE_PCI_CONFIG_BYTE(addr,data) \
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(* (PUCHAR)((((UQUAD)(addr) & 0x00FFFFFF) << 5) | 0x1E0000000) = (data))
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#endif
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#if 0
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// Following defines are "#if 0" 'ed out because the compiler generated the
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// wrong code for them. Although I've tried to force 64 bit computation
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// by typing to both UQUAD and ULONGLONG, it appears as if the compiler
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// still is using only 32 bits for its address computation.
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//EB66 (sparse space) defines
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// These routines are a HACK because they go directly to the hardware
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// while they should go through HAL routines. But such HAL routines
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// do not yet exist. When they do, these routines must be changed.
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// BUGBUG Need to be 64 bit Superpage addresses: FFFFFC00 00000000
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#define READ_PCI_MEMORY_LONG(addr) \
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(* (PULONG)((((UQUAD)(addr) & 0x07FFFFFC) << 5) | 0x200000018) )
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#define READ_PCI_MEMORY_WORD(addr) \
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(* (PUWORD)((((UQUAD)(addr) & 0x07FFFFFE) << 5) | 0x200000010) )
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#define READ_PCI_MEMORY_BYTE(addr) \
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(* (PUCHAR)((((UQUAD)(addr) & 0x07FFFFFF) << 5) | 0x200000000) )
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#define WRITE_PCI_MEMORY_LONG(addr,data) \
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(* (PULONG)((((UQUAD)(addr) & 0x07FFFFFC) << 5) | 0x200000018) = (data))
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#define WRITE_PCI_MEMORY_WORD(addr,data) \
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(* (PUWORD)((((UQUAD)(addr) & 0x07FFFFFE) << 5) | 0x200000010) = (data))
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#define WRITE_PCI_MEMORY_BYTE(addr,data) \
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(* (PUCHAR)((((UQUAD)(addr) & 0x07FFFFFF) << 5) | 0x200000000) = (data))
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#endif
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