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197 lines
6.2 KiB
197 lines
6.2 KiB
/******************************Module*Header*******************************\
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* Module Name: xga.h
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*
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* All the XGA specific driver h file stuff
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*
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* Copyright (c) 1992 Microsoft Corporation
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*
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\**************************************************************************/
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//
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// XGA I/O register definitions
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//
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#define OP_MODE_REG 0x0
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#define APP_CTL_REG 0x1
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#define INT_ENABLE_REG 0x4
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#define INT_STATUS_REG 0x5
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#define VMEM_CONTROL_REG 0x6
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#define APP_INDEX_REG 0x8
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#define MEMACC_MODE_REG 0x9
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#define INDEX_REG 0xA
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#define DATA_IN_REG 0xB
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#define DATA_OUT_REG 0xC
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//
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// XGA Pointer (cursor) specific registers
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//
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#define SPRITE_HORZ_START_LOW 0x30
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#define SPRITE_HORZ_START_HIGH 0x31
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#define SPRITE_HORZ_PRESET 0x32
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#define SPRITE_VERT_START_LOW 0x33
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#define SPRITE_VERT_START_HIGH 0x34
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#define SPRITE_VERT_PRESET 0x35
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#define SPRITE_CONTROL 0x36
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#define SC 0x01
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#define SPRITE_COLOR_REG0_RED 0x38
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#define SPRITE_COLOR_REG0_GREEN 0x39
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#define SPRITE_COLOR_REG0_BLUE 0x3a
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#define SPRITE_COLOR_REG1_RED 0x3b
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#define SPRITE_COLOR_REG1_GREEN 0x3c
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#define SPRITE_COLOR_REG1_BLUE 0x3d
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#define SPRITE_INDEX_LOW 0x60
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#define SPRITE_INDEX_HIGH 0x61
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#define SPRITE_DATA 0x6a
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// XGA Chip Stuff
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// Start of Pel Operation Register defines
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#define BS_BACK_COLOR 0x00000000 // Background source
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#define BS_SRC_PEL_MAP 0x80000000
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#define FS_FORE_COLOR 0x00000000 // Foreground source
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#define FS_SRC_PEL_MAP 0x20000000
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#define STEP_DRAW_AND_STEP_READ 0x02000000 // Step Control
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#define STEP_LINE_DRAW_READ 0x03000000
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#define STEP_DRAW_AND_STEP_WRITE 0x04000000
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#define STEP_LINE_DRAW_WRITE 0x05000000
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#define STEP_PX_BLT 0x08000000
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#define STEP_INVERTING_PX_BLT 0x09000000
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#define STEP_AREA_FILL_PX_BLT 0x0A000000
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#define SRC_PEL_MAP_A 0x00100000 // Source Bitmap
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#define SRC_PEL_MAP_B 0x00200000
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#define SRC_PEL_MAP_C 0x00300000
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#define DST_PEL_MAP_A 0x00010000 // Dest Bitmap
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#define DST_PEL_MAP_B 0x00020000
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#define DST_PEL_MAP_C 0x00030000
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#define PATT_PEL_MAP_A 0x00001000 // Pattern Bitmap
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#define PATT_PEL_MAP_B 0x00002000
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#define PATT_PEL_MAP_C 0x00003000
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#define PATT_FOREGROUND 0x00008000
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#define PATT_GEN_FROM_SRC 0x00009000
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#define MSK_DISABLE 0x00000000 // Mask (clipping)
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#define MSK_BOUNDARY_ENABLE 0x00000040
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#define MSK_MAP_ENABLE 0x00000080
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#define DM_ALL_PELS 0x00000000 // Display modes
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#define DM_FIRST_PEL_NULL 0x00000010
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#define DM_LAST_PEL_NULL 0x00000020
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#define DM_AREA_BOUNDARY 0x00000030
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#define OCT_DX 0x00000004 // Octants
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#define OCT_DY 0x00000002
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#define OCT_DZ 0x00000001
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// End of Pel Operation Register defines
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#define MASK_MAP 0x00 // Pel Map Index (PMI) values
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#define PEL_MAP_A 0x01
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#define PEL_MAP_B 0x02
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#define PEL_MAP_C 0x03
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#define PO_INTEL 0x00 // Pel Order (PO) values
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#define PO_MOTOROLA 0x08
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#define PS_1_BIT 0x00 // Pel Size (PS) values
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#define PS_2_BIT 0x01
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#define PS_4_BIT 0x02
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#define PS_8_BIT 0x03
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#define PEL_MAP_FORMAT (PO_INTEL | PS_8_BIT)
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#define PATT_MAP_FORMAT (PO_MOTOROLA | PS_1_BIT)
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#define XGA_0 0x00 // XGA Mix functions
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#define XGA_S_AND_D 0x01
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#define XGA_S_AND_NOT_D 0x02
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#define XGA_S 0x03
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#define XGA_NOT_S_AND_D 0x04
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#define XGA_D 0x05
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#define XGA_S_XOR_D 0x06
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#define XGA_S_OR_D 0x07
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#define XGA_NOT_S_AND_NOT_D 0x08
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#define XGA_S_XOR_NOT_D 0x09
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#define XGA_NOT_D 0x0A
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#define XGA_S_OR_NOT_D 0x0B
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#define XGA_NOT_S 0x0C
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#define XGA_NOT_S_OR_D 0x0D
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#define XGA_NOT_S_OR_NOT_D 0x0E
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#define XGA_1 0x0F
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#define XGA_MAX 0x10
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#define XGA_MIN 0x11
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#define XGA_ADD_WITH_SATURATE 0x12
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#define XGA_SUBTRACT_D_MINUS_S_WITH_SATURATE 0x13
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#define XGA_SUBTRACT_S_MINUS_D_WITH_SATURATE 0x14
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#define XGA_AVERAGE 0x15
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#define CCCC_TRUE 0x0 // Color Compare Condition codes
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#define CCCC_DD_GT_CCV 0x1
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#define CCCC_DD_EQ_CCV 0x2
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#define CCCC_DD_LT_CCV 0x3
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#define CCCC_FALSE 0x4
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#define CCCC_DD_GT_EQ_CCV 0x5
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#define CCCC_DD_NOT_EQ_CCV 0x6
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#define CCCC_DD_LT_EQ_CCV 0x7
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extern VOID vWaitForCoProcessor(PPDEV ppdev, ULONG ulDelay) ;
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extern BOOL bSetXgaClipping(PPDEV ppdev, CLIPOBJ *pco, PULONG pulXgaMask) ;
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// Acceleration Control.
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#define CACHED_FONTS 0x1
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#define SCRN_TO_SCRN_CPY 0x01
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#define SOLID_PATTERN 0x02
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#define XGA_ZERO_INIT 0x1
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#define XGA_LOCK_MEM 0x2
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extern HANDLE hCpAlloc(PPDEV ppdev, ULONG nSize, ULONG ulFlags) ;
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extern HANDLE hCpFree(PPDEV ppdev, HANDLE hXgaMem) ;
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extern PVOID pCpMemLock(PPDEV ppdev, HANDLE hXgaMem, ULONG ulFlags) ;
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extern BOOL bCpMemUnLock(PPDEV ppdev, HANDLE hXgaMem) ;
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extern BOOL bCpMmInitHeap(PPDEV ppdev) ;
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extern VOID vCpMmDestroyHeap(PPDEV ppdev) ;
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// BitBlt stuff
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// Define the A vector polynomial bits
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//
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// Each bit corresponds to one of the terms in the polynomial
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//
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// Rop(D,S,P) = a + a D + a S + a P + a DS + a DP + a SP + a DSP
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// 0 d s p ds dp sp dsp
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#define AVEC_NOT 0x01
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#define AVEC_D 0x02
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#define AVEC_S 0x04
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#define AVEC_P 0x08
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#define AVEC_DS 0x10
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#define AVEC_DP 0x20
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#define AVEC_SP 0x40
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#define AVEC_DSP 0x80
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#define AVEC_NEED_SOURCE (AVEC_S | AVEC_DS | AVEC_SP | AVEC_DSP)
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#define AVEC_NEED_PATTERN (AVEC_P | AVEC_DP | AVEC_SP | AVEC_DSP)
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// Hooks and Driver function table.
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#define HOOKS_BMF8BPP (HOOK_BITBLT | HOOK_TEXTOUT | \
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HOOK_COPYBITS | HOOK_STROKEPATH | HOOK_PAINT)
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#define HOOKS_BMF16BPP 0
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