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195 lines
6.4 KiB
195 lines
6.4 KiB
// TITLE("Compute Checksum")
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//++
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//
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// Copyright (c) 1992 Microsoft Corporation
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// Copyright (c) 1993 Digital Equipment Corporation
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//
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// Module Name:
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//
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// chksum.s
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//
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// Abstract:
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//
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// This module implements a function to compute the checksum of a buffer.
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//
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// N.B. This code is also used in ntos\streams\tcpip\common\alpha\cksy.s.
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//
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// Author:
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//
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// David N. Cutler (davec) 27-Jan-1992
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//
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// Environment:
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//
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// User mode.
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//
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// Revision History:
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//
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// Thomas Van Baak (tvb) 25-May-1993
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//
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// Adapted for Alpha AXP
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//
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//--
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#include "ksalpha.h"
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//
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// Define macro to add two quadwords with wrap-around carry. This is used
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// to checksum eight 16-bit words in parallel.
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//
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#define ADDQC(Rx, Ry, Rz) \
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addq Rx, Ry, Rx ;\
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cmpult Rx, Ry, Ry ;\
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addq Rx, Ry, Rz
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SBTTL("Compute Checksum")
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//++
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//
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// USHORT
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// ChkSum (
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// IN ULONG Checksum,
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// IN PUSHORT Source,
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// IN ULONG Length
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// )
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//
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// Routine Description:
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//
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// This function computes the checksum of the specified buffer.
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//
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// Arguments:
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//
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// Checksum (a0) - Supplies the initial checksum value.
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//
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// Source (a1) - Supplies a pointer to the buffer to be checksummed.
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//
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// Length (a2) - Supplies the length of the buffer in words.
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//
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// Return Value:
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//
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// The computed checksum is returned as the function value.
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//
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//--
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LEAF_ENTRY(ChkSum)
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addq a2, a2, a2 // convert length from words to bytes
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addq a1, a2, a3 // compute ending buffer address
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//
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// Sum words before first quadword. A word aligned address is assumed.
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//
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10: and a1, 3*2, v0 // check word alignment
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beq v0, 20f // if eq, no more leading words
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beq a2, 80f // if byte count now zero, done
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ldq_u t0, 0(a1) // get quadword containing word
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extwl t0, a1, t0 // extract word zero extended
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addq a0, t0, a0 // add to sum
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addq a1, 2, a1 // increment buffer address
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subq a2, 2, a2 // decrement byte count
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br 10b // check for more words
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//
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// Sum quadwords before first 64-byte block. The address is now quadword
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// aligned.
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//
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20: and a1, 7*8, v0 // check quadword alignment
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beq v0, 30f // if eq, no more leading quadwords
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cmplt a2, 8, t12 // less than one quadword left?
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bne t12, 60f // if ne[true], sum last words
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ldq t0, 0(a1) // get quadword
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ADDQC (a0, t0, a0) // add to sum
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addq a1, 8, a1 // increment buffer address
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subq a2, 8, a2 // decrement byte count
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br 20b // check for more quadwords
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//
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// Sum 64-byte size blocks. The address is now 64-byte aligned.
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//
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// N.B. The following code is written to be readable; the assembler will
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// schedule it optimally.
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//
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30: bic a3, 63, a4 // compute ending block address
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cmpeq a1, a4, t12 // at end of last block?
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bne t12, 50f // if ne[true], no full blocks
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40: ldq t0, 0*8(a1) // load eight quadwords (64-bytes)
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ldq t1, 1*8(a1)
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ldq t2, 2*8(a1)
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ldq t3, 3*8(a1)
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ldq t4, 4*8(a1)
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ldq t5, 5*8(a1)
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ldq t6, 6*8(a1)
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ldq t7, 7*8(a1)
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ADDQC (t0, t1, t0) // add 1st and 2nd quadwords into t0
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ADDQC (t2, t3, t2) // add 3rd and 4th quadwords into t2
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ADDQC (t0, t2, t0) // add first four quadwords into t0
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ADDQC (t4, t5, t4) // add 5th and 6th quadwords into t4
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ADDQC (t6, t7, t6) // add 7th and 8th quadwords into t6
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ADDQC (t4, t6, t4) // add second four quadwords into t4
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ADDQC (t0, t4, t0) // add all eight quadwords into t0
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ADDQC (a0, t0, a0) // add to sum in a0
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addq a1, 64, a1 // increment buffer address
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cmpeq a1, a4, t12 // at end of last block?
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beq t12, 40b // if eq[false], sum next block
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subq a3, a1, a2 // recompute remaining byte count
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//
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// Sum quadwords following last 64-byte block.
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//
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50: and a2, 7*8, v0 // check for residual quadwords
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beq v0, 60f // if eq, no more quadwords
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ldq t0, 0(a1) // get quadword
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ADDQC (a0, t0, a0) // add to sum
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addq a1, 8, a1 // increment buffer address
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subq a2, 8, a2 // decrement byte count
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br 50b // check for more quadwords
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//
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// Sum words following last quadword.
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//
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60: and a2, 3*2, v0 // check for residual words
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beq v0, 70f // if eq, no more words
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ldq_u t0, 0(a1) // get quadword containing word
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extwl t0, a1, t0 // extract word zero extended
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ADDQC (a0, t0, a0) // add to sum
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addq a1, 2, a1 // increment buffer address
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subq a2, 2, a2 // decrement byte count
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br 60b // check for more words
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//
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// Fold final sum in a0 from its four-word parallel quadword format into
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// a single 16-bit word in v0.
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//
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70: extwl a0, 0, t0 // get word 0
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extwl a0, 2, t1 // get word 1
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extwl a0, 4, t2 // get word 2
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extwl a0, 6, t3 // get word 3
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addq t0, t1, t0 // add words 0 and 1
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addq t2, t3, t2 // add words 2 and 3
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addq t0, t2, a0 // four word sum, possible 2 bit carry
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80: srl a0, 16, t0 // get carry bits
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zapnot a0, 0x3, a0 // isolate sum bits
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addq a0, t0, a0 // add words, possible one bit carry
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srl a0, 16, t0 // get carry bit
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zapnot a0, 0x3, a0 // isolate sum bits
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addq a0, t0, v0 // add words, no carry possible
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ret zero, (ra) // return
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.end ChkSum
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