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1077 lines
28 KiB
1077 lines
28 KiB
/*** ntreg.c - processor-specific register structures
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*
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* Copyright <C> 1990, Microsoft Corporation
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* Copyright <C> 1992, Digital Equipment Corporation
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*
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* Purpose:
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* Structures used to parse and access register and flag
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* fields.
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*
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* Revision History:
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*
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* [-] 08-Aug-1992 Miche Baker-Harvey Created for Alpha
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* [-] 01-Jul-1990 Richk Created.
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*
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*************************************************************************/
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//
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// This line keeps alpha pseudo ops from being defined in kxalpha.h
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#ifdef ALPHA
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#define HEADER_FILE
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#endif
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#include <string.h>
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#include "ntsdp.h"
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#ifdef KERNEL
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// TODO - do we support this compiler directive?
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#define __unaligned
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#include "ntdis.h"
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// MBH - ntos includes stdarg; we need the special version
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// which is referenced in xxsetjmp. I had an xxstdarg, but
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// usoft got rid of it, so now we call xxsetjmp to get
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// stdarg.h because ntos.h uses it.
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// So much for modularity.
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#include <xxsetjmp.h>
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#include <ntos.h>
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USHORT PreviousProcessor;
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extern BOOLEAN fSwitched;
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#undef __unaligned
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#endif
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#include <alphaops.h>
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#include "ntreg.h"
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#include "strings.h"
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// we want the definitions of PSR_MODE, etc, which
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// are derived in genalpha.c by Joe for ksalpha.h.
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// They don't exist as separate defines anywhere else.
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// However, if we include ksalpha.h, we get bunches
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// of duplicate definitions. So for now (hack,hack),
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// just make a local copy of the definitions.
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// MBH TODO bugbug - ksalpha.h hack
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// #include <ksalpha.h>
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#define PSR_USER_MODE 0x1
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#define PSR_MODE 0x0 // Mode bit in PSR (bit 0)
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#define PSR_MODE_MASK 0x1 // Mask (1 bit) for mode in PSR
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#define PSR_IE 0x1 // Interrupt Enable bit in PSR (bit 1)
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#define PSR_IE_MASK 0x1 // Mask (1 bit) for IE in PSR
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#define PSR_IRQL 0x2 // IRQL in PSR (bit 2)
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#define PSR_IRQL_MASK 0x7 // Mask (2 bits) for IRQL in PSR
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CONTEXT SavedRegisterContext;
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extern ULONG EXPRLastExpression; // from module ntexpr.c
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extern ULONG EXPRLastDump; // from module ntcmd.c
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extern int fControlC;
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PUCHAR UserRegs[10] = {0};
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BOOL UserRegTest(ULONG);
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BOOL NeedUpper(ULONGLONG);
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void OutputHelp(void);
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#ifdef KERNEL
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void ChangeKdRegContext(PVOID, PVOID);
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void UpdateFirCache(PADDR);
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void InitFirCache(ULONG, PUCHAR);
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#endif
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void ClearTraceFlag(void);
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void SetTraceFlag(void);
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PUCHAR RegNameFromIndex(ULONG);
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//
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// This is the length of an instruction, and the instruction
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// to be used in setting a breakpoint (common code writes the
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// breakpoint instruction into the memory stream.
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//
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ULONG cbBrkptLength = 4;
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// these are defined in alphaops.h
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ULONG trapInstr = CALLPAL_OP | BPT_FUNC ;
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ULONG breakInstrs[] = {CALLPAL_OP | BPT_FUNC,
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CALLPAL_OP | KBPT_FUNC,
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CALLPAL_OP | CALLKD_FUNC};
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ULONG ContextType = CONTEXT_FULL;
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#define IS_FLOATING_SAVED(Register) ((SAVED_FLOATING_MASK >> Register) & 1L)
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#define IS_INTEGER_SAVED(Register) ((SAVED_INTEGER_MASK >> Register) & 1L)
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//
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// Define saved register masks.
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#define SAVED_FLOATING_MASK 0xfff00000 // saved floating registers
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#define SAVED_INTEGER_MASK 0xf3ffff02 // saved integer registers
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//
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// Instruction opcode values are defined in alphaops.h
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//
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//
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// Define stack register and zero register numbers.
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//
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#define RA 0x1a // integer register 26
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#define SP 0x1e // integer register 30
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#define ZERO 0x1f // integer register 31
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//
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// Some Alpha specific register names
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//
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#define FP 0x0f // integer register 15
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#define GP 0x1d // integer register 29
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#ifdef KERNEL
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ULONG cbCacheValid;
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UCHAR bCacheValid[16];
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ULONG contextState, SavedContextState;
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#define CONTEXTFIR 0 // only unchanged FIR in context
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#define CONTEXTVALID 1 // full, but unchanged context
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#define CONTEXTDIRTY 2 // full, but changed context
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#endif
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//
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// This parallels ntreg.h
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//
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PUCHAR pszReg[] = {
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szF0, szF1, szF2, szF3, szF4, szF5, szF6, szF7,
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szF8, szF9, szF10, szF11, szF12, szF13, szF14, szF15,
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szF16, szF17, szF18, szF19, szF20, szF21, szF22, szF23,
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szF24, szF25, szF26, szF27, szF28, szF29, szF30, szF31,
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szR0, szR1, szR2, szR3, szR4, szR5, szR6, szR7,
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szR8, szR9, szR10, szR11, szR12, szR13, szR14, szR15,
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szR16, szR17, szR18, szR19, szR20, szR21, szR22, szR23,
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szR24, szR25, szR26, szR27, szR28, szR29, szR30, szR31,
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szFpcr, szSoftFpcr, szFir, szPsr, //szIE,
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szFlagMode, szFlagIe, szFlagIrql,
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//
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// Currently assuming this is right since shadows alpha.h;
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// but know that alpha.h flag's are wrong.
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//
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szEaPReg, szExpPReg, szRaPReg, szGPReg, // psuedo-registers
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szU0Preg, szU1Preg, szU2Preg, szU3Preg, szU4Preg,
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szU5Preg, szU6Preg, szU7Preg, szU8Preg, szU9Preg
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};
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#define REGNAMESIZE sizeof(pszReg) / sizeof(PUCHAR)
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//
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// from ntsdp.h: ULONG RegIndex, Shift, Mask;
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// PSR & IE definitions are from ksalpha.h
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// which is generated automatically.
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// Steal from \\bbox2\alphado\nt\public\sdk\inc\ksalpha.h
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// NB: our masks are already shifted:
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//
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struct SubReg subregname[] = {
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{ REGPSR, PSR_MODE, PSR_MODE_MASK },
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{ REGPSR, PSR_IE, PSR_IE_MASK },
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{ REGPSR, PSR_IRQL, PSR_IRQL_MASK },
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};
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/*** UserRegTest - test if index is a user-defined register
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*
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* Purpose:
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* Test if register is user-defined for upper routines.
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*
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* Input:
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* index - index of register
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*
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* Returns:
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* TRUE if user-defined register, else FALSE
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*
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*************************************************************************/
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BOOL
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UserRegTest (
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ULONG index
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)
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{
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return (index >= PREGU0 && index <= PREGU12);
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}
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/*** GetRegContext - return register context pointer
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*
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* Purpose:
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* Return the pointer to the current register context.
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* For kernel debugging, ensure the context is read.
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*
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* Input:
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* None.
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*
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* Returns:
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* Pointer to the context.
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*
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*************************************************************************/
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PCONTEXT GetRegContext (void)
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{
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#ifdef KERNEL
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NTSTATUS NtStatus;
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if (contextState == CONTEXTFIR) {
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if (!DbgGetThreadContext(NtsdCurrentProcessor, &RegisterContext)) {
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dprintf("DbgKdGetContext failed\n");
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exit(1);
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}
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contextState = CONTEXTVALID;
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}
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#if 0
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if (fVerboseOutput) {
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dprintf("GetRegContext: state is %s\n",
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contextState == CONTEXTDIRTY? "dirty" :
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contextState == CONTEXTFIR ? "fir" :
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"valid");
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}
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#endif
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#endif
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return &RegisterContext;
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}
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/*** GetRegFlagValue - get register or flag value
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*
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* Purpose:
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* Return the value of the specified register or flag.
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* This routine calls GetRegValue to get the register
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* value and shifts and masks appropriately to extract a
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* flag value.
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*
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* Input:
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* regnum - register or flag specification
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*
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* Returns:
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* Value of register or flag.
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*************************************************************************/
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ULONGLONG
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GetRegFlagValue (
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ULONG regnum
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)
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{
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ULONGLONG value;
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if (regnum < FLAGBASE || regnum >= PREGBASE) {
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value = GetRegValue(regnum);
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} else {
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regnum -= FLAGBASE;
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value = GetRegValue(subregname[regnum].regindex);
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value = (value >> subregname[regnum].shift) & subregname[regnum].mask;
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}
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return value;
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}
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BOOL
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NeedUpper(
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ULONGLONG value
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)
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{
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//
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// if the high bit of the low part is set, then the
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// high part must be all ones, else it must be zero.
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//
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return ( ((value & 0xffffffff80000000L) != 0xffffffff80000000L) &&
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(((value & 0x80000000L) != 0) || ((value & 0xffffffff00000000L) != 0)) );
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}
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/*** GetRegValue - get register value
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*
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* Purpose:
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* Returns the value of the register from the processor
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* context structure.
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*
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* Input:
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* regnum - register specification
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*
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* Returns:
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* value of the register from the context structure
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*
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*************************************************************************/
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ULONGLONG
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GetRegValue (
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ULONG regnum
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)
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{
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if (regnum >= PREGBASE) {
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switch (regnum) {
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case PREGEA:
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// MBH - this is a bug; effective addr isn't being set anywhere
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return 0;
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case PREGEXP:
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return EXPRLastExpression;
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case PREGRA:
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return GetRegValue(RA_REG);
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case PREGP:
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return EXPRLastDump;
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case PREGU0:
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case PREGU1:
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case PREGU2:
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case PREGU3:
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case PREGU4:
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case PREGU5:
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case PREGU6:
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case PREGU7:
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case PREGU8:
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case PREGU9:
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case PREGU10:
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case PREGU11:
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case PREGU12:
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return (LONG)UserRegs[regnum - PREGU0];
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}
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}
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#ifdef KERNEL
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if (regnum != REGFIR && contextState == CONTEXTFIR) {
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(VOID) GetRegContext();
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}
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#endif
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return *(&RegisterContext.FltF0 + regnum);
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}
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void
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GetFloatingPointRegValue(ULONG regnum, PCONVERTED_DOUBLE dv)
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{
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#ifdef KERNEL
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if (regnum != REGFIR && contextState == CONTEXTFIR) {
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(VOID) GetRegContext();
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}
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#endif
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dv->li.LowPart = (ULONG)(*((PULONGLONG)&RegisterContext.FltF0 + regnum) & 0xffffffff);
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dv->li.HighPart = (ULONG)(*((PULONGLONG)&RegisterContext.FltF0 + regnum) >> 32);
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}
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/*** GetIntRegNumber - Get a register number
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*
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*
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* Purpose:
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* Get a register number, from an index value.
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* There are places where we want integers to be
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* numbered from 0-31, and this converts into
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* a CONTEXT structure.
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*
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* Input:
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* index: integer register number, between 0 and 31
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*
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* Output:
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* regnum: offset into the CONTEXT structure
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*
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* Exceptions:
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* None
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*
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* Notes:
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* This is dependent on the CONTEXT structure
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*
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******************************************************************/
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ULONG
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GetIntRegNumber (
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ULONG index
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)
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{
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/*
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if (index == 26) {
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return(REGRA);
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}
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if (index < 26) {
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return(REGBASE + index);
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}
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if (index > 26) {
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return(REGBASE + index - 1);
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}
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*/
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return(REGBASE + index);
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}
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/*** SetRegFlagValue - set register or flag value
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*
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* Purpose:
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* Set the value of the specified register or flag.
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* This routine calls SetRegValue to set the register
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* value and shifts and masks appropriately to set a
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* flag value.
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*
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* Input:
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* regnum - register or flag specification
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* regvalue - new register or flag value
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*
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* Output:
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* None.
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*
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* Exceptions:
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* error exit: OVERFLOW - value too large for flag
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*
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* Notes:
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*
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*************************************************************************/
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VOID
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SetRegFlagValue (
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ULONG regnum,
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LONGLONG regvalue
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)
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{
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ULONG regindex;
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ULONGLONG newvalue;
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PUCHAR szValue;
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ULONG index;
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//
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// Looks like for setting register values, we write them into a
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// user space; perhaps later we convert to numbers and actually
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// change some registers. Like Save Context, maybe.
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//
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if (regnum >= PREGU0 && regnum <= PREGU12) {
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szValue = (PUCHAR)regvalue;
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index = 0L;
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while (szValue[index] >= ' ') {
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index++;
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}
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szValue[index] = 0;
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if (szValue = UserRegs[regnum - PREGU0]) {
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free(szValue);
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}
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szValue = UserRegs[regnum - PREGU0] =
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malloc(strlen((PUCHAR)regvalue) + 1);
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if (szValue) {
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strcpy(szValue, (PUCHAR)regvalue);
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}
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}
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else if (regnum < FLAGBASE) {
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SetRegValue(regnum, regvalue);
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}
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else if (regnum < PREGBASE) {
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regnum -= FLAGBASE;
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if (regvalue > subregname[regnum].mask) {
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error(OVERFLOW);
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}
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regindex = subregname[regnum].regindex;
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newvalue = GetRegValue(regindex) & // old value
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(~((LONGLONG)subregname[regnum].mask << subregname[regnum].shift)) |
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(regvalue << subregname[regnum].shift); // or in the new
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SetRegValue(regindex, newvalue);
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}
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}
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/*** SetRegValue - set register value
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*
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* Purpose:
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* Set the value of the register in the processor context
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* structure.
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|
*
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* Input:
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* regnum - register specification
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* regvalue - new value to set the register
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*
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* Output:
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* None.
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*
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*************************************************************************/
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VOID
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SetRegValue (
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ULONG regnum,
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LONGLONG regvalue
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)
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{
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|
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|
#ifdef KERNEL
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|
UCHAR fUpdateCache = FALSE;
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|
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if (regnum != REGFIR || (ULONGLONG)regvalue != RegisterContext.Fir) {
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if (regnum == REGFIR) {
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fUpdateCache = TRUE;
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}
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if (contextState == CONTEXTFIR) {
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(VOID) GetRegContext();
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}
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contextState = CONTEXTDIRTY;
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}
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#endif
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*(&RegisterContext.FltF0 + regnum) = regvalue;
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#ifdef KERNEL
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|
if (fUpdateCache) {
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ADDR TempAddr;
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GetRegPCValue(&TempAddr);
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|
UpdateFirCache(&TempAddr);
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}
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|
#endif
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}
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|
|
/*** GetRegName - get register name
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|
*
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|
* Purpose:
|
|
* Parse a register name from the current command line position.
|
|
* If successful, return the register index value, else return -1.
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|
*
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* Input:
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* pchCommand - present command string position
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*
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* Returns:
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* register or flag index if found, else -1
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*
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*************************************************************************/
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ULONG GetRegName (void)
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|
{
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UCHAR szregname[9];
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UCHAR ch;
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ULONG count = 0;
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ch = (UCHAR)tolower(*pchCommand);
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pchCommand++;
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while (ch == '$' || ch >= 'a' && ch <= 'z'
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|| ch >= '0' && ch <= '9' || ch == '.') {
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if (count == 8)
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return 0xffffffff;
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szregname[count++] = ch;
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ch = (UCHAR)tolower(*pchCommand);
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pchCommand++;
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}
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szregname[count] = '\0';
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pchCommand--;
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return GetRegString(szregname);
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}
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|
|
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ULONG
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|
GetRegString (
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PUCHAR pszString
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|
)
|
|
{
|
|
ULONG count;
|
|
|
|
for (count = 0; count < REGNAMESIZE; count++)
|
|
if (!strcmp(pszString, pszReg[count]))
|
|
return count;
|
|
return 0xffffffff;
|
|
}
|
|
|
|
VOID
|
|
GetRegPCValue (
|
|
PADDR Address
|
|
)
|
|
{
|
|
|
|
ADDR32(Address, (ULONG)GetRegValue(REGFIR));
|
|
return;
|
|
}
|
|
|
|
PADDR
|
|
GetRegFPValue (
|
|
VOID
|
|
)
|
|
{
|
|
static ADDR addrFP;
|
|
|
|
ADDR32(&addrFP, (ULONG)GetRegValue(FP_REG));
|
|
return &addrFP;
|
|
}
|
|
|
|
VOID
|
|
SetRegPCValue (
|
|
PADDR paddr
|
|
)
|
|
{
|
|
// sign extend the address!
|
|
SetRegValue(REGFIR, (LONG)Flat(*paddr));
|
|
}
|
|
|
|
/*** OutputAllRegs - output all registers and present instruction
|
|
*
|
|
* Purpose:
|
|
* Function of "r" command.
|
|
*
|
|
* To output the current register state of the processor.
|
|
* All integer registers are output as well as processor status
|
|
* registers. Important flag fields are also output separately.
|
|
* OutDisCurrent is called to output the current instruction(s).
|
|
*
|
|
* Input:
|
|
* None.
|
|
*
|
|
* Output:
|
|
* None.
|
|
*
|
|
*************************************************************************/
|
|
|
|
VOID
|
|
OutputAllRegs(
|
|
BOOL Show64
|
|
)
|
|
{
|
|
int regindex;
|
|
int regnumber;
|
|
ULONGLONG regvalue;
|
|
|
|
for (regindex = 0; regindex < 34; regindex++) {
|
|
|
|
regnumber = GetIntRegNumber(regindex);
|
|
regvalue = GetRegValue(regnumber);
|
|
|
|
if ( Show64 || regindex == 32 || regindex == 33) {
|
|
|
|
dprintf("%4s=%08lx %08lx",
|
|
pszReg[regnumber],
|
|
(ULONG)(regvalue >> 32),
|
|
(ULONG)(regvalue & 0xffffffff));
|
|
if (regindex % 3 == 2) {
|
|
dprintf("\n");
|
|
} else {
|
|
dprintf(" ");
|
|
}
|
|
|
|
} else {
|
|
|
|
dprintf("%4s=%08lx%c",
|
|
pszReg[regnumber],
|
|
(ULONG)(regvalue & 0xffffffff),
|
|
NeedUpper(regvalue) ? '*' : ' ' );
|
|
if (regindex % 5 == 4) {
|
|
dprintf("\n");
|
|
} else {
|
|
dprintf(" ");
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
|
|
//
|
|
// print out the fpcr as 64 bits regardless,
|
|
// and the FIR and Fpcr's - assuming we know they follow
|
|
// the floating and integer registers.
|
|
//
|
|
|
|
regnumber = GetIntRegNumber(34); // Fir
|
|
dprintf("%4s=%08lx\n", pszReg[regnumber],
|
|
(ULONG)GetRegValue(regnumber));
|
|
|
|
regnumber = GetIntRegNumber(35); // Psr
|
|
dprintf("%4s=%08lx\n", pszReg[regnumber],
|
|
(ULONG)GetRegValue(regnumber));
|
|
|
|
dprintf("mode=%1lx ie=%1lx irql=%1lx \n",
|
|
(ULONG)GetRegFlagValue(FLAGMODE),
|
|
(ULONG)GetRegFlagValue(FLAGIE),
|
|
(ULONG)GetRegFlagValue(FLAGIRQL));
|
|
}
|
|
|
|
/*** OutputOneReg - output one register value
|
|
*
|
|
* Purpose:
|
|
* Function for the "r <regname>" command.
|
|
*
|
|
* Output the value for the specified register or flag.
|
|
*
|
|
* Input:
|
|
* regnum - register or flag specification
|
|
*
|
|
* Output:
|
|
* None.
|
|
*
|
|
*************************************************************************/
|
|
|
|
VOID
|
|
OutputOneReg (
|
|
ULONG regnum,
|
|
BOOL Show64
|
|
)
|
|
{
|
|
ULONGLONG value;
|
|
|
|
value = GetRegFlagValue(regnum);
|
|
if (regnum >= FLAGBASE) {
|
|
dprintf("%lx\n", (ULONG)value);
|
|
} else if (Show64) {
|
|
dprintf("%08lx %08lx\n", (ULONG)(value >> 32), (ULONG)(value & 0xffffffff));
|
|
} else {
|
|
dprintf("%08lx%s\n", (ULONG)value, NeedUpper(value)?"*":"");
|
|
}
|
|
}
|
|
|
|
/*** OutputHelp - output help text
|
|
*
|
|
* Purpose:
|
|
* To output a one-page summary help text.
|
|
*
|
|
* Input:
|
|
* None.
|
|
*
|
|
* Output:
|
|
* None.
|
|
*
|
|
*************************************************************************/
|
|
|
|
VOID
|
|
OutputHelp (
|
|
VOID
|
|
)
|
|
{
|
|
#ifndef KERNEL
|
|
dprintf("A [<address>] - assemble P[R] [=<addr>] [<value>] - program step\n");
|
|
dprintf("BC[<bp>] - clear breakpoint(s) Q - quit\n");
|
|
dprintf("BD[<bp>] - disable breakpoint(s) R [[<reg> [= <value>]]] - reg/flag\n");
|
|
dprintf("rF[f#] - print floating registers rL[i#] - print quad registers\n");
|
|
dprintf("BE[<bp>] - enable breakpoint(s) S <range> <list> - search\n");
|
|
dprintf("BL[<bp>] - list breakpoint(s) S+/S&/S- - set source/mixed/assembly\n");
|
|
dprintf("BP[#] <address> - set breakpoint SS <n | a | w> - set symbol suffix\n");
|
|
dprintf("C <range> <address> - compare SX [e|d [<event>|*|<expr>]] - exception\n");
|
|
dprintf("D[type][<range>] - dump memory T[R] [=<address>] [<value>] - trace\n");
|
|
dprintf("E[type] <address> [<list>] - enter U [<range>] - unassemble\n");
|
|
dprintf("F <range> <list> - fill V [<range>] - view source lines\n");
|
|
dprintf("G [=<address> [<address>...]] - go ? <expr> - display expression\n");
|
|
dprintf("J<expr> [']cmd1['];[']cmd2['] - conditional execution\n");
|
|
dprintf("K[B] <count> - stacktrace .logappend [<file>] - append to log file\n");
|
|
dprintf("LN <expr> - list near .logclose - close log file\n");
|
|
dprintf("M <range> <address> - move .logopen [<file>] - open new log file\n");
|
|
dprintf("N [<radix>] - set / show radix\n");
|
|
dprintf("~ - list threads status ~#s - set default thread\n");
|
|
dprintf("~[.|#|*|ddd]f - freeze thread ~[.|#|ddd]k[value] - backtrace stack\n");
|
|
dprintf("| - list processes status |#s - set default process\n");
|
|
dprintf("|#<command> - default process override\n");
|
|
dprintf("? <expr> - display expression\n");
|
|
dprintf("#<string> [address] - search for a string in the dissasembly\n");
|
|
dprintf("$< <filename> - take input from a command file\n");
|
|
dprintf("\n");
|
|
dprintf("<expr> ops: + - * / not by wo dw poi mod(%%) and(&) xor(^) or(|) hi low\n");
|
|
dprintf(" operands: number in current radix, public symbol, <reg>\n");
|
|
|
|
dprintf("<type> : B (byte), W (word), D (doubleword), A (ascii)\n");
|
|
dprintf(" C (dword & char), Q (quadword), U (unicode), L (list)\n");
|
|
dprintf("<pattern> : [(nt | <dll-name>)!]<var-name> (<var-name> can include ? and *)\n");
|
|
dprintf("<event> : ct, et, ld, av, cc\n");
|
|
dprintf("<radix> : 8, 10, 16\n");
|
|
dprintf("<reg> : zero, at, v0, a0-a5, t0-t12, s0-s5, fp, gp, sp, ra\n");
|
|
dprintf(" fpcr, fir, psr, int0-int5,\n");
|
|
dprintf(" f0-f31, $u0-$u9, $ea, $exp, $ra, $p\n");
|
|
#else
|
|
dprintf("A [<address>] - assemble O<type> <port> <value> - write I/O port\n");
|
|
dprintf("BC[<bp>] - clear breakpoint(s) P [=<addr>] [<value>] - program step\n");
|
|
dprintf("BD[<bp>] - disable breakpoint(s) Q - quit\n");
|
|
dprintf("BE[<bp>] - enable breakpoint(s) R [[<reg> [= <value>]]] - reg/flag\n");
|
|
dprintf("BL[<bp>] - list breakpoint(s) #R - multiprocessor register dump\n");
|
|
dprintf("rF[f#] - print floating registers rL[i#] - print quad registers\n");
|
|
dprintf("BP[#] <address> - set breakpoint S <range> <list> - search\n");
|
|
dprintf("C <range> <address> - compare S+/S&/S- - set source/mixed/assembly\n");
|
|
dprintf("D[type][<range>] - dump memory SS <n | a | w> - set symbol suffix\n");
|
|
dprintf("E[type] <address> [<list>] - enter T [=<address>] [<value>] - trace\n");
|
|
dprintf("F <range> <list> - fill U [<range>] - unassemble\n");
|
|
dprintf("G [=<address> [<address>...]] - go V [<range>] - view source lines\n");
|
|
dprintf("I<type> <port> - read I/O port X [<*|module>!]<*|symbol> - view symbols\n");
|
|
dprintf("J<expr> [']cmd1['];[']cmd2['] - conditional execution\n");
|
|
dprintf("[#]K[B] <count> - stacktrace ? <expr> - display expression\n");
|
|
dprintf("LN <expr> - list near .logappend [<file>] - append to log file\n");
|
|
dprintf("M <range> <address> - move .logclose - close log file\n");
|
|
dprintf("N [<radix>] - set / show radix .logopen [<file>] - open new log file\n");
|
|
dprintf("#<string> [address] - search for a string in the dissasembly\n");
|
|
dprintf("$< <filename> - take input from a command file\n");
|
|
dprintf("\n");
|
|
dprintf("<expr> ops: + - * / not by wo dw poi mod(%%) and(&) xor(^) or(|) hi low\n");
|
|
dprintf(" operands: number in current radix, public symbol, <reg>\n");
|
|
dprintf("<type> : B (byte), W (word), D (doubleword), A (ascii), T (translation buffer)\n");
|
|
dprintf(" Q (quadword), U (unicode), L (list), O (object)\n");
|
|
dprintf("<pattern> : [(nt | <dll-name>)!]<var-name> (<var-name> can include ? and *)\n");
|
|
dprintf("<radix> : 8, 10, 16\n");
|
|
dprintf("<reg> : zero, at, v0, a0-a5, t0-t12, s0-s5, fp, gp, sp, ra\n");
|
|
dprintf(" fpcr, fir, psr, int0-int5,\n");
|
|
dprintf(" f0-f31, $u0-$u9, $ea, $exp, $ra, $p\n");
|
|
#endif
|
|
}
|
|
|
|
void ClearTraceFlag (void)
|
|
{
|
|
;
|
|
}
|
|
|
|
void SetTraceFlag (void)
|
|
{
|
|
;
|
|
}
|
|
|
|
#ifdef KERNEL
|
|
VOID
|
|
ChangeKdRegContext(
|
|
PVOID firAddr,
|
|
PVOID unused
|
|
)
|
|
{
|
|
NTSTATUS NtStatus;
|
|
|
|
if (firAddr) { // initial context
|
|
contextState = CONTEXTFIR;
|
|
RegisterContext.Fir = (ULONG)firAddr;
|
|
}
|
|
else if (contextState == CONTEXTDIRTY) { // write final context
|
|
|
|
#if 0
|
|
if (fVerboseOutput) {
|
|
dprintf("ChangeKdRegContext: DIRTY\n");
|
|
}
|
|
#endif
|
|
|
|
NtStatus = DbgKdSetContext(NtsdCurrentProcessor, &RegisterContext);
|
|
if (!NT_SUCCESS(NtStatus)) {
|
|
dprintf("DbgKdSetContext failed\n");
|
|
exit(1);
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
#ifdef KERNEL
|
|
void InitFirCache (ULONG count, PUCHAR pstream)
|
|
{
|
|
PUCHAR pFirCache;
|
|
|
|
pFirCache = bCacheValid;
|
|
cbCacheValid = count;
|
|
while (count--) {
|
|
*pFirCache++ = *pstream++;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
#ifdef KERNEL
|
|
void UpdateFirCache(PADDR pcvalue)
|
|
{
|
|
cbCacheValid = 0;
|
|
cbCacheValid = GetMemString(pcvalue, bCacheValid, 16);
|
|
}
|
|
#endif
|
|
|
|
#ifdef KERNEL
|
|
ULONG
|
|
ReadCachedMemory (
|
|
PADDR paddr,
|
|
PUCHAR pvalue,
|
|
ULONG length
|
|
)
|
|
{
|
|
ULONG cBytesRead = 0;
|
|
PUCHAR pFirCache;
|
|
|
|
if (Flat(*paddr) == RegisterContext.Fir && length <= 16) {
|
|
cBytesRead = min(length, cbCacheValid);
|
|
pFirCache = bCacheValid;
|
|
while (length--) {
|
|
*pvalue++ = *pFirCache++;
|
|
}
|
|
}
|
|
return cBytesRead;
|
|
}
|
|
#endif
|
|
|
|
#ifdef KERNEL
|
|
VOID
|
|
WriteCachedMemory (
|
|
PADDR paddr,
|
|
PUCHAR pvalue,
|
|
ULONG length
|
|
)
|
|
{
|
|
ULONG index;
|
|
|
|
for (index = 0; index < cbCacheValid; index++) {
|
|
if (RegisterContext.Fir + index >= Off(*paddr) &&
|
|
RegisterContext.Fir + index < Off(*paddr) + length) {
|
|
bCacheValid[index] =
|
|
*(pvalue + RegisterContext.Fir - Off(*paddr) + index);
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
#ifdef KERNEL
|
|
void
|
|
SaveProcessorState(
|
|
void
|
|
)
|
|
{
|
|
PreviousProcessor = NtsdCurrentProcessor;
|
|
SavedRegisterContext = RegisterContext;
|
|
SavedContextState = contextState;
|
|
contextState = CONTEXTFIR;
|
|
}
|
|
|
|
void
|
|
RestoreProcessorState(
|
|
void
|
|
)
|
|
{
|
|
NtsdCurrentProcessor = PreviousProcessor;
|
|
RegisterContext = SavedRegisterContext;
|
|
contextState = SavedContextState;
|
|
}
|
|
#endif
|
|
|
|
#define LOCAL_GET_REG(r) (*(&ContextRecord->FltF0 + r))
|
|
|
|
#define _RtlpDebugDisassemble(ControlPc, ContextRecord)
|
|
#define _RtlpFoundTrapFrame(NextPc)
|
|
|
|
|
|
|
|
/*++
|
|
|
|
Routine Description:
|
|
|
|
Read longword at addr into value.
|
|
|
|
Arguments:
|
|
|
|
addr - address at which to read
|
|
value - where to put the result
|
|
|
|
|
|
--*/
|
|
|
|
BOOLEAN
|
|
LocalDoMemoryRead(
|
|
LONG address,
|
|
PULONG pvalue
|
|
)
|
|
{
|
|
ADDR addrStruct;
|
|
|
|
ADDR32( &addrStruct, address) ;
|
|
if (!GetMemDword(&addrStruct, pvalue)) {
|
|
// dprintf("RtlVirtualUnwind: Can't get at address %08lx\n",
|
|
// address);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
PUCHAR RegNameFromIndex (ULONG index)
|
|
{
|
|
return pszReg[index];
|
|
}
|
|
|
|
|
|
void
|
|
dumpQuadContext(PCONTEXT qc)
|
|
{
|
|
if(fVerboseOutput == 0) {
|
|
return;
|
|
}
|
|
dprintf("QuadContext at %08x\n", qc);
|
|
dprintf("fir %08Lx\n", qc->Fir);
|
|
dprintf("ra %08Lx v0 %08Lx sp %08Lx fp %08Lx\n",
|
|
qc->IntRa, qc->IntV0, qc->IntSp, qc->IntFp);
|
|
dprintf("a0 %08Lx a1 %08Lx a2 %08Lx a3 %08Lx\n",
|
|
qc->IntA0, qc->IntA1, qc->IntA2, qc->IntA3);
|
|
}
|
|
|
|
void
|
|
dumpIntContext(PCONTEXT lc)
|
|
{
|
|
if(fVerboseOutput == 0) {
|
|
return;
|
|
}
|
|
dprintf("LongContext at %08x\n", lc);
|
|
dprintf("fir %08x\n", lc->Fir);
|
|
dprintf("ra %08x v0 %08x sp %08x fp %08x\n",
|
|
lc->IntRa, lc->IntV0, lc->IntSp, lc->IntFp);
|
|
dprintf("a0 %08x a1 %08x a2 %08x a3 %08x\n",
|
|
lc->IntA0, lc->IntA1, lc->IntA2, lc->IntA3);
|
|
}
|
|
|
|
void
|
|
printFloatReg()
|
|
{
|
|
CONVERTED_DOUBLE dv; // double value
|
|
ULONG i;
|
|
|
|
//
|
|
// Get past F, onto register name
|
|
//
|
|
pchCommand++;
|
|
(void)PeekChar();
|
|
|
|
if (*pchCommand == ';' || *pchCommand == '\0') {
|
|
|
|
//
|
|
// Print them all out
|
|
//
|
|
for (i = 0 ; i < 16; i ++) {
|
|
|
|
GetFloatingPointRegValue(i, &dv);
|
|
dprintf("%4s = %16e\t",
|
|
RegNameFromIndex(i), dv.d);
|
|
|
|
GetFloatingPointRegValue(i+16, &dv);
|
|
dprintf("%4s = %16e\n",
|
|
RegNameFromIndex(i+16), dv.d);
|
|
}
|
|
return;
|
|
}
|
|
|
|
//
|
|
// GetRegName works for both floats and otherwise
|
|
// as does NameFromIndex
|
|
//
|
|
|
|
if ((i = GetRegName()) == -1)
|
|
error(SYNTAX);
|
|
GetFloatingPointRegValue(i, &dv);
|
|
dprintf("%s = %26.18e %08lx %08lx\n",
|
|
RegNameFromIndex(i), dv.d, dv.li.HighPart, dv.li.LowPart);
|
|
return;
|
|
}
|
|
|
|
BOOL
|
|
DbgGetThreadContext(
|
|
THREADORPROCESSOR TorP,
|
|
PCONTEXT Context
|
|
)
|
|
{
|
|
#ifdef KERNEL
|
|
return NT_SUCCESS(DbgKdGetContext(TorP, Context));
|
|
#else // KERNEL
|
|
return GetThreadContext(TorP, Context);
|
|
#endif // KERNEL
|
|
}
|
|
|
|
|
|
BOOL
|
|
DbgSetThreadContext(
|
|
THREADORPROCESSOR TorP,
|
|
PCONTEXT Context
|
|
)
|
|
{
|
|
#ifdef KERNEL
|
|
return NT_SUCCESS(DbgKdSetContext(TorP, Context));
|
|
#else // KERNEL
|
|
return SetThreadContext(TorP, Context);
|
|
#endif // KERNEL
|
|
}
|