Leaked source code of windows server 2003
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273 lines
5.2 KiB

  1. /*++
  2. Module Name:
  3. pmpic.c
  4. Abstract:
  5. This file contains functions that are specific to
  6. the PIC version of the ACPI hal.
  7. Author:
  8. Jake Oshins
  9. Environment:
  10. Kernel mode only.
  11. Revision History:
  12. */
  13. #include "halp.h"
  14. #include "acpitabl.h"
  15. #include "xxacpi.h"
  16. #include "eisa.h"
  17. #include "ixsleep.h"
  18. VOID
  19. HalpAcpiSetTempPicState(
  20. VOID
  21. );
  22. VOID
  23. HalpMaskAcpiInterrupt(
  24. VOID
  25. );
  26. VOID
  27. HalpUnmaskAcpiInterrupt(
  28. VOID
  29. );
  30. extern PVOID HalpEisaControlBase;
  31. #define EISA_CONTROL (PUCHAR)&((PEISA_CONTROL) HalpEisaControlBase)
  32. BOOLEAN HalpPicStateIntact = TRUE;
  33. #ifdef ALLOC_PRAGMA
  34. #pragma alloc_text(PAGELK, HalpAcpiSetTempPicState)
  35. #pragma alloc_text(PAGELK, HalpSetAcpiEdgeLevelRegister)
  36. #pragma alloc_text(PAGELK, HalpAcpiPicStateIntact)
  37. #pragma alloc_text(PAGELK, HalpSaveInterruptControllerState)
  38. #pragma alloc_text(PAGELK, HalpRestoreInterruptControllerState)
  39. #pragma alloc_text(PAGELK, HalpSetInterruptControllerWakeupState)
  40. #pragma alloc_text(PAGELK, HalpPostSleepMP)
  41. #pragma alloc_text(PAGELK, HalpMaskAcpiInterrupt)
  42. #pragma alloc_text(PAGELK, HalpUnmaskAcpiInterrupt)
  43. #pragma alloc_text(PAGE, HaliSetVectorState)
  44. #pragma alloc_text(PAGE, HaliIsVectorValid)
  45. #endif
  46. VOID
  47. HaliSetVectorState(
  48. IN ULONG Vector,
  49. IN ULONG Flags
  50. )
  51. {
  52. return;
  53. }
  54. BOOLEAN
  55. HaliIsVectorValid(
  56. IN ULONG Vector
  57. )
  58. {
  59. if (Vector < 16) {
  60. return TRUE;
  61. }
  62. return FALSE;
  63. }
  64. VOID
  65. HalpAcpiSetTempPicState(
  66. VOID
  67. )
  68. {
  69. ULONG flags;
  70. USHORT picMask;
  71. flags = HalpDisableInterrupts();
  72. HalpInitializePICs(FALSE);
  73. //
  74. // Halacpi lets the PCI interrupt programming be
  75. // dynamic. So...
  76. //
  77. // Unmask only the clock sources on the PIC and the
  78. // ACPI vector. The rest of the vectors will be
  79. // unmasked later, after we have restored PCI IRQ
  80. // routing.
  81. //
  82. picMask = 0xfefe; // mask everything but clocks
  83. //
  84. // Unmask ACPI vector
  85. //
  86. picMask &= ~(1 << (UCHAR)HalpFixedAcpiDescTable.sci_int_vector);
  87. //
  88. // Write the mask into the hardware.
  89. //
  90. WRITE_PORT_UCHAR(EISA_CONTROL->Interrupt1ControlPort1,
  91. (UCHAR)(picMask & 0xff));
  92. WRITE_PORT_UCHAR(EISA_CONTROL->Interrupt2ControlPort1,
  93. (UCHAR)((picMask >> 8) & 0xff));
  94. //
  95. // For now, set the edge-level control register
  96. // so that all vectors are edge except the
  97. // ACPI vector. This is done because the PIC
  98. // will trigger if an idle ISA vector is set to
  99. // edge. After the ACPI driver resets all the
  100. // PCI vectors to what we thought they should be,
  101. //
  102. HalpSetAcpiEdgeLevelRegister();
  103. HalpPicStateIntact = FALSE;
  104. HalpRestoreInterrupts(flags);
  105. }
  106. VOID
  107. HalpSetAcpiEdgeLevelRegister(
  108. VOID
  109. )
  110. {
  111. USHORT elcr;
  112. //
  113. // The idea here is to set the ELCR so that only the ACPI
  114. // vector is set to 'level.' That way we can reprogram
  115. // the PCI interrupt router without worrying that the
  116. // PIC will start triggering endless interrupts because
  117. // we have a source programmed to level that is being
  118. // routed to the ISA bus.
  119. //
  120. if (HalpFixedAcpiDescTable.sci_int_vector < PIC_VECTORS) {
  121. elcr = 1 << HalpFixedAcpiDescTable.sci_int_vector;
  122. WRITE_PORT_UCHAR(EISA_CONTROL->Interrupt1EdgeLevel,
  123. (UCHAR)(elcr & 0xff));
  124. WRITE_PORT_UCHAR(EISA_CONTROL->Interrupt2EdgeLevel,
  125. (UCHAR)(elcr >> 8));
  126. }
  127. }
  128. VOID
  129. HalpRestoreInterruptControllerState(
  130. VOID
  131. )
  132. {
  133. ULONG flags;
  134. USHORT picMask;
  135. flags = HalpDisableInterrupts();
  136. //
  137. // This function is called after PCI interrupt routing has
  138. // been restored.
  139. //
  140. WRITE_PORT_UCHAR(EISA_CONTROL->Interrupt1ControlPort1,
  141. HalpMotherboardState.PicState.MasterMask);
  142. WRITE_PORT_UCHAR(EISA_CONTROL->Interrupt2ControlPort1,
  143. HalpMotherboardState.PicState.SlaveMask);
  144. HalpRestorePicEdgeLevelRegister();
  145. HalpPicStateIntact = TRUE;
  146. HalpRestoreInterrupts(flags);
  147. }
  148. BOOLEAN
  149. HalpAcpiPicStateIntact(
  150. VOID
  151. )
  152. {
  153. return HalpPicStateIntact;
  154. }
  155. VOID
  156. HalpSaveInterruptControllerState(
  157. VOID
  158. )
  159. {
  160. HalpSavePicState();
  161. }
  162. VOID
  163. HalpSetInterruptControllerWakeupState(
  164. ULONG Context
  165. )
  166. {
  167. HalpAcpiSetTempPicState();
  168. }
  169. VOID
  170. HalpPostSleepMP(
  171. IN LONG NumberProcessors,
  172. IN volatile PLONG Number
  173. )
  174. {
  175. }
  176. VOID
  177. HalpMaskAcpiInterrupt(
  178. VOID
  179. )
  180. {
  181. }
  182. VOID
  183. HalpUnmaskAcpiInterrupt(
  184. VOID
  185. )
  186. {
  187. }
  188. #if DBG
  189. NTSTATUS
  190. HalpGetApicIdByProcessorNumber(
  191. IN UCHAR Processor,
  192. IN OUT USHORT *ApicId
  193. )
  194. /*++
  195. Routine Description:
  196. This routine only exists on DEBUG builds of the PIC ACPI HAL because
  197. that HAL is build MP and the SRAT code will be included. The SRAT
  198. code will not be exercised but needs this routine in order to link.
  199. Arguments:
  200. Ignored.
  201. Return Value:
  202. STATUS_NOT_FOUND
  203. --*/
  204. {
  205. return STATUS_NOT_FOUND;
  206. }
  207. #endif