Leaked source code of windows server 2003
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  1. /*++
  2. Copyright (c) 1997 - 1999 SCM Microsystems, Inc.
  3. Module Name:
  4. PscrRdWr.h
  5. Abstract:
  6. Constants & access function prototypes for SCM PSCR smartcard reader
  7. Author:
  8. Andreas Straub
  9. Revision History:
  10. Andreas Straub 7/16/1997 Initial Version
  11. --*/
  12. #if !defined( __PSCR_RDWR_H__ )
  13. #define __PSCR_RDWR_H__
  14. #pragma pack( 1 )
  15. //
  16. // The usage of the PSCR_REGISTERS struct is a little bit tricky:
  17. // We set the address of that stucture to the IO Base Port, then
  18. // the other reg's can accessed by their address.
  19. // p.E. &PscrRegs = 0x320 --> &PscrRegs->CmdStatusReg = 0x321...
  20. //
  21. typedef struct _PSCR_REGISTERS {
  22. UCHAR DataReg;
  23. UCHAR CmdStatusReg;
  24. UCHAR SizeLSReg;
  25. UCHAR SizeMSReg;
  26. } PSCR_REGISTERS, *PPSCR_REGISTERS;
  27. #define SIZEOF_PSCR_REGISTERS ( sizeof( PSCR_REGISTERS )
  28. #pragma pack()
  29. typedef enum _READER_POWER_STATE {
  30. PowerReaderUnspecified = 0,
  31. PowerReaderWorking,
  32. PowerReaderOff
  33. } READER_POWER_STATE, *PREADER_POWER_STATE;
  34. typedef struct _READER_EXTENSION {
  35. // I/O address where the reader is configured.
  36. PPSCR_REGISTERS IOBase;
  37. ULONG IOWindow;
  38. ULONG MaxIFSD;
  39. // IRQ assigned by the system
  40. ULONG CurrentIRQ;
  41. //
  42. // limit for read timeout. the absolute timeout limit is
  43. // MaxRetries * DELAY_PSCR_WAIT
  44. //
  45. ULONG MaxRetries;
  46. // Source/Destination byte always used by the PCMCIA (PC Card) reader.
  47. UCHAR Device;
  48. // Software revision ID of the SwapSmart firmware.
  49. UCHAR FirmwareMajor, FirmwareMinor, UpdateKey;
  50. //
  51. // Interrupt status; the flag is raised if an freeze event was detected
  52. // and cleared if the interface was cleared (int service routine or
  53. // PscrRead)
  54. //
  55. BOOLEAN FreezePending;
  56. //
  57. // Selected file in the reader file system; the flag is raised if the
  58. // ICC1 status file was selected & is cleared if any generic ioctl was
  59. // issued (in this case another file may be selected)
  60. //
  61. BOOLEAN StatusFileSelected;
  62. BOOLEAN InvalidStatus;
  63. BOOLEAN CardPresent;
  64. // Current reader power state.
  65. READER_POWER_STATE ReaderPowerState;
  66. } READER_EXTENSION, *PREADER_EXTENSION;
  67. #define SIZEOF_READER_EXTENSION ( sizeof( READER_EXTENSION ))
  68. //
  69. // Constants -----------------------------------------------------------------
  70. //
  71. #define PSCR_ID_STRING "SCM SwapSmart 2."
  72. #define TLV_BUFFER_SIZE 0x20
  73. #define ATR_SIZE 0x40 // TS + 32 + SW + PROLOGUE + EPILOGUE...
  74. #define PSCR_MAX_RETRIES 1000
  75. #define CLEAR_BIT 0x00
  76. #define DEFAULT_WAIT_TIME 0x01
  77. #define PSCR_PROLOGUE_LENGTH 0x03
  78. #define PSCR_EXT_PROLOGUE_LENGTH 0x05
  79. #define PSCR_STATUS_LENGTH 0x02
  80. #define PSCR_LRC_LENGTH 0x01
  81. #define PSCR_CRC_LENGTH 0x02
  82. #define PSCR_EPILOGUE_LENGTH PSCR_LRC_LENGTH
  83. #define PCB_DEFAULT 0x00
  84. #define MAX_T1_BLOCK_SIZE 270
  85. //
  86. // data buffer idx
  87. //
  88. #define PSCR_NAD 0x00
  89. #define PSCR_PCB 0x01
  90. #define PSCR_LEN 0x02
  91. #define PSCR_INF 0x03
  92. #define PSCR_APDU PSCR_INF
  93. //
  94. // device identifier for reset, deactivate
  95. //
  96. #define DEVICE_READER 0x00
  97. #define DEVICE_ICC1 0x01
  98. #define DEVICE_ICC2 0x02
  99. //
  100. // NAD's
  101. //
  102. #define NAD_TO_ICC1 0x02
  103. #define NAD_TO_ICC2 0x42
  104. #define NAD_TO_PSCR 0x12
  105. #define REMOTE_NAD_TO_ICC1 0x03
  106. #define REMOTE_NAD_TO_ICC2 0x43
  107. #define REMOTE_NAD_TO_PSCR 0x13
  108. //
  109. // PSCR Commands
  110. //
  111. #define CLA_SET_INTERFACE_PARAM 0x80
  112. #define CLA_FREEZE 0x80
  113. #define CLA_RESET 0x20
  114. #define CLA_DEACTIVATE 0x20
  115. #define CLA_SELECT_FILE 0x00
  116. #define CLA_READ_BINARY 0x00
  117. #define CLA_WRITE_BINARY 0x00
  118. #define CLA_VERIFY 0x00
  119. #define CLA_WARM_RESET 0x20
  120. #define CLA_SOFTWARE_UPDATE 0x80
  121. #define CLA_SET_MODE 0x80
  122. #define INS_SET_INTERFACE_PARAM 0x60
  123. #define INS_FREEZE 0x70
  124. #define INS_RESET 0x10
  125. #define INS_DEACTIVATE 0x14
  126. #define INS_SELECT_FILE 0xA4
  127. #define INS_READ_BINARY 0xB0
  128. #define INS_WRITE_BINARY 0xD0
  129. #define INS_VERIFY 0x20
  130. #define INS_WARM_RESET 0x1F
  131. #define INS_SOFTWARE_UPDATE 0xFF
  132. #define INS_SET_MODE 0x61
  133. //
  134. // Status Read Only Register
  135. //
  136. #define PSCR_DATA_AVAIL_BIT 0x80
  137. #define PSCR_FREE_BIT 0x40
  138. #define PSCR_WRITE_ERROR_BIT 0x02
  139. #define PSCR_READ_ERROR_BIT 0x01
  140. //
  141. // Command Write Only Register...
  142. //
  143. #define PSCR_RESET_BIT 0x08
  144. #define PSCR_SIZE_READ_BIT 0x04
  145. #define PSCR_SIZE_WRITE_BIT 0x02
  146. #define PSCR_HOST_CONTROL_BIT 0x01
  147. //
  148. // Tags...
  149. //
  150. #define TAG_MODULE 0x02
  151. #define TAG_MEMORY_SIZE 0x03
  152. #define TAG_UPDATE_KEY 0x08
  153. #define TAG_SOFTWARE_REV 0x0F
  154. #define TAG_BLOCK_COMP_OPTION 0x13
  155. #define TAG_READER_MECH_OPTIONS 0x20
  156. #define TAG_READER_STATUS 0x21
  157. #define TAG_ICC_PROTOCOLS 0x22
  158. #define TAG_BI 0x23
  159. #define TAG_FI 0x24
  160. #define TAG_PTS_PARAM 0x25
  161. #define TAG_PROTOCOL_STATUS 0x26
  162. #define TAG_SET_NULL_BYTES 0x2d
  163. #define TAG_FREEZE_EVENTS 0x30
  164. #define TAG_BIT_LENGTH 0x40
  165. #define TAG_CGT 0x41
  166. #define TAG_BWT 0x42
  167. #define TAG_CWT 0x43
  168. #define TAG_PROTOCOL_PARAM 0x44
  169. //
  170. // card power definitions ( Tag 0x21 )
  171. //
  172. #define PSCR_ICC_ABSENT 0x00
  173. #define PSCR_ICC_PRESENT 0x01
  174. #define PSCR_ICC_POWERED 0x02
  175. #define PSCR_ICC_IN_TRANSP_MODE 0xA0
  176. #define PSCR_ICC_UNKNOWN 0xFF
  177. //
  178. // protocol definitions ( Tag 0x22 )
  179. //
  180. #define PSCR_PROTOCOL_UNDEFINED 0x00
  181. #define PSCR_PROTOCOL_T0 0x01
  182. #define PSCR_PROTOCOL_T1 0x02
  183. #define PSCR_PROTOCOL_T14 0x03
  184. #define PSCR_PROTOCOL_I2C 0x80
  185. #define PSCR_PROTOCOL_3WIRE 0x81
  186. #define PSCR_PROTOCOL_2WIRE 0x81
  187. #define WTX_REQUEST 0xC3
  188. #define WTX_REPLY 0xE3
  189. //
  190. // File ID's
  191. //
  192. #define FILE_MASTER 0x3F00
  193. #define FILE_PSCR_CONFIG 0x0020
  194. #define FILE_PSCR_DIR 0x7F60
  195. #define FILE_PSCR_DIR_CONFIG 0x6020
  196. #define FILE_PSCR_DIR_STATUS 0x6021
  197. #define FILE_PSCR_DIR_FREEZE_CONFIG 0x6030
  198. #define FILE_PSCR_DIR_FREEZE_STATUS 0x6031
  199. #define FILE_ICC1_DIR 0x7F70
  200. #define FILE_ICC1_DIR_CONFIG 0x7020
  201. #define FILE_ICC1_DIR_STATUS 0x7021
  202. #define FILE_ICC2_DIR_CONFIG 0x7120
  203. #define FILE_ICC2_DIR_STATUS 0x7121
  204. //
  205. // Status Word Definitions
  206. //
  207. #define PSCR_SW_COMMAND_FAIL 0x6985
  208. #define PSCR_SW_INVALID_PARAM 0x6A80
  209. #define PSCR_SW_INCONSISTENT_DATA 0x6A85
  210. #define PSCR_SW_NO_PROTOCOL_SUPPORT 0x62A3
  211. #define PSCR_SW_SYNC_ATR_SUCCESS 0x9000
  212. #define PSCR_SW_ASYNC_ATR_SUCCESS 0x9001
  213. #define PSCR_SW_NO_PROTOCOL 0x62A5
  214. #define PSCR_SW_NO_ATR 0x62A6
  215. #define PSCR_SW_NO_ATR_OR_PROTOCOL 0x62A7
  216. #define PSCR_SW_NO_ICC 0x64A1
  217. #define PSCR_SW_ICC_NOT_ACTIVE 0x64A2
  218. #define PSCR_SW_NON_SUPPORTED_PROTOCOL 0x64A3
  219. #define PSCR_SW_PROTOCOL_ERROR 0x64A8
  220. #define PSCR_SW_NO_ATR_OR_PROTOCOL2 0x64A7
  221. #define PSCR_SW_FILE_NOT_FOUND 0x6A82
  222. #define PSCR_SW_FILE_NO_ACCEPPTED_AUTH 0x6982
  223. #define PSCR_SW_FILE_NO_ACCESS 0x6985
  224. #define PSCR_SW_FILE_BAD_OFFSET 0x6B00
  225. #define PSCR_SW_END_OF_FILE_READ 0x6282
  226. #define PSCR_SW_END_OF_FILE_WRITE 0x6301
  227. #define PSCR_SW_WRITE_FILE_FAIL 0x6500
  228. #define PSCR_SW_NO_PASSWORD 0x6200
  229. #define PSCR_SW_WRONG_PASSWORD 0x6300
  230. #define PSCR_SW_VERIFY_COUNTER_FAIL 0x6983
  231. #define PSCR_SW_NO_REF_DATA 0x6A88
  232. #define PSCR_SW_FLASH_MEM_ERROR 0x6481
  233. #define PSCR_SW_FLASH_MEM_ERR2 0x6581
  234. #define PSCR_SW_WRONG_LENGTH 0x6700
  235. #define PSCR_SW_UNKNOWN_ICC_ERROR 0x64A0
  236. #define PSCR_SW_UNKNOWN_PROTOCOL_ERROR 0x64A9
  237. #define PSCR_SW_NO_PROTOCOL_SELECTED 0x64A5
  238. #define PSCR_SW_PTS_PROTOCOL_ERROR 0x64AA
  239. #define PSCR_SW_WTX_ERROR 0x64AB
  240. #define PSCR_SW_WTX_ERR2 0x65AB
  241. #define PSCR_SW_INVALID_SOURCE_ADDR 0x6F82
  242. //
  243. // Prototypes for access functions -------------------------------------------
  244. //
  245. VOID
  246. PscrFlushInterface(
  247. PREADER_EXTENSION ReaderExtension // context of call
  248. );
  249. NTSTATUS
  250. PscrRead(
  251. PREADER_EXTENSION ReaderExtension, // context of call
  252. PUCHAR pData, // ptr to data buffer
  253. ULONG DataLength, // length of data
  254. PULONG pNBytes // number of bytes read
  255. );
  256. NTSTATUS
  257. PscrWrite(
  258. PREADER_EXTENSION ReaderExtension, // context of call
  259. PUCHAR pData, // ptr to data buffer
  260. ULONG DataLength, // length of data
  261. PULONG pNBytes // number of bytes written
  262. );
  263. NTSTATUS
  264. PscrWriteDirect(
  265. PREADER_EXTENSION ReaderExtension, // context of call
  266. PUCHAR pData, // ptr to data buffer
  267. ULONG DataLength, // length of data
  268. PULONG pNBytes // number of bytes written
  269. );
  270. UCHAR
  271. PscrCalculateLRC(
  272. PUCHAR pData, // ptr to data buffer
  273. USHORT DataLength // length of data
  274. );
  275. NTSTATUS
  276. PscrWait(
  277. PREADER_EXTENSION ReaderExtension, // context of call
  278. UCHAR Mask // mask of requested bits
  279. );
  280. #endif // __PSCR_RDWR_H__
  281. // ------------------------------- END OF FILE -------------------------------