Leaked source code of windows server 2003
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265 lines
6.9 KiB

  1. page ,132
  2. ;-----------------------------Module-Header-----------------------------;
  3. ; Module Name: MVGAXX.INC
  4. ;
  5. ; This file contains the definitions of the EGA/VGA registers used by
  6. ; MVGAXX.ASM
  7. ;
  8. ;-----------------------------------------------------------------------;
  9. SC_INDEX equ 03C4h ; Sequence Controller Index register
  10. SC_MAP_MASK equ 0002H
  11. SC_MEMORY_MODE equ 0004H
  12. GC_INDEX equ 03CEh ; Graphics Controller Index register
  13. GC_FUNCTION equ 0003H
  14. GC_READ_MAP equ 0004H
  15. GC_MODE equ 0005h
  16. GC_MISC equ 0006H
  17. GC_BITMASK equ 0008H
  18. CRT_INDEX equ 03D4h ; CRT index
  19. MISC_OUTPUT equ 03C2h ; Miscellaneous Output register
  20. MISC_INPUT equ 03CCh ; Miscellaneous Output register read
  21. GRAF_ADDR equ 0CEh ;Graphics Controller Address Register
  22. GRAF_DATA equ 0CFh ;Graphics Controller Data Register
  23. GRAF_SET_RESET equ 00h ; Set/Reset Plane Color
  24. GRAF_ENAB_SR equ 01h ; Set/Reset Enable
  25. GRAF_COL_COMP equ 02h ; Color Compare Register
  26. GRAF_DATA_ROT equ 03h ; Data Rotate Register
  27. DR_ROT_CNT equ 00000111b ; Data Rotate Count
  28. DR_SET equ 00000000b ; Data Unmodified
  29. DR_AND equ 00001000b ; Data ANDed with latches
  30. DR_OR equ 00010000b ; Data ORed with latches
  31. DR_XOR equ 00011000b ; Data XORed with latches
  32. GRAF_READ_MAP equ 04h ; Read Map Select Register
  33. RM_C0 equ 00000000b ; Read C0 plane
  34. RM_C1 equ 00000001b ; Read C1 plane
  35. RM_C2 equ 00000010b ; Read C2 plane
  36. RM_C3 equ 00000011b ; Read C3 plane
  37. GRAF_MODE equ 05h ; Mode Register
  38. M_PROC_WRITE equ 00000000b ; Write processor data rotated
  39. M_LATCH_WRITE equ 00000001b ; Write latched data
  40. M_COLOR_WRITE equ 00000010b ; Write processor data as color
  41. M_AND_WRITE equ 00000011b ; Write (procdata AND bitmask)
  42. M_DATA_READ equ 00000000b ; Read selected plane
  43. M_COLOR_READ equ 00001000b ; Read color compare
  44. GRAF_CDC equ 07h ; Color Don't Care Register
  45. GRAF_BIT_MASK equ 08h ; Bit Mask Register
  46. SET_WRITE_MAP macro plane_num
  47. pushem ax,dx,cx
  48. mov cl,plane_num
  49. and cl,0011b
  50. mov ax,SC_MAP_MASK + 0100h
  51. mov dx,SC_INDEX
  52. shl ah,cl
  53. out dx,ax
  54. popem ax,dx,cx
  55. endm
  56. SET_READ_MAP macro plane_num
  57. pushem ax,dx
  58. mov ah,plane_num
  59. mov al,GC_READ_MAP
  60. mov dx,GC_INDEX
  61. out dx,ax
  62. popem ax,dx
  63. endm
  64. SET_WRITE_MASK macro plane_mask
  65. pushem ax,dx
  66. mov al,SC_MAP_MASK
  67. mov ah,plane_mask
  68. mov dx,SC_INDEX
  69. out dx,ax
  70. popem ax,dx
  71. endm
  72. pause macro
  73. jmp $+2
  74. endm
  75. ;----------------------------Private-Macro------------------------------;
  76. ; pushem
  77. ; popem
  78. ;
  79. ; Allows giving a list of registers to push/pop on a single line.
  80. ; Also allows easy verificaton that pushes and pops are balanced
  81. ; because arguements are given in the same order:
  82. ;
  83. ; pushem ax,bx,cx goes with
  84. ; popem ax,bx,cx
  85. ;
  86. ; Arguments:
  87. ; registers to push/pop
  88. ; Returns:
  89. ; nothing
  90. ; Alters:
  91. ; nothing
  92. ; Calls:
  93. ; nothing
  94. ; History:
  95. ;
  96. ; Mon Mar 09, 1987 06:12:32p -by- Wesley O. Rupel [wesleyr]
  97. ; Wrote it!
  98. ;-----------------------------------------------------------------------;
  99. pushem macro r1,r2,r3,r4,r5,r6,r7,r8,r9,rA,rB,rC,rD,rE,rF,r10,r11,r12
  100. irp x,<r1,r2,r3,r4,r5,r6,r7,r8,r9,rA,rB,rC,rD,rE,rF,r10,r11,r12>
  101. ifnb <x>
  102. push x
  103. endif
  104. endm
  105. endm
  106. popem macro r1,r2,r3,r4,r5,r6,r7,r8,r9,rA,rB,rC,rD,rE,rF,r10,r11,r12
  107. irp x,<r12,r11,r10,rF,rE,rD,rC,rB,rA,r9,r8,r7,r6,r5,r4,r3,r2,r1>
  108. ifnb <x>
  109. pop x
  110. endif
  111. endm
  112. endm
  113. ;-------------------------Macro-----------------------------------------;
  114. ; REPSTOSB Dst
  115. ;
  116. ; store <cx> copies of al at Dst, aliging destination on WORD writes
  117. ;
  118. ; Dst destination, must be of the form SEL:[di] (default is es:[di])
  119. ;
  120. ; Entry:
  121. ; Dst -> points to dest buffer
  122. ; al byte to write
  123. ; cx count bytes
  124. ;
  125. ; Alters:
  126. ; AX,BX,CX,DI
  127. ;
  128. ; NOTE this code assumes the direction flag is set to FORWARD
  129. ;
  130. ; Returns:
  131. ;
  132. ; History:
  133. ; Sun 31-Jul-1989 -by- ToddLa
  134. ; Wrote it.
  135. ;
  136. ;-----------------------------------------------------------------------;
  137. ?REPSTOSB macro Dst
  138. local l1
  139. if 0
  140. mov ah,al ; make sure ah == al
  141. mov bx,cx ; save cx for later
  142. mov cx,di
  143. and cx,0001h
  144. sub bx,cx
  145. rep stos byte ptr Dst
  146. mov cx,bx
  147. shr cx,1
  148. rep stos word ptr Dst
  149. adc cl,cl
  150. rep stos byte ptr Dst
  151. else
  152. mov ah,al ; make sure ah == al
  153. test di,1
  154. jz l1
  155. stos byte ptr Dst
  156. dec cx
  157. l1: shr cx,1
  158. rep stos word ptr Dst
  159. adc cl,cl
  160. rep stos byte ptr Dst
  161. endif
  162. endm
  163. REPSTOSB macro Dst
  164. ifb <Dst>
  165. ?REPSTOSB es:[di]
  166. else
  167. ?REPSTOSB Dst
  168. endif
  169. endm
  170. ;-------------------------Macro-----------------------------------------;
  171. ; REPMOVSB Dst, Src, alignR
  172. ;
  173. ; copy <cx> bytes from Src to Dst, aliging destination or source
  174. ; on WORD writes
  175. ;
  176. ; Dst destination, must be of the form SEL:[di] (default is es:[di])
  177. ; Src source, must be of the form SEL:[si] (default is ds:[si])
  178. ; alignR register to align si or di (default is di)
  179. ;
  180. ; Entry:
  181. ; Src -> points to source buffer
  182. ; Dst -> points to dest buffer
  183. ; cx count bytes
  184. ;
  185. ; Alters:
  186. ; BX,CX,DI,SI
  187. ;
  188. ; NOTE this code assumes the direction flag is set to FORWARD
  189. ;
  190. ; Returns:
  191. ;
  192. ; History:
  193. ; Sun 31-Jul-1989 -by- ToddLa
  194. ; Wrote it.
  195. ;
  196. ;-----------------------------------------------------------------------;
  197. ?REPMOVSB macro Dst, Src, alignR
  198. local l1
  199. if 0
  200. mov bx,cx
  201. mov cx,alignR
  202. and cx,0001h
  203. sub bx,cx
  204. rep movs byte ptr Dst, byte ptr Src
  205. mov cx,bx
  206. shr cx,1
  207. rep movs word ptr Dst, word ptr Src
  208. adc cl,cl
  209. rep movs byte ptr Dst, byte ptr Src
  210. else
  211. test alignR,1
  212. jz l1
  213. movs byte ptr Dst, byte ptr Src
  214. dec cx
  215. l1: shr cx,1
  216. rep movs word ptr Dst, word ptr Src
  217. adc cl,cl
  218. rep movs byte ptr Dst, byte ptr Src
  219. endif
  220. endm
  221. REPMOVSB macro Dst, Src, alignR
  222. ifb <Dst>
  223. ?REPMOVSB es:[di],ds:[si],di
  224. exitm
  225. endif
  226. ifb <Src>
  227. ?REPMOVSB Dst,ds:[si],di
  228. exitm
  229. endif
  230. ifb <alignR>
  231. ?REPMOVSB Dst,Src,di
  232. exitm
  233. endif
  234. ?REPMOVSB Dst,Src,alignR
  235. endm