Leaked source code of windows server 2003
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119 lines
3.3 KiB

  1. /*
  2. ** dma.h - Definitions for dma.c.
  3. **
  4. ** Portions Copyright (C) 1996-1998 National Semiconductor Corp.
  5. ** All rights reserved.
  6. ** Copyright (C) 1996-1998 Microsoft Corporation. All Rights Reserved.
  7. **
  8. ** $Id$
  9. **
  10. ** $Log$
  11. **
  12. **
  13. */
  14. #ifndef NDIS50_MINIPORT
  15. #include <conio.h>
  16. #include <nsctypes.h>
  17. #else
  18. #include "nsc.h"
  19. #endif
  20. //Definition for the Command status register
  21. #define TRANSMIT_SETUP 0x06BD0000
  22. #define RECEIVE_SETUP 0x06BD0000
  23. #define ACTIVATE_TRANSMIT 0x00000001
  24. #define ACTIVATE_RECEIVE 0x00000001
  25. #define TRANSMIT_RUNNING 0x00020000
  26. #define RECEIVE_RUNNING 0x00020000
  27. #define RECEIVE_DONE 0x80
  28. #define TRANSMIT_DONE 0x80
  29. // Definition for the Command status result in a
  30. // buufer descriptor of a Scatter Gather DMA.
  31. #define TRANSMIT_UNDERRUN 0x01
  32. //Definitions for all the FIR_DMA register offsets and sizes
  33. //Transmit registers
  34. #define DMA_TX_CMD_STATUS_OFFSET 0x00
  35. #define DMA_TX_CMD_STATUS_SIZE 0x04
  36. #define DMA_TX_DESC_COUNT_OFFSET 0x04
  37. #define DMA_TX_DESC_COUNT_SIZE 0x02
  38. #define DMA_TX_DESC_ADDR_OFFSET 0x08
  39. #define DMA_TX_DESC_ADDR_SIZE 0x04
  40. #define DMA_TX_BUFF_ADDR_OFFSET 0x0c
  41. #define DMA_TX_BUFF_ADDR_SIZE 0x04
  42. #define DMA_TX_BUFF_LEN_OFFSET 0x14
  43. #define DMA_TX_BUFF_LEN_SIZE 0x02
  44. #define DMA_TX_STATUS_CMD_OFFSET 0x17
  45. #define DMA_TX_STATUS_CMD_SIZE 0x01
  46. #define DMA_TX_TIME_COUNT_OFFSET 0x18
  47. #define DMA_TX_TIME_COUNT_SIZE 0x04
  48. #define DMA_TX_DEVICE_ID_OFFSET 0x1c
  49. #define DMA_TX_DEVICE_ID_SIZE 0x01
  50. //Reveive registers
  51. #define DMA_RX_CMD_STATUS_OFFSET 0x20
  52. #define DMA_RX_CMD_STATUS_SIZE 0x04
  53. #define DMA_RX_DESC_COUNT_OFFSET 0x24
  54. #define DMA_RX_DESC_COUNT_SIZE 0x02
  55. #define DMA_RX_DESC_ADDR_OFFSET 0x28
  56. #define DMA_RX_DESC_ADDR_SIZE 0x04
  57. #define DMA_RX_BUFF_ADDR_OFFSET 0x2c
  58. #define DMA_RX_BUFF_ADDR_SIZE 0x04
  59. #define DMA_RX_BUFF_SIZE_OFFSET 0x30
  60. #define DMA_RX_BUFF_SIZE_SIZE 0x02
  61. #define DMA_RX_BUFF_LEN_OFFSET 0x34
  62. #define DMA_RX_BUFF_LEN_SIZE 0x02
  63. #define DMA_RX_STATUS_CMD_OFFSET 0x37
  64. #define DMA_RX_STATUS_CMD_SIZE 0x01
  65. #define DMA_RX_TIME_COUNT_OFFSET 0x38
  66. #define DMA_RX_TIME_COUNT_SIZE 0x04
  67. #define DMA_RX_DEVICE_ID_OFFSET 0x3c
  68. #define DMA_RX_DEVICE_ID_SIZE 0x01
  69. typedef enum
  70. {
  71. RECEIVE_STILL_RUNNING,
  72. RECEIVE_COMPLETE_BUT_NOT_DONE,
  73. TRANSMIT_STILL_RUNNING,
  74. TRANSMIT_COMPLETE_BUT_NOT_DONE
  75. } LoopbackError;
  76. //#ifndef NDIS50_MINIPORT
  77. //Function prototypes
  78. bool ReadReg ( uint32 Offset_addr, uint16 Size, uint32 *Value );
  79. bool WriteReg ( uint32 Offset_addr, uint16 Size, uint32 Value );
  80. void LoadTransmitRegs(uint32 PhysAddr, uint16 NumOfDescriptors, uint32 OffsetRegs);
  81. void LoadReceiveRegs(uint32 PhysAddr, uint16 NumOfDescriptors, uint32 OffsetRegs);
  82. void ActivateTransmit(uint32 OffsetRegs);
  83. void ActivateReceive(uint32 OffsetRegs);
  84. bool CheckLoopbackCompletion(LoopbackError *Error, uint32 OffsetRegs);
  85. //#else
  86. /*//Function prototypes
  87. BOOLEAN ReadReg ( ULONG Offset_addr, UINT Size, ULONG *Value );
  88. BOOLEAN WriteReg ( ULONG Offset_addr, UINT Size, ULONG Value );
  89. void LoadTransmitRegs(ULONG PhysAddr, UINT NumOfDescriptors, ULONG OffsetRegs);
  90. void LoadReceiveRegs(ULONG PhysAddr, UINT NumOfDescriptors, ULONG OffsetRegs);
  91. void ActivateTransmit(ULONG OffsetRegs);
  92. void ActivateReceive(ULONG OffsetRegs);
  93. BOOLEAN CheckLoopbackCompletion(LoopbackError *Error, ULONG OffsetRegs);
  94. #endif
  95. */