Leaked source code of windows server 2003
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3.5 KiB

  1. /*++
  2. Copyright (c) 1994 Microsoft Corporation
  3. Module Name:
  4. ricoh.c
  5. Abstract:
  6. This module contains the code that contains
  7. Ricoh cardbus controller specific initialization and
  8. other dispatches
  9. Author:
  10. Ravisankar Pudipeddi (ravisp) 1-Nov-97
  11. Environment:
  12. Kernel mode
  13. Revision History :
  14. --*/
  15. #include "pch.h"
  16. VOID
  17. RicohInitialize(IN PFDO_EXTENSION FdoExtension)
  18. /*++
  19. Routine Description:
  20. Initialize Ricoh cardbus controllers
  21. Arguments:
  22. FdoExtension - Pointer to the device extension for the controller FDO
  23. Return Value:
  24. None
  25. --*/
  26. {
  27. USHORT word;
  28. UCHAR revisionID;
  29. //LATER: Remove this IF statement, it was added for paranoia once the other
  30. // Ricoh controllers were added at the last minute.
  31. if (FdoExtension->ControllerType == PcmciaRL5C466) {
  32. GetPciConfigSpace(FdoExtension, CFGSPACE_RICOH_IF16_CTRL, &word, 2);
  33. word |= IF16_LEGACY_LEVEL_1 | IF16_LEGACY_LEVEL_2;
  34. SetPciConfigSpace(FdoExtension, CFGSPACE_RICOH_IF16_CTRL, &word, 2);
  35. }
  36. #ifdef HACK_RICOH
  37. PcicWriteSocket(FdoExtension->SocketList, PCIC_CARD_INT_CONFIG, 0x08);
  38. #endif
  39. GetPciConfigSpace(FdoExtension, CFGSPACE_REV_ID, &revisionID, 1);
  40. if (((FdoExtension->ControllerType == PcmciaRL5C475) && (revisionID >= 0x80) && (revisionID <= 0x9f)) ||
  41. ((FdoExtension->ControllerType == PcmciaRL5C476) && (revisionID >= 0x80)) ) {
  42. //
  43. // Hack to make sure NICs work ok (information is from Intel)
  44. // (revision of original hack is from Ricoh)
  45. //
  46. // What this does:
  47. // The power save feature of the Ricoh controllers enables the switching off of
  48. // portions of the clock domain during certain times when, during design, it
  49. // appeared that this reduce power consumption of the overall device. However,
  50. // when this feature is enabled, timing between the PCI Request, Grant, and Frame
  51. // control signals is made more stringent such that the controller becomes
  52. // incompatible with some devices that fully support the PCI specification.
  53. // The additional current consumed by the controller when the power save feature
  54. // is disabled is small, on the order of a few milliamps.
  55. //
  56. ULONG dword;
  57. ULONG org_value;
  58. GetPciConfigSpace(FdoExtension, 0x8C, &org_value, 4);
  59. org_value &= 0xFF0000FF;
  60. dword = 0xAA5500;
  61. SetPciConfigSpace(FdoExtension, 0x8C, &dword, 4);
  62. dword = org_value | 0x30AA5500;
  63. SetPciConfigSpace(FdoExtension, 0x8C, &dword, 4);
  64. dword = org_value | 0x30000000;
  65. SetPciConfigSpace(FdoExtension, 0x8C, &dword, 4);
  66. }
  67. //
  68. // initialize IRQ routing to ISA
  69. //
  70. GetPciConfigSpace(FdoExtension, CFGSPACE_BRIDGE_CTRL, &word, 2);
  71. word |= BCTRL_IRQROUTING_ENABLE;
  72. SetPciConfigSpace(FdoExtension, CFGSPACE_BRIDGE_CTRL, &word, 2);
  73. }
  74. BOOLEAN
  75. RicohSetZV(
  76. IN PSOCKET Socket,
  77. IN BOOLEAN Enable
  78. )
  79. {
  80. UCHAR bData;
  81. if (Enable) {
  82. bData = PcicReadSocket(Socket, PCIC_RICOH_MISC_CTRL1);
  83. bData |= RICOH_MC1_ZV_ENABLE;
  84. PcicWriteSocket(Socket, PCIC_RICOH_MISC_CTRL1, bData);
  85. } else {
  86. bData = PcicReadSocket(Socket, PCIC_RICOH_MISC_CTRL1);
  87. bData &= ~RICOH_MC1_ZV_ENABLE;
  88. PcicWriteSocket(Socket, PCIC_RICOH_MISC_CTRL1, bData);
  89. }
  90. return TRUE;
  91. }