Leaked source code of windows server 2003
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178 lines
3.8 KiB

  1. title "Amd64 startup"
  2. ;++
  3. ;
  4. ; Copyright (c) 2001 Microsoft Corporation
  5. ;
  6. ; Module Name:
  7. ;
  8. ; xmstub.asm
  9. ;
  10. ; Abstract:
  11. ;
  12. ; This module implements the code that starts secondary processors. This
  13. ; module is unique in that it is assembled by the i386 32-bit assembler,
  14. ; because the Amd64 assembler does not assemble 16- or 32-bit x86 code.
  15. ;
  16. ; The .obj file that is the result of assembling this module is fed
  17. ; through a tool, DMPOBJ.EXE, that stores the contents of the relevant
  18. ; section and generates a c file (startup.c) that can be included in the
  19. ; 64-bit compilation process.
  20. ;
  21. ; Author:
  22. ;
  23. ; Forrest Foltz (forrestf) March 6, 2001
  24. ;
  25. ; Environment:
  26. ;
  27. ; Kernel mode only.
  28. ;
  29. ; Revision History:
  30. ;
  31. ;--
  32. .586p
  33. include ksamd64.inc
  34. RMSTUB SEGMENT DWORD PUBLIC USE16 'CODE'
  35. ;++
  36. ;
  37. ; VOID
  38. ; StartPx_RMStub
  39. ;
  40. ; When a new processor is started, it starts in real mode and is sent to a
  41. ; copy of this function which resides in low (<1MB) memory.
  42. ;
  43. ; When this function is complete, it jumps to StartPx_PMStub.
  44. ;
  45. ; At this point, cs will contain (start block physical address) / 16,
  46. ; and ip == 0.
  47. ;
  48. ;
  49. ;
  50. ; Arguments:
  51. ; None
  52. ;
  53. ; Return Value:
  54. ; Does not return, jumps to StartPx_PMStub
  55. ;--
  56. StartPx_RMStub:
  57. jmp spr10 ; skip the processor start block
  58. db (ProcessorStartBlockLength - ($ - StartPx_RMStub)) dup (0)
  59. spr10: cli
  60. sub eax, eax
  61. mov ax, cs
  62. mov ds, ax
  63. ;
  64. ; Load edi with the linear address of the processor start block.
  65. ;
  66. shl eax, 4
  67. mov edi, eax
  68. ;
  69. ; Load the 32-bit GDT.
  70. ;
  71. db 066h
  72. lgdt fword ptr ds:[PsbGdt32]
  73. ;
  74. ; Enter protected mode. Note paging is still off.
  75. ;
  76. mov eax, cr0
  77. or eax, CR0_PE OR CR0_ET
  78. mov cr0, eax
  79. ;
  80. ; Load ds
  81. ;
  82. mov ax, 020h
  83. mov ds, ax
  84. ;
  85. ; Load CS by performing a far jump to the protected mode target
  86. ; address
  87. ;
  88. db 066h
  89. jmp DWORD PTR ds:[edi + PsbPmTarget]
  90. RMSTUB ENDS
  91. ;++
  92. ;
  93. ; VOID
  94. ; StartPx_PMStub
  95. ;
  96. ; When a new processor is started, it starts in real mode and is sent to a
  97. ; copy of this function which resides in low (<1MB) memory.
  98. ;
  99. ; When this function is complete, it jumps to StartPx_PMStub.
  100. ;
  101. ; Arguments:
  102. ; None
  103. ;
  104. ; Return Value:
  105. ; Does not return, jumps to StartPx_LMStub
  106. ;--
  107. PMSTUB SEGMENT PARA PUBLIC 'CODE'
  108. StartPx_PMStub:
  109. ;
  110. ; 32-bit protected-mode boot code goes here. We are still executing
  111. ; the low-memory, identity-mapped copy of this code.
  112. ;
  113. ; edi -> linear address of PROCESSOR_START_BLOCK
  114. ;
  115. ;
  116. ; Enable PAE mode (requisite for LongMode), load the tiled CR3
  117. ;
  118. mov eax, DWORD PTR [edi] + PsbProcessorState + PsCr4
  119. mov cr4, eax
  120. mov eax, DWORD PTR [edi] + PsbTiledCr3
  121. mov cr3, eax
  122. ;
  123. ; Set the long mode enable syscall in the EFER msr
  124. ;
  125. mov ecx, MSR_EFER
  126. rdmsr
  127. or eax, MSR_LME OR MSR_SCE OR MSR_NXE
  128. wrmsr
  129. ;
  130. ; Enable paging and activate long mode
  131. ;
  132. mov eax, cr0
  133. or eax, CR0_PG OR CR0_WP OR CR0_AM OR CR0_NE
  134. mov cr0, eax
  135. ;
  136. ; Still in 32-bit legacy mode until we branch to a long mode
  137. ; code selector. This will branch to HalpLMStub in amd64s.asm.
  138. ;
  139. jmp FAR PTR [edi] + PsbLmIdentityTarget
  140. PMSTUB ENDS
  141. END