Leaked source code of windows server 2003
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

116 lines
4.4 KiB

  1. /*--------------------------------------------------------------------------
  2. *
  3. * Copyright (C) Cyclades Corporation, 1999-2001.
  4. * All rights reserved.
  5. *
  6. * Cyclom-Y Bus/Port Driver
  7. *
  8. * This file: cyyhw.h
  9. *
  10. * Description: This module contains the common hardware declarations
  11. * for the parent driver (cyclom-y) and child driver
  12. * (cyyport).
  13. *
  14. * Notes: This code supports Windows 2000 and x86 processor.
  15. *
  16. * Complies with Cyclades SW Coding Standard rev 1.3.
  17. *
  18. *--------------------------------------------------------------------------
  19. */
  20. /*-------------------------------------------------------------------------
  21. *
  22. * Change History
  23. *
  24. *--------------------------------------------------------------------------
  25. *
  26. *
  27. *--------------------------------------------------------------------------
  28. */
  29. #ifndef CYYHW_H
  30. #define CYYHW_H
  31. #define MAX_DEVICE_ID_LEN 200 // This definition was copied from NTDDK\inc\cfgmgr32.h
  32. // Always check if this value was changed.
  33. // This is the maximum length for the Hardware ID.
  34. #define CYYPORT_PNP_ID_WSTR L"Cyclom-Y\\Port"
  35. #define CYYPORT_PNP_ID_STR "Cyclom-Y\\Port"
  36. #define CYYPORT_DEV_ID_STR "Cyclom-Y\\Port"
  37. #define CYY_NUMBER_OF_RESOURCES 3 // Memory, PLX Memory, Interrupt
  38. // Cyclom-Y hardware
  39. #define CYY_RUNTIME_LENGTH 0x00000080
  40. #define CYY_MAX_CHIPS 8
  41. #define CYY_CHANNELS_PER_CHIP 4
  42. #define CYY_MAX_PORTS (CYY_CHANNELS_PER_CHIP*CYY_MAX_CHIPS)
  43. // Custom register offsets
  44. #define CYY_CLEAR_INTR 0x1800 //Isa; for PCI, multiply by 2
  45. #define CYY_RESET_16 0x1400 //Isa; for PCI, multiply by 2
  46. #define CYY_PCI_TYPE 0x3400 //PCI (no need to multiply by 2)
  47. // Values in CYY_PCI_TYPE register
  48. #define CYY_PLX9050 (0x0b)
  49. #define CYY_PLX9060 (0x0c)
  50. #define CYY_PLX9080 (0x0d)
  51. // Runtime registers (or Local Configuration registers)
  52. #define PLX9050_INT_OFFSET (0x4c)
  53. #define PLX9060_INT_OFFSET (0x68)
  54. #define PLX9050_INT_ENABLE (0x00000043UL)
  55. #define PLX9060_INT_ENABLE (0x00000900UL)
  56. // Write to Custom registers
  57. #define CYY_RESET_BOARD(BaseBoardAddress,IsPci) \
  58. do \
  59. { \
  60. WRITE_REGISTER_UCHAR( \
  61. (BaseBoardAddress)+(CYY_RESET_16 << IsPci), \
  62. 0x00 \
  63. ); \
  64. } while (0);
  65. #define CYY_CLEAR_INTERRUPT(BaseBoardAddress,IsPci) \
  66. do \
  67. { \
  68. WRITE_REGISTER_UCHAR( \
  69. (BaseBoardAddress)+(CYY_CLEAR_INTR << IsPci), \
  70. 0x00 \
  71. ); \
  72. } while (0);
  73. #define CYY_READ_PCI_TYPE(BaseBoardAddress) \
  74. (READ_REGISTER_UCHAR((BaseBoardAddress)+CYY_PCI_TYPE))
  75. #define PLX9050_READ_INTERRUPT_CONTROL(BaseBoardAddress) \
  76. (READ_REGISTER_ULONG((PULONG)((BaseBoardAddress)+PLX9050_INT_OFFSET)))
  77. #define PLX9050_WRITE_INTERRUPT_CONTROL(BaseBoardAddress,Value) \
  78. do { \
  79. WRITE_REGISTER_ULONG( \
  80. (PULONG)((BaseBoardAddress)+PLX9050_INT_OFFSET), \
  81. Value \
  82. ); \
  83. } while (0);
  84. #define PLX9060_READ_INTERRUPT_CONTROL(BaseBoardAddress) \
  85. (READ_REGISTER_ULONG((PULONG)((BaseBoardAddress)+PLX9060_INT_OFFSET)))
  86. #define PLX9060_WRITE_INTERRUPT_CONTROL(BaseBoardAddress,Value) \
  87. do { \
  88. WRITE_REGISTER_ULONG( \
  89. (PULONG)((BaseBoardAddress)+PLX9060_INT_OFFSET), \
  90. Value \
  91. ); \
  92. } while (0);
  93. #endif // ndef CYCOMMON_H