Leaked source code of windows server 2003
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238 lines
9.8 KiB

  1. #if !defined(SPD_DEFS_H)
  2. #define SPD_DEFS_H
  3. // File IDs for Event Logging (top 8 bits only).
  4. #define SPD_PNP_C ((ULONG)0x010000)
  5. #define SPD_W2K_C ((ULONG)0x020000)
  6. #define PRODUCT_MAX_PORTS 20
  7. // Port Types.
  8. #define SPD_8PIN_RJ45 1 // FG, SG, TXD, RXD, RTS, CTS, DTR, DCD, DSR
  9. #define SPD_10PIN_RJ45 2 // FG, SG, TXD, RXD, RTS, CTS, DTR, DCD, DSR, RI
  10. #define FAST_8PIN_RJ45 3 // FG, SG, TXD, RXD, RTS, CTS, DTR, DCD, DSR
  11. #define FAST_8PIN_XXXX 4 // FG, SG, TXD, RXD, RTS, CTS, DTR, DCD, DSR
  12. #define FAST_6PIN_XXXX 5 // FG, SG, TXD, RXD, RTS, CTS
  13. #define MODEM_PORT 6 // Modem Port
  14. // Port device object name.
  15. #define PORT_PDO_NAME_BASE L"\\Device\\SPEEDPort"
  16. // Tag used for memory allocations (must be 4 bytes in reverse).
  17. #define MEMORY_TAG 'DEPS'
  18. #define OXPCI_IO_OFFSET 0x0008 // I/O address offset between UARTs
  19. #define OXPCI_INTERNAL_MEM_OFFSET 0x0020 // Memory address offset between internal UARTs
  20. #define OXPCI_LOCAL_MEM_OFFSET 0x0400 // Memory address offset between local bus UARTs
  21. #define SPEED_GIS_REG 0x1C // Gloabl Interrupt Status Reg (GIS)
  22. #define INTERNAL_UART_INT_PENDING (ULONG)0x0000000F // Interanl UART 0, 1, 2 or 3 has an Interrupt Pending
  23. #define UART0_INT_PENDING (ULONG)0x00000001 // Interanl UART 0 Interrupt Pending
  24. #define UART1_INT_PENDING (ULONG)0x00000002 // Interanl UART 1 Interrupt Pending
  25. #define UART2_INT_PENDING (ULONG)0x00000004 // Interanl UART 2 Interrupt Pending
  26. #define UART3_INT_PENDING (ULONG)0x00000008 // Interanl UART 3 Interrupt Pending
  27. #define FAST_UARTS_0_TO_7_INTS_REG 0x07 // Fast UARTs 0 to 7 Interrupt Status Reg
  28. #define FAST_UARTS_0_TO_3_INT_PENDING 0x0F // Fast UART 0, 1, 2 or 3 has an Interrupt Pending
  29. #define FAST_UART0_INT_PENDING 0x01 // Fast UART 0 Interrupt Pending
  30. #define FAST_UART1_INT_PENDING 0x02 // Fast UART 1 Interrupt Pending
  31. #define FAST_UART2_INT_PENDING 0x04 // Fast UART 2 Interrupt Pending
  32. #define FAST_UART3_INT_PENDING 0x08 // Fast UART 3 Interrupt Pending
  33. #define FAST_UART4_INT_PENDING 0x10 // Fast UART 4 Interrupt Pending
  34. #define FAST_UART5_INT_PENDING 0x20 // Fast UART 5 Interrupt Pending
  35. #define FAST_UART6_INT_PENDING 0x40 // Fast UART 6 Interrupt Pending
  36. #define FAST_UART7_INT_PENDING 0x80 // Fast UART 7 Interrupt Pending
  37. #define FAST_UARTS_9_TO_16_INTS_REG 0x0F // Fast UARTs 8 to 15 Interrupt Status Reg
  38. #define FAST_UART8_INT_PENDING 0x01 // Fast UART 8 Interrupt Pending
  39. #define FAST_UART9_INT_PENDING 0x02 // Fast UART 9 Interrupt Pending
  40. #define FAST_UART10_INT_PENDING 0x04 // Fast UART 10 Interrupt Pending
  41. #define FAST_UART11_INT_PENDING 0x08 // Fast UART 11 Interrupt Pending
  42. #define FAST_UART12_INT_PENDING 0x10 // Fast UART 12 Interrupt Pending
  43. #define FAST_UART13_INT_PENDING 0x20 // Fast UART 13 Interrupt Pending
  44. #define FAST_UART14_INT_PENDING 0x40 // Fast UART 14 Interrupt Pending
  45. #define FAST_UART15_INT_PENDING 0x80 // Fast UART 15 Interrupt Pending
  46. #define PLX9050_INT_CNTRL_REG_OFFSET 0x4C // PLX 9050 Interrupt Control Reg Offset in PCI Config Regs.
  47. #define PLX9050_CNTRL_REG_OFFSET 0x50 // PLX 9050 Control Reg Offset in PCI Config Regs.
  48. // Clock frequencies
  49. #define CLOCK_FREQ_1M8432Hz 1843200
  50. #define CLOCK_FREQ_7M3728Hz 7372800
  51. #define CLOCK_FREQ_14M7456Hz 14745600
  52. // SPEED HardwareIDs
  53. // -------------------
  54. // Speed 2 and 4 local bus device (UNUSED)
  55. #define SPD2AND4_PCI_NO_F1_HWID L"PCI\\VEN_1415&DEV_9510&SUBSYS_000011CB" // (F1: Unusable).
  56. // SPEED4 Standard Performance PCI Card.
  57. #define SPD4_PCI_PCI954_HWID L"PCI\\VEN_1415&DEV_9501&SUBSYS_A00411CB" // (F0: Quad 950 UART).
  58. // SPEED4+ High Performance PCI Card.
  59. #define SPD4P_PCI_PCI954_HWID L"PCI\\VEN_11CB&DEV_9501&SUBSYS_A00411CB" // (F0: Quad 950 UART).
  60. #define SPD4P_PCI_8BIT_LOCALBUS_HWID L"PCI\\VEN_11CB&DEV_9511&SUBSYS_A00011CB" // (F1: 8 bit local bus).
  61. // SPEED2 Standard Performance PCI Card.
  62. #define SPD2_PCI_PCI954_HWID L"PCI\\VEN_1415&DEV_9501&SUBSYS_A00211CB" // (F0: 2 950 UARTs).
  63. // SPEED2+ High Performance PCI Card.
  64. #define SPD2P_PCI_PCI954_HWID L"PCI\\VEN_11CB&DEV_9501&SUBSYS_A00211CB" // (F0: 2 950 UARTs).
  65. #define SPD2P_PCI_8BIT_LOCALBUS_HWID L"PCI\\VEN_11CB&DEV_9511&SUBSYS_A00111CB" // (F1: 8 bit local bus).
  66. // Chase cards
  67. #define FAST4_PCI_HWID L"PCI\\VEN_10B5&DEV_9050&SUBSYS_003112E0" // PCI-Fast 4 Port Adapter
  68. #define FAST8_PCI_HWID L"PCI\\VEN_10B5&DEV_9050&SUBSYS_002112E0" // PCI-Fast 8 Port Adapter
  69. #define FAST16_PCI_HWID L"PCI\\VEN_10B5&DEV_9050&SUBSYS_001112E0" // PCI-Fast 16 Port Adapter
  70. #define FAST16FMC_PCI_HWID L"PCI\\VEN_10B5&DEV_9050&SUBSYS_004112E0" // PCI-Fast 16 FMC Adapter
  71. #define AT_FAST4_HWID L"AT_FAST4" // AT-Fast 4 Port Adapter
  72. #define AT_FAST8_HWID L"AT_FAST8" // AT-Fast 8 Port Adapter
  73. #define AT_FAST16_HWID L"AT_FAST16" // AT-Fast 16 Port Adapter
  74. #define RAS4_PCI_HWID L"PCI\\VEN_10B5&DEV_9050&SUBSYS_F001124D" // PCI-RAS 4 Multi-modem Adapter
  75. #define RAS8_PCI_HWID L"PCI\\VEN_10B5&DEV_9050&SUBSYS_F010124D" // PCI-RAS 8 Multi-modem Adapter
  76. // SPEED CardTypes
  77. #define Speed4_Pci 1 // Speed 4 adapter
  78. #define Speed2and4_Pci_8BitBus 2 // Speed 2 and 4 unused local bus.
  79. #define Speed4P_Pci 3 // Speed 4+ adapter
  80. #define Speed4P_Pci_8BitBus 4 // Speed 4+ adapter local bus
  81. // Chase Cards
  82. #define Fast4_Pci 5
  83. #define Fast8_Pci 6
  84. #define Fast16_Pci 7
  85. #define Fast16FMC_Pci 8
  86. #define Fast4_Isa 9
  87. #define Fast8_Isa 10
  88. #define Fast16_Isa 11
  89. #define RAS4_Pci 12
  90. #define RAS8_Pci 13
  91. #define Speed2_Pci 14 // Speed 2 adapter
  92. #define Speed2P_Pci 15 // Speed 2+ adapter
  93. #define Speed2P_Pci_8BitBus 16 // Speed 2+ adapter local bus
  94. /*****************************************************************************
  95. *********************************** NT 4.0 PCI IDs ***************************
  96. *****************************************************************************/
  97. // General definitions...
  98. #define OX_SEMI_VENDOR_ID 0x1415 // Oxford's VendorID Assigned by the PCI SIG
  99. #define SPX_VENDOR_ID 0x11CB // Specialix's VendorID Assigned by the PCI SIG
  100. #define OX_SEMI_SUB_VENDOR_ID OX_SEMI_VENDOR_ID // Same as Oxford's VendorID
  101. #define SPX_SUB_VENDOR_ID SPX_VENDOR_ID // Same as Specialix's VendorID
  102. // SPEED4 Low Performance Card.
  103. // ---------------------------------------------------
  104. // PCI Function 0 - (Quad 16C950 UARTs).
  105. // --------------
  106. // VendorID = OX_SEMI_VENDOR_ID
  107. // DeviceID = OX_SEMI_PCI954_DEVICE_ID
  108. // SubSystem DeviceID = SPD4_PCI954_SUB_SYS_ID
  109. // SubSystem VendorID = SPX_SUB_VENDOR_ID
  110. //
  111. // PCI Function 1 - (Unusable).
  112. // --------------
  113. // VendorID = OX_SEMI_VENDOR_ID
  114. // DeviceID = OX_SEMI_NO_F1_DEVICE_ID
  115. // SubSystem DeviceID = Unknown ??? could be 0x0000 which is bad for MS HCTs
  116. // SubSystem VendorID = OX_SEMI_SUB_VENDOR_ID
  117. //
  118. #define OX_SEMI_PCI954_DEVICE_ID 0x9501 // OX SEMI PCI954 Bridge and integrated Quad UARTs
  119. #define SPD4_PCI954_SUB_SYS_ID 0xA004 // SPX SubSystem DeviceID
  120. #define SPD2_PCI954_SUB_SYS_ID 0xA002 // SPX SubSystem DeviceID
  121. // SPEED4+ High Performance Card.
  122. // ---------------------------------------------------
  123. // PCI Function 0 - (Quad 16C950 UARTs).
  124. // --------------
  125. // VendorID = SPX_VENDOR_ID
  126. // DeviceID = SPD4P_PCI954_DEVICE_ID
  127. // SubSystem DeviceID = SPD4P_PCI954_SUB_SYS_ID
  128. // SubSystem VendorID = SPX_SUB_VENDOR_ID
  129. //
  130. // PCI Function 1 - (8 Bit Local Bus with possibly more UARTs).
  131. // --------------
  132. // VendorID = SPX_VENDOR_ID
  133. // DeviceID = SPD4P_PCI954_8BIT_BUS_DEVICE_ID
  134. // SubSystem DeviceID = SPD4P_PCI954_8BIT_BUS_SUB_SYS_ID
  135. // SubSystem VendorID = SPX_SUB_VENDOR_ID
  136. //
  137. #define SPD4P_PCI954_DEVICE_ID 0x9501 // SPX PCI954 Bridge and integrated Quad UARTs
  138. #define SPD4P_PCI954_SUB_SYS_ID 0xA004 // SPX PCI954 Bridge and integrated Quad UARTs
  139. #define SPD4P_8BIT_BUS_DEVICE_ID 0x9511 // 8 Bit Local Bus
  140. #define SPD4P_8BIT_BUS_SUB_SYS_ID 0xA000 // 8 Bit Local Bus
  141. #define SPD2P_PCI954_DEVICE_ID 0x9501 // SPX PCI954 Bridge and integrated Quad UARTs
  142. #define SPD2P_PCI954_SUB_SYS_ID 0xA002 // SPX PCI954 Bridge and integrated Quad UARTs
  143. #define SPD2P_8BIT_BUS_DEVICE_ID 0x9511 // 8 Bit Local Bus
  144. #define SPD2P_8BIT_BUS_SUB_SYS_ID 0xA001 // 8 Bit Local Bus
  145. #define PLX_VENDOR_ID 0x10B5 // PLX board vendor ID
  146. #define PLX_DEVICE_ID 0x9050 // PLX board device ID
  147. #define CHASE_SUB_VENDOR_ID 0x12E0 // Chase Research SubVendorID
  148. #define FAST4_SUB_SYS_ID 0x0031 // PCI-Fast 4 SubSystem DeviceID
  149. #define FAST8_SUB_SYS_ID 0x0021 // PCI-Fast 8 SubSystem DeviceID
  150. #define FAST16_SUB_SYS_ID 0x0011 // PCI-Fast 16 SubSystem DeviceID
  151. #define FAST16FMC_SUB_SYS_ID 0x0041 // PCI-Fast 16 FMC SubSystem DeviceID
  152. #define MORETONBAY_SUB_VENDOR_ID 0x124D // Moreton Bay SubVendorID
  153. #define RAS4_SUB_SYS_ID 0xF001 // PCI-Fast 4 SubSystem DeviceID
  154. #define RAS8_SUB_SYS_ID 0xF010 // PCI-Fast 4 SubSystem DeviceID
  155. // Port Property reg keys.
  156. #define TX_FIFO_LIMIT L"TxFiFoLimit"
  157. #define TX_FIFO_TRIG_LEVEL L"TxFiFoTrigger"
  158. #define RX_FIFO_TRIG_LEVEL L"RxFiFoTrigger"
  159. #define LO_FLOW_CTRL_LEVEL L"LoFlowCtrlThreshold"
  160. #define HI_FLOW_CTRL_LEVEL L"HiFlowCtrlThreshold"
  161. // Card Properties
  162. #define DELAY_INTERRUPT L"DelayInterrupt" // Can be used to delay the interrupt by 1.1ms on PCI-Fast16 and PCI-Fast16 FMC cards.
  163. #define SWAP_RTS_FOR_DTR L"SwapRTSForDTR" // Can be used to Swap RTS for DTR on the PCI-Fast16 cards.
  164. #define CLOCK_FREQ_OVERRIDE L"ClockFreqOverride" // Can be used to set override the card's default clock frequency.
  165. // Card Options
  166. #define DELAY_INTERRUPT_OPTION 0x00000001 // Settable on PCI-Fast 16 & PCI-Fast 16 FMC (Interrupt delayed 1.1 ms)
  167. #define SWAP_RTS_FOR_DTR_OPTION 0x00000002 // Settable on PCI-Fast 16
  168. #endif // End of SPD_DEFS.H