Leaked source code of windows server 2003
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  1. //
  2. // Copyright (R) 1999-2000 Microsoft Corporation. All rights reserved.
  3. //
  4. // PURPOSE:
  5. // File contains declarations for the Non-Volatile RAM Driver
  6. // for the Windows-based Server Appliance.
  7. //
  8. // This driver reads and writes to non-volatile RAM provided to
  9. // the OS by the OEM hardware. It also provides for the OEM to
  10. // indicate to the OS that power has cycled since the last boot
  11. // attempt that succeeded, from the BIOS perspective.
  12. //
  13. // File Name: SaMSNVRamIoctl.h
  14. // Originally: SaNVRamIoctl.h
  15. //
  16. #ifndef __SAMSNVRAM_IOCTL__
  17. #define __SAMSNVRAM_IOCTL__
  18. //
  19. // Device Names
  20. //
  21. // System Registered device name
  22. #define PDEVICENAME_SANVRAM (L"\\Device\\SANVRAM")
  23. // Device Symbolic name
  24. #define PDEVSYMBOLICNAME_SANVRAM (L"\\??\\SANVRAM1")
  25. // Device symbolic name as used in CreateFile
  26. #define PDEVFILENAME_SANVRAM (L"\\\\.\\SANVRAM1")
  27. //
  28. // IOCTL control codes
  29. //
  30. ///////////////////////////////////////////////
  31. // GET_VERSION
  32. //
  33. #define IOCTL_SANVRAM_GET_VERSION\
  34. CTL_CODE( FILE_DEVICE_UNKNOWN, 0xD01,\
  35. METHOD_BUFFERED, FILE_ANY_ACCESS )
  36. //
  37. // Structures used by the IOCTL codes
  38. //
  39. typedef struct _SANVRAM_GET_VER_OUT_BUFF {
  40. DWORD Version;
  41. } SANVRAM_GET_VER_OUT_BUFF, *PSANVRAM_GET_VER_OUT_BUFF;
  42. //
  43. // version bits
  44. //
  45. #ifndef VERSION_INFO
  46. #define VERSION_INFO
  47. #define VERSION1 0x1
  48. #define VERSION2 0x2
  49. #define VERSION3 0x4
  50. #define VERSION4 0x8
  51. #define VERSION5 0x10
  52. #define VERSION6 0x20
  53. #define VESRION7 0x40
  54. #define VESRION8 0x80
  55. #define THIS_VERSION VERSION2
  56. #endif //#ifndef VERSION_INFO
  57. ///////////////////////////////////////////////
  58. // GET_CAPABILTIES
  59. // Returns a DWORD with bits indicating capabilities.
  60. #define IOCTL_SANVRAM_GET_CAPABILITIES\
  61. CTL_CODE( FILE_DEVICE_UNKNOWN, 0xD02,\
  62. METHOD_BUFFERED, FILE_ANY_ACCESS )
  63. //
  64. // Structures used by the IOCTL codes
  65. //
  66. typedef struct _SANVRAM_GET_CAPS_OUT_BUFF {
  67. DWORD Version;
  68. DWORD Capability;
  69. } SANVRAM_GET_CAPS_OUT_BUFF, *PSANVRAM_GET_CAPS_OUT_BUFF;
  70. /////////////////////////////////////////////////////////////////////////////
  71. // Semantics of the fields of the SANVRAM_GET_CAPS_OUT_BUFF structure.
  72. //
  73. // Version: Must have exactly one bit set, and must be one of the bits
  74. // set in the Version field on a prior return from the IOCTL
  75. // IOCTL_SANVRAM_GET_VERSION. The driver is required to
  76. // support the VERSION1 interface defined in this header.
  77. // At this time no other version is defined.
  78. //
  79. // Capability bits: Indicates that this driver supports the non-volatile RAM
  80. // interface and that this driver supports the knowledge of
  81. // whether the power has cycled since the last boot up. See
  82. // the semantics for the relevant bits in the IOCTL_SANVRAM
  83. // call below.
  84. //
  85. #define NON_VOLATILE_RAM 0x01 // set if driver supports non-volatile RAM
  86. #define POWER_CYCLE_INFO 0x02 // set if driver supports power cycle info
  87. ///////////////////////////////////////////////
  88. // IOCTL_SANVRAM
  89. // Returns the input structure with actions taken
  90. // as described in the discussion below. The input
  91. // and output are identical in size and structure.
  92. //
  93. #define IOCTL_SANVRAM\
  94. CTL_CODE( FILE_DEVICE_UNKNOWN, 0xD03,\
  95. METHOD_BUFFERED, FILE_ANY_ACCESS )
  96. //
  97. // Structures used by this IOCTL code,
  98. //
  99. typedef struct _SANVRAM__BUFF {
  100. IN DWORD Version; // version of interface used
  101. IN DWORD FlagsControl; // bit field indicating desired actions
  102. OUT DWORD FlagsInfo; // bit field indicating state
  103. IN OUT DWORD FirstDWORD; // First uninterpreted DWORD: non-volatile RAM
  104. IN OUT DWORD SecondDWORD; // Second uninterpreted DWORD: non-volatile RAM
  105. } SANVRAM__BUFF, *PSANVRAM__BUFF;
  106. /////////////////////////////////////////////////////////////////////////////
  107. // Semantics of the fields of the SANVRAM_BUFF structure.
  108. //
  109. // Version: Must have exactly one bit set, and must be one of the bits
  110. // set in the Version field on a prior return from the IOCTL
  111. // IOCTL_SANVRAM_GET_VERSION. The driver is required to
  112. // support the VERSION1 interface defined in this header.
  113. // At this time no other version is defined.
  114. // FlagsControl: Flags indicating the desired actions. The two DWORD values
  115. // may be set, read, or both set and read. Setting the values
  116. // in a single call must precede reading them. Requested
  117. // reads and writes must take place directly to and from the
  118. // non-volatile media. (Thus if a standard C optimizer is used
  119. // with the compiler, and both a write and a read are requested,
  120. // then optimizations should be turned off for these actions,
  121. // perhaps by using the "volatile" key word.) The two DWORD
  122. // values are independently controlled. There are two bits
  123. // for the first DWORD and two for the second.
  124. //
  125. // NOTE:: Writing to the media
  126. // dedicated to the two non-volatile DWORDS MUST occur WHEN
  127. // and ONLY when commanded by these bits. This requirement
  128. // must be globally honored in time and space, through
  129. // failures, disk changes, etc.
  130. //
  131. #define FirstDWORD_WRITE (0x01) // set if first DWORD is to be written
  132. #define SecondDWORD_WRITE (0x02) // set if second DWORD is to be written
  133. #define FirstDWORD_READ (0x04) // set if first DWORD is to be read
  134. #define SecondDWORD_READ (0x08) // set if second DWORD is to be read
  135. #define REQUEST_ALTERNATE_OS (0x10) // set if alternate OS is to be requested
  136. #define NOTIFY_SYSTEM_FAILURE (0x20) // set to notify that alternate OS failed
  137. #define INDICATE_LAST_CALL (0x40) // set to notify that this is last call before shutdown or reboot
  138. //
  139. // FlagsInfo: Bit field for output flags: Flag indicates whether the power
  140. // has cycled between the current boot of an operating system on
  141. // this machine and the last. It indicates that this is the
  142. // first boot of an operating system since power had been off.
  143. // This bit has no significance if the capability to give this
  144. // information has not been declared with the POWER_CYCLE_INFO
  145. // bit. If the power cycle capability is provided, then this bit is
  146. // set on ALL boot attempts subsequent to a power cycle until a
  147. // boot succeedes sufficiently that the OS sets the BIOS boot
  148. // counter to zero. Stated differently we have that, after a
  149. // power cycle, the POWER_CYCLED bit will be set on all calls
  150. // to this function, until a boot attempt is under way that is
  151. // subsequent to a boot in which the OS made a call with the bit
  152. // RESET_BIOS_BOOT_COUNT set.
  153. //
  154. // The behavior is given in the following matrix where pre-reset is
  155. // prior to a call to the NVRAM driver indicating to reset the bit,
  156. // and post-reset is after such a call.
  157. // In the matrix a non-PCB is a boot that was not occasioned
  158. // by the power coming up ( a non Power Cycle Boot). The running state
  159. // of the system is characterized here by whether the immediately
  160. // preceding boot was occasioned by a power up, and whether, according
  161. // to the matrix, the power cycle bit was set prior to the boot. Note
  162. // that semantically "power cycle boot" includes all boots (CPU resets)
  163. // that are occasioned by direct user actions. On most server appliances
  164. // this is covered by power cycles. However, if the user has some other
  165. // means to request a reboot of the box, e.g., a reset switch, then that
  166. // action is included in the status of a "power cycle boot." On such a
  167. // hardware platform it is perhaps more accurate to call this a
  168. // "user action" boot, and add that as a set it includes all power
  169. // cycles.
  170. //
  171. // | Power Cycle Bit Set Before Boot | Power Cycle Bit Clear Before Boot |
  172. // -----------------------------------------------------------------------
  173. // | Power Cycle Boot | non-PCB | Power Cycle Boot | non-PCB |
  174. // -----------------------------------------------------------------------
  175. // pre-reset | Set | Set | Set | Clear |
  176. // ---------------------------------------------------------------------------------
  177. // post-reset| Clear | Clear | Clear | Clear |
  178. // ---------------------------------------------------------------------------------
  179. //
  180. #define POWER_CYCLED 0x01 // set if power has cycled,
  181. //
  182. // FirstDWORD:
  183. // SecondDWORD:
  184. // These values are simply stored and retrieved, they are not interpreted
  185. // at this level.
  186. // They must be stored in
  187. // non-volatile storage and will be written on boots, updates of the OS,
  188. // and shutdowns. They will therefore be written sufficiently infrequently
  189. // that slow non-volatile RAM technologies, such as Flash ROM, can be
  190. // suitable from a performance perspective. The lifetime of a particular
  191. // technology in write-cycles must be considered relative to the intended
  192. // design life between service or perhaps the total design life of the
  193. // particular server appliance.
  194. //
  195. //////////////////////////////////////////////////////////////////////////////
  196. #endif // __SAMSNVRAM_IOCTL__