Leaked source code of windows server 2003
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  1. title "PcCard IRQ detection"
  2. ;++
  3. ;
  4. ; Copyright (c) 1989 Microsoft Corporation
  5. ;
  6. ; Module Name:
  7. ;
  8. ; pccarda.asm
  9. ;
  10. ; Abstract:
  11. ;
  12. ; This module implements the assembly code necessary to support the
  13. ; scanning of ISA IRQ's for cardbus controllers.
  14. ;
  15. ; Author:
  16. ;
  17. ; Neil Sandlin (neilsa) 10-Dec-1991.
  18. ; The "Clear_IR" routines were taken from win9x code (vpicd)
  19. ;
  20. ; Environment:
  21. ;
  22. ; x86 Real Mode.
  23. ;
  24. ; Revision History:
  25. ;
  26. ;
  27. ;--
  28. .xlist
  29. include pccard.inc
  30. .list
  31. .386
  32. _DATA SEGMENT PARA USE16 PUBLIC 'DATA'
  33. _DATA ENDS
  34. _TEXT SEGMENT PARA USE16 PUBLIC 'CODE'
  35. ASSUME CS: _TEXT, DS:NOTHING, SS:NOTHING
  36. ;++
  37. ;
  38. ; clr_ir_int_proc
  39. ;
  40. ; Routine Description:
  41. ;
  42. ; Interrupt handler for clearing IR bit. Just EOIs the PICs.
  43. ;
  44. ; Arguments:
  45. ;
  46. ; None.
  47. ;
  48. ; Return Value:
  49. ;
  50. ; None.
  51. ;
  52. ;--
  53. Clr_IR_Int dw 0 ; Current int # being processed
  54. public clr_ir_int_proc
  55. clr_ir_int_proc proc far
  56. push ax
  57. mov ax, Clr_IR_Int
  58. cmp ax, 8 ; Q: is int on the master PIC?
  59. jb CIP_eoi ; Y: only eoi master PIC
  60. sub ax, 8 ; AL = int on slave PIC
  61. or al, PIC_SPEC_EOI
  62. out PIC_A0, al ; EOI the specific interrupt
  63. mov al, 2 ; EOI the master PIC
  64. CIP_eoi:
  65. or al, PIC_SPEC_EOI
  66. out PIC_20, al ; EOI the specific interrupt
  67. mov al, 0FFh ; Mask all interrupts
  68. out PIC_A1, al
  69. out PIC_21, al
  70. pop ax
  71. iret
  72. clr_ir_int_proc endp
  73. ;++
  74. ;
  75. ; clr_ir_enable_int
  76. ;
  77. ; Routine Description:
  78. ;
  79. ;
  80. ; Arguments:
  81. ;
  82. ; EAX = interrupt to hook and enable.
  83. ; Interrupts must be disabled on entry.
  84. ;
  85. ; Return Value:
  86. ;
  87. ; None.
  88. ;
  89. ;--
  90. clr_ir_enable_int proc near
  91. push bx
  92. push esi
  93. ; Hook interrupt so it can be handled.
  94. mov Clr_IR_Int, ax ; Set current interrupt being processed
  95. cmp ax, 8 ; Q: is int on the master PIC?
  96. jb CIEI_master ; Y: based at 8
  97. add ax, 68h ; N: based at 70h
  98. jmp CIEI_vector
  99. CIEI_master:
  100. add ax, 8
  101. CIEI_vector:
  102. mov bx, ax
  103. shl bx, 2 ; IVT vector offset
  104. push ds
  105. mov ax, 0
  106. mov ds, ax
  107. ASSUME DS:NOTHING
  108. mov si, offset clr_ir_int_proc
  109. xchg word ptr [bx], si ; LSW
  110. ror esi, 16
  111. push cs
  112. pop si
  113. xchg word ptr [bx+2], si ; MSW
  114. ror esi, 16 ; ESI = old handler offset
  115. pop ds
  116. ASSUME DS:_DATA
  117. sti
  118. nop ; allow interrupt to occur
  119. nop
  120. nop
  121. cli
  122. ; UnHook interrupt.
  123. push ds
  124. mov ax, 0
  125. mov ds, ax
  126. ASSUME DS:NOTHING
  127. mov word ptr [bx], si ; Restore LSW
  128. ror esi, 16
  129. mov word ptr [bx+2], si ; Restore MSW
  130. pop ds
  131. ASSUME DS:_DATA
  132. pop esi
  133. pop bx
  134. ret
  135. clr_ir_enable_int endp
  136. ;++
  137. ;
  138. ; _Clear_IR_Bits
  139. ;
  140. ; Routine Description:
  141. ;
  142. ; This routine and its support routines were copied (and munged) from
  143. ; win9x's vxd\vpicd\vpicserv.asm.
  144. ;
  145. ; Clears the desired Interrupt Request bits in the PIC.
  146. ; Interrupt must be masked at the PIC on entry.
  147. ;
  148. ; Arguments:
  149. ;
  150. ; [ESP+4] = bit mask of bits to clear
  151. ; Interrupts must be disabled on entry.
  152. ;
  153. ; Return Value:
  154. ;
  155. ; None.
  156. ;
  157. ;--
  158. public _Clear_IR_Bits
  159. _Clear_IR_Bits proc near
  160. push bp
  161. mov bp, sp
  162. BitMask equ [bp+4]
  163. push eax
  164. push ebx
  165. push ecx
  166. push edx
  167. mov bx, BitMask ; BX = mask to clear
  168. or bx, bx ; Are there any bits to clear?
  169. jz CIB_exit ; no, return
  170. pushfd
  171. cli
  172. in al, PIC_A1
  173. mov ah, al
  174. in al, PIC_21
  175. push eax
  176. mov al, 0FFh
  177. out PIC_A1, al
  178. ; Walk each bit from the lowest bit to highest on each controller.
  179. mov ecx, 01h ; CL = test mask
  180. CIB_loop20:
  181. test bl, cl
  182. jz CIB_next20
  183. mov al, cl
  184. not al
  185. out PIC_21, al ; Unmask the specific interrupt
  186. bsf eax, ecx
  187. call clr_ir_enable_int ; Hook interrupt and enable it
  188. mov al, 0FFh ; Mask all interrupts
  189. out PIC_21, al
  190. CIB_next20:
  191. shl cl, 1
  192. jnz CIB_loop20 ; Clear next bit
  193. ; Setup for second PIC. Handle the second controller by setting
  194. ; up both PICs, since they are chained.
  195. mov bl, bh ; BL = second PICs mask to clear
  196. mov cl, 01h ; CL = test mask
  197. CIB_loopA0:
  198. test bl, cl
  199. jz CIB_nextA0
  200. mov al, 0FBh ; Mask for chained master PIC
  201. out PIC_21, al ; Unmask the specific interrupt
  202. mov al, cl
  203. not al
  204. out PIC_A1, al ; Unmask the specific interrupt
  205. xchg cl, ch
  206. bsf eax, ecx
  207. call clr_ir_enable_int ; Hook interrupt and enable it
  208. xchg cl, ch
  209. mov al, 0FFh ; Mask all interrupts
  210. out PIC_A1, al
  211. out PIC_21, al
  212. CIB_nextA0:
  213. shl cl, 1
  214. jnz CIB_loopA0 ; Clear next bit
  215. pop eax
  216. out PIC_21, al
  217. mov al, ah
  218. out PIC_A1, al
  219. popfd
  220. CIB_exit:
  221. pop edx
  222. pop ecx
  223. pop ebx
  224. pop eax
  225. mov sp, bp
  226. pop bp
  227. ret
  228. _Clear_IR_Bits endp
  229. ;++
  230. ;
  231. ; GetPCIType1Data
  232. ;
  233. ; Routine Description:
  234. ;
  235. ; Arguments:
  236. ;
  237. ; Return Value:
  238. ;
  239. ; None.
  240. ;
  241. ;--
  242. public _GetPCIType1Data
  243. _GetPCIType1Data proc near
  244. push bp
  245. mov bp, sp
  246. push bx
  247. push di
  248. gpd_addr equ [bp+4]
  249. gpd_offset equ [bp+8]
  250. gpd_buffer equ [bp+10]
  251. gpd_width equ [bp+12]
  252. mov dx, PCI_TYPE1_ADDR_PORT
  253. mov eax, gpd_addr
  254. out dx, eax
  255. mov bx, gpd_buffer
  256. mov dx, gpd_offset
  257. add dx, PCI_TYPE1_DATA_PORT
  258. mov di, gpd_width
  259. cmp di, 1
  260. jnz @f
  261. in al, dx
  262. mov [bx], al
  263. jmp gpd_exit
  264. @@:
  265. cmp di, 2
  266. jnz @f
  267. in ax, dx
  268. mov [bx], al
  269. mov [bx+1], ah
  270. jmp gpd_exit
  271. @@:
  272. cmp di, 4
  273. jnz gpd_exit
  274. in eax, dx
  275. mov [bx], al
  276. mov [bx+1], ah
  277. shr eax, 16
  278. mov [bx+2], al
  279. mov [bx+3], ah
  280. gpd_exit:
  281. pop di
  282. pop bx
  283. mov sp, bp
  284. pop bp
  285. ret
  286. _GetPCIType1Data endp
  287. ;++
  288. ;
  289. ; SetPCIType1Data
  290. ;
  291. ; Routine Description:
  292. ;
  293. ; Arguments:
  294. ;
  295. ; Return Value:
  296. ;
  297. ; None.
  298. ;
  299. ;--
  300. public _SetPCIType1Data
  301. _SetPCIType1Data proc near
  302. push bp
  303. mov bp, sp
  304. push bx
  305. push di
  306. spd_addr equ [bp+4]
  307. spd_offset equ [bp+8]
  308. spd_buffer equ [bp+10]
  309. spd_width equ [bp+12]
  310. mov dx, PCI_TYPE1_ADDR_PORT
  311. mov eax, spd_addr
  312. out dx, eax
  313. mov bx, spd_buffer
  314. mov dx, spd_offset
  315. add dx, PCI_TYPE1_DATA_PORT
  316. mov di, spd_width
  317. cmp di, 1
  318. jnz @f
  319. mov al, [bx]
  320. out dx, al
  321. jmp spd_exit
  322. @@:
  323. cmp di, 2
  324. jnz @f
  325. mov al, [bx]
  326. mov ah, [bx+1]
  327. out dx, ax
  328. jmp spd_exit
  329. @@:
  330. cmp di, 4
  331. jnz spd_exit
  332. mov al, [bx+2]
  333. mov ah, [bx+3]
  334. shl eax, 16
  335. mov al, [bx]
  336. mov ah, [bx+1]
  337. out dx, eax
  338. spd_exit:
  339. pop di
  340. pop bx
  341. mov sp, bp
  342. pop bp
  343. ret
  344. _SetPCIType1Data endp
  345. ;++
  346. ;
  347. ; TimeOut
  348. ;
  349. ; Routine Description:
  350. ;
  351. ; This routine implements a stall for waiting on hardware. It uses the
  352. ; PC timer hardware (8237). The caller needs to insure that this hardware
  353. ; exists on the machine before calling this function.
  354. ;
  355. ; The function will take as input the count, and decrement the count
  356. ; matching the timer hardware's count. It returns when the count reaches
  357. ; zero. The caller must insure that the clock is programmed at the
  358. ; desired rate.
  359. ;
  360. ; Arguments:
  361. ;
  362. ; Count - number of clock ticks to wait (approx 840ns per tick)
  363. ;
  364. ; Return Value:
  365. ;
  366. ; None.
  367. ;
  368. ;--
  369. public _TimeOut
  370. _TimeOut proc near
  371. TMCTRL_LATCHCNT0 equ 0d2h
  372. TIMERPORT_CONTROL equ 43h
  373. TIMERPORT_CNT0 equ 40h
  374. push bp
  375. mov bp, sp
  376. push cx
  377. push si
  378. push di
  379. to_count equ [bp+4]
  380. mov dx, TIMERPORT_CONTROL
  381. mov al, TMCTRL_LATCHCNT0
  382. out dx, al
  383. mov dx, TIMERPORT_CNT0
  384. in al, dx
  385. mov ah, al
  386. in al, dx
  387. xchg ah, al
  388. mov si, ax
  389. xor cx, cx
  390. ; si = prevtime
  391. ; cx = ExpireTime
  392. timeloop:
  393. mov dx, TIMERPORT_CONTROL
  394. mov al, TMCTRL_LATCHCNT0
  395. out dx, al
  396. mov dx, TIMERPORT_CNT0
  397. in al, dx
  398. mov ah, al
  399. in al, dx
  400. xchg ah, al
  401. mov di, ax
  402. cmp ax, si
  403. jbe @f
  404. ; wrapped
  405. neg ax
  406. add ax, si
  407. add cx, ax
  408. jmp timeincr
  409. @@:
  410. sub si, ax
  411. add cx, si
  412. timeincr:
  413. mov si, di
  414. cmp cx, to_count
  415. jb timeloop
  416. pop di
  417. pop si
  418. pop cx
  419. mov sp, bp
  420. pop bp
  421. ret
  422. _TimeOut endp
  423. _TEXT ends
  424. end