Leaked source code of windows server 2003
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225 lines
64 KiB

  1. /*++
  2. Copyright (c) 1989-2000 Microsoft Corporation
  3. Component Name:
  4. HALIA64
  5. Module Name:
  6. merced.c
  7. Abstract:
  8. This file declares the data structures related to
  9. the Merced [aka Itanium] Processor.
  10. Author:
  11. David N. Cutler (davec) 5-Mar-1989
  12. Environment:
  13. ToBeSpecified
  14. Revision History:
  15. 3/15/2000 Thierry Fevrier (v-thief@microsoft.com):
  16. Initial version
  17. --*/
  18. #include "halp.h"
  19. #include "ia64prof.h"
  20. #include "merced.h"
  21. //
  22. // Hal Profiling Mapping for the Merced Processor.
  23. //
  24. HALP_PROFILE_MAPPING
  25. HalpMercedProfileMapping[ ProfileMercedMaximum + 1 ] = {
  26. //
  27. // XXTF - ToBeValidated: - PMCD_MASKs
  28. // - NumberOfTicks
  29. // - EventsCount
  30. // - Event Names
  31. //
  32. // HALP_PROFILE_MAPPING: Sup., Event, Source, EventMask, Interval, DefInt, MaxInt, MinInt, Plm, PlmDef, Ov, OvDef, Pm, PmDef, UnitMask, UnitMaskDef, Threshold, ThresholdDef, Ism, IsmDef
  33. //
  34. // NT KE architected Profile Sources:
  35. /* ProfileTime */ {TRUE, MercedCpuCycles, 0, PMCD_MASK_4567, 0, PROFILE_TIME_MERCED_DEFAULT_INTERVAL, MAXIMUM_PROFILE_INTERVAL, MINIMUM_PROFILE_INTERVAL, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  36. /* ProfileAlignmentFixup */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  37. /* ProfileTotalIssues */ {TRUE, MercedInstRetired, 0, PMCD_MASK_45, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  38. /* ProfilePipelineDry */ {TRUE, MercedPipelineFlushes, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  39. /* ProfileLoadInstructions */ {TRUE, MercedRetiredLoads, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  40. /* ProfilePipelineFrozen */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL }, // XXTF - ToBeDone - Existing or derived events ?
  41. /* ProfileBranchInstructions */ {TRUE, MercedBranchInstructions, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  42. /* ProfileTotalNonissues */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL }, // XXTF - ToBeDone - Existing or derived events ? MercedNonIssue
  43. /* ProfileDcacheMisses */ {TRUE, MercedL1DataMisses, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  44. /* ProfileIcacheMisses */ {TRUE, MercedL1InstMisses, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  45. /* ProfileCacheMisses */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL }, // XXTF - ToBeDone - Existing or derived events ?
  46. /* ProfileBranchMispredictions */ {TRUE, MercedBranchMispredictDetail, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  47. /* ProfileStoreInstructions */ {TRUE, MercedRetiredStores, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  48. /* ProfileFpInstructions */ {FALSE /* FALSE until Derived Event are implemented */, MercedFPOperationsRetired, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  49. /* ProfileIntegerInstructions */ {TRUE, MercedIntegerInstructions, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  50. /* Profile2Issue */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL }, // XXTF - ToBeDone - Existing or derived events ?
  51. /* Profile3Issue */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL }, // XXTF - ToBeDone - Existing or derived events ?
  52. /* Profile4Issue */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL }, // XXTF - ToBeDone - Existing or derived events ?
  53. /* ProfileSpecialInstructions */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  54. /* ProfileTotalCycles */ {TRUE, MercedCpuCycles, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  55. /* ProfileIcacheIssues */ {TRUE, MercedInstReferences, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  56. /* ProfileDcacheAccesses */ {TRUE, MercedDataReferences, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  57. /* ProfileMemoryBarrierCycles */ {TRUE, MercedMemoryStallCycles, 0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  58. /* ProfileLoadLinkedIssues */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL }, // XXTF - ToBeDone - Existing or derived events ?
  59. /* ProfileMaximum */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL }, // End of NT KE architected Profile Sources.
  60. // NT IA64 Processor specific Profile Sources:
  61. // Merced Monitored Events:
  62. /* ProfileMercedBranchMispredictStallCycles */ {TRUE, MercedBranchMispredictStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  63. /* ProfileMercedInstAccessStallCycles */ {TRUE, MercedInstAccessStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  64. /* ProfileMercedExecLatencyStallCycles */ {TRUE, MercedExecLatencyStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  65. /* ProfileMercedDataAccessStallCycles */ {TRUE, MercedDataAccessStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  66. /* ProfileMercedBranchStallCycles */ {TRUE, MercedBranchStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  67. /* ProfileMercedInstFetchStallCycles */ {TRUE, MercedInstFetchStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  68. /* ProfileMercedExecStallCycles */ {TRUE, MercedExecStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  69. /* ProfileMercedMemoryStallCycles */ {TRUE, MercedMemoryStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  70. /* ProfileMercedTaggedInstRetired */ {TRUE, MercedTaggedInstRetired ,0, PMCD_MASK_45, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  71. /* ProfileMercedInstRetired */ {TRUE, MercedInstRetired ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  72. /* ProfileMercedFPOperationsRetiredLow */ {TRUE, MercedFPOperationsRetiredLow ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  73. /* ProfileMercedFPOperationsRetiredHigh */ {TRUE, MercedFPOperationsRetiredHigh ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  74. /* ProfileMercedFPFlushesToZero */ {TRUE, MercedFPFlushesToZero ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  75. /* ProfileMercedSIRFlushes */ {TRUE, MercedSIRFlushes ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  76. /* ProfileMercedBranchTakenDetail */ {TRUE, MercedBranchTakenDetail ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  77. /* ProfileMercedBranchMultiWayDetail */ {TRUE, MercedBranchMultiWayDetail ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  78. /* ProfileMercedBranchPathPrediction */ {TRUE, MercedBranchPathPrediction ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  79. /* ProfileMercedBranchMispredictDetail */ {TRUE, MercedBranchMispredictDetail ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  80. /* ProfileMercedBranchEvents */ {TRUE, MercedBranchEvents ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  81. /* ProfileMercedCpuCycles */ {TRUE, MercedCpuCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  82. /* ProfileMercedISATransitions */ {TRUE, MercedISATransitions ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  83. /* ProfileMercedIA32InstRetired */ {TRUE, MercedIA32InstRetired ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  84. /* ProfileMercedL1InstReads */ {TRUE, MercedL1InstReads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  85. /* ProfileMercedL1InstFills */ {TRUE, MercedL1InstFills ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  86. /* ProfileMercedL1InstMisses */ {TRUE, MercedL1InstMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  87. /* ProfileMercedInstEAREvents */ {TRUE, MercedInstEAREvents ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  88. /* ProfileMercedL1InstPrefetches */ {TRUE, MercedL1InstPrefetches ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  89. /* ProfileMercedL2InstPrefetches */ {TRUE, MercedL2InstPrefetches ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  90. /* ProfileMercedInstStreamingBufferLinesIn */ {TRUE, MercedInstStreamingBufferLinesIn ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  91. /* ProfileMercedInstTLBDemandFetchMisses */ {TRUE, MercedInstTLBDemandFetchMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  92. /* ProfileMercedInstTLBHPWInserts */ {TRUE, MercedInstTLBHPWInserts ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  93. /* ProfileMercedInstDispersed */ {TRUE, MercedInstDispersed ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  94. /* ProfileMercedExplicitStops */ {TRUE, MercedExplicitStops ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  95. /* ProfileMercedImplicitStops */ {TRUE, MercedImplicitStops ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  96. /* ProfileMercedInstNOPRetired */ {TRUE, MercedInstNOPRetired ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  97. /* ProfileMercedInstPredicateSquashedRetired */ {TRUE, MercedInstPredicateSquashedRetired ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  98. /* ProfileMercedRSELoadRetired */ {TRUE, MercedRSELoadRetired ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  99. /* ProfileMercedPipelineFlushes */ {TRUE, MercedPipelineFlushes ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  100. /* ProfileMercedCpuCPLChanges */ {TRUE, MercedCpuCPLChanges ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  101. /* ProfileMercedFailedSpeculativeCheckLoads */ {TRUE, MercedFailedSpeculativeCheckLoads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_INTANDFP_OPS, PMC_UNIT_MASK_INTANDFP_OPS, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  102. /* ProfileMercedAdvancedCheckLoads */ {TRUE, MercedAdvancedCheckLoads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_INTANDFP_OPS, PMC_UNIT_MASK_INTANDFP_OPS, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  103. /* ProfileMercedFailedAdvancedCheckLoads */ {TRUE, MercedFailedAdvancedCheckLoads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_INTANDFP_OPS, PMC_UNIT_MASK_INTANDFP_OPS, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  104. /* ProfileMercedALATOverflows */ {TRUE, MercedALATOverflows ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_INTANDFP_OPS, PMC_UNIT_MASK_INTANDFP_OPS, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  105. /* ProfileMercedExternBPMPins03Asserted */ {TRUE, MercedExternBPMPins03Asserted ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  106. /* ProfileMercedExternBPMPins45Asserted */ {TRUE, MercedExternBPMPins45Asserted ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  107. /* ProfileMercedDataTCMisses */ {TRUE, MercedDataTCMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  108. /* ProfileMercedDataTLBMisses */ {TRUE, MercedDataTLBMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  109. /* ProfileMercedDataTLBHPWInserts */ {TRUE, MercedDataTLBHPWInserts ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  110. /* ProfileMercedDataReferences */ {TRUE, MercedDataReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  111. /* ProfileMercedL1DataReads */ {TRUE, MercedL1DataReads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  112. /* ProfileMercedRSEAccesses */ {TRUE, MercedRSEAccesses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  113. /* ProfileMercedL1DataReadMisses */ {TRUE, MercedL1DataReadMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  114. /* ProfileMercedL1DataEAREvents */ {TRUE, MercedL1DataEAREvents ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  115. /* ProfileMercedL2References */ {TRUE, MercedL2References ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  116. /* ProfileMercedL2DataReferences */ {TRUE, MercedL2DataReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  117. /* ProfileMercedL2Misses */ {TRUE, MercedL2Misses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  118. /* ProfileMercedL1DataForcedLoadMisses */ {TRUE, MercedL1DataForcedLoadMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  119. /* ProfileMercedRetiredLoads */ {TRUE, MercedRetiredLoads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  120. /* ProfileMercedRetiredStores */ {TRUE, MercedRetiredStores ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  121. /* ProfileMercedRetiredUncacheableLoads */ {TRUE, MercedRetiredUncacheableLoads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  122. /* ProfileMercedRetiredUncacheableStores */ {TRUE, MercedRetiredUncacheableStores ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  123. /* ProfileMercedRetiredMisalignedLoads */ {TRUE, MercedRetiredMisalignedLoads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  124. /* ProfileMercedRetiredMisalignedStores */ {TRUE, MercedRetiredMisalignedStores ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  125. /* ProfileMercedL2Flushes */ {TRUE, MercedL2Flushes ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  126. /* ProfileMercedL2FlushesDetail */ {TRUE, MercedL2FlushesDetail ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  127. /* ProfileMercedL3References */ {TRUE, MercedL3References ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  128. /* ProfileMercedL3Misses */ {TRUE, MercedL3Misses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  129. /* ProfileMercedL3Reads */ {TRUE, MercedL3Reads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  130. /* ProfileMercedL3Writes */ {TRUE, MercedL3Writes ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  131. /* ProfileMercedL3LinesReplaced */ {TRUE, MercedL3LinesReplaced ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  132. //
  133. // 02/08/00 - Are missing: [at least]
  134. // - Front-Side bus events,
  135. // - IVE events,
  136. // - Debug monitor events,
  137. // - ...
  138. //
  139. //
  140. // Merced Derived Events:
  141. // ProfileMercedDerivedEventMinimum,
  142. /* ProfileMercedRSEStallCycles */ {TRUE, MercedRSEStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  143. /* ProfileMercedIssueLimitStallCycles */ {TRUE, MercedIssueLimitStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  144. /* ProfileMercedTakenBranchStallCycles */ {TRUE, MercedTakenBranchStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  145. /* ProfileMercedFetchWindowStallCycles */ {TRUE, MercedFetchWindowStallCycles ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  146. /* ProfileMercedIA64InstPerCycle */ {TRUE, MercedIA64InstPerCycle ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  147. /* ProfileMercedIA32InstPerCycle */ {TRUE, MercedIA32InstPerCycle ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  148. /* ProfileMercedAvgIA64InstPerTransition */ {TRUE, MercedAvgIA64InstPerTransition ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  149. /* ProfileMercedAvgIA32InstPerTransition */ {TRUE, MercedAvgIA32InstPerTransition ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  150. /* ProfileMercedAvgIA64CyclesPerTransition */ {TRUE, MercedAvgIA64CyclesPerTransition ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  151. /* ProfileMercedAvgIA32CyclesPerTransition */ {TRUE, MercedAvgIA32CyclesPerTransition ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  152. /* ProfileMercedL1InstReferences */ {TRUE, MercedL1InstReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  153. /* ProfileMercedL1InstMissRatio */ {TRUE, MercedL1InstMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  154. /* ProfileMercedL1DataReadMissRatio */ {TRUE, MercedL1DataReadMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  155. /* ProfileMercedL2MissRatio */ {TRUE, MercedL2MissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  156. /* ProfileMercedL2DataMissRatio */ {TRUE, MercedL2DataMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  157. /* ProfileMercedL2InstMissRatio */ {TRUE, MercedL2InstMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  158. /* ProfileMercedL2DataReadMissRatio */ {TRUE, MercedL2DataReadMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  159. /* ProfileMercedL2DataWriteMissRatio */ {TRUE, MercedL2DataWriteMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  160. /* ProfileMercedL2InstFetchRatio */ {TRUE, MercedL2InstFetchRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  161. /* ProfileMercedL2DataRatio */ {TRUE, MercedL2DataRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  162. /* ProfileMercedL3MissRatio */ {TRUE, MercedL3MissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  163. /* ProfileMercedL3DataMissRatio */ {TRUE, MercedL3DataMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  164. /* ProfileMercedL3InstMissRatio */ {TRUE, MercedL3InstMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  165. /* ProfileMercedL3DataReadMissRatio */ {TRUE, MercedL3DataReadMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  166. /* ProfileMercedL3DataRatio */ {TRUE, MercedL3DataRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  167. /* ProfileMercedInstReferences */ {TRUE, MercedInstReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  168. /* ProfileMercedInstTLBMissRatio */ {TRUE, MercedInstTLBMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  169. /* ProfileMercedDataTLBMissRatio */ {TRUE, MercedDataTLBMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  170. /* ProfileMercedDataTCMissRatio */ {TRUE, MercedDataTCMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  171. /* ProfileMercedInstTLBEAREvents */ {TRUE, MercedInstTLBEAREvents ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  172. /* ProfileMercedDataTLBEAREvents */ {TRUE, MercedDataTLBEAREvents ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  173. /* ProfileMercedCodeDebugRegisterMatches */ {TRUE, MercedCodeDebugRegisterMatches ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  174. /* ProfileMercedDataDebugRegisterMatches */ {TRUE, MercedDataDebugRegisterMatches ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  175. /* ProfileMercedControlSpeculationMissRatio */ {TRUE, MercedControlSpeculationMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  176. /* ProfileMercedDataSpeculationMissRatio */ {TRUE, MercedDataSpeculationMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  177. /* ProfileMercedALATCapacityMissRatio */ {TRUE, MercedALATCapacityMissRatio ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  178. /* ProfileMercedL1DataWayMispredicts */ {TRUE, MercedL1DataWayMispredicts ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  179. /* ProfileMercedL2InstReferences */ {TRUE, MercedL2InstReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  180. /* ProfileMercedInstFetches */ {TRUE, MercedInstFetches ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  181. /* ProfileMercedL2DataReads */ {TRUE, MercedL2DataReads ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  182. /* ProfileMercedL2DataWrites */ {TRUE, MercedL2DataWrites ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  183. /* ProfileMercedL3InstReferences */ {TRUE, MercedL3InstReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  184. /* ProfileMercedL3InstMisses */ {TRUE, MercedL3InstMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  185. /* ProfileMercedL3InstHits */ {TRUE, MercedL3InstHits ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  186. /* ProfileMercedL3DataReferences */ {TRUE, MercedL3DataReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  187. /* ProfileMercedL3LoadReferences */ {TRUE, MercedL3LoadReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  188. /* ProfileMercedL3LoadMisses */ {TRUE, MercedL3LoadMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  189. /* ProfileMercedL3LoadHits */ {TRUE, MercedL3LoadHits ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  190. /* ProfileMercedL3ReadReferences */ {TRUE, MercedL3ReadReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  191. /* ProfileMercedL3ReadMisses */ {TRUE, MercedL3ReadMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  192. /* ProfileMercedL3ReadHits */ {TRUE, MercedL3ReadHits ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  193. /* ProfileMercedL3StoreReferences */ {TRUE, MercedL3StoreReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  194. /* ProfileMercedL3StoreMisses */ {TRUE, MercedL3StoreMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  195. /* ProfileMercedL3StoreHits */ {TRUE, MercedL3StoreHits ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  196. /* ProfileMercedL2WriteBackReferences */ {TRUE, MercedL2WriteBackReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  197. /* ProfileMercedL2WriteBackMisses */ {TRUE, MercedL2WriteBackMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  198. /* ProfileMercedL2WriteBackHits */ {TRUE, MercedL2WriteBackHits ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  199. /* ProfileMercedL2WriteReferences */ {TRUE, MercedL2WriteReferences ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  200. /* ProfileMercedL2WriteMisses */ {TRUE, MercedL2WriteMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  201. /* ProfileMercedL2WriteHits */ {TRUE, MercedL2WriteHits ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  202. /* ProfileMercedBranchInstructions */ {TRUE, MercedBranchInstructions ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  203. /* ProfileMercedIntegerInstructions */ {TRUE, MercedIntegerInstructions ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  204. /* ProfileMercedL1DataMisses */ {TRUE, MercedL1DataMisses ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  205. /* ProfileMercedFPOperationsRetired */ {TRUE, MercedFPOperationsRetired ,0, PMCD_MASK_4567, 0, 0x10000, 0x10000, 10, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL },
  206. /* ProfileMercedMaximum */ {FALSE, 0,0,0,0,0,0, PMC_PLM_ALL, PMC_PLM_ALL, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_OVERFLOW_INTERRUPT, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_ENABLE_PRIVILEGE_MONITOR, PMC_UNIT_MASK_DEFAULT, PMC_UNIT_MASK_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_THRESHOLD_DEFAULT, PMC_ISM_ALL, PMC_ISM_ALL }
  207. };