Leaked source code of windows server 2003
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  1. /******************************Module*Header*******************************\
  2. *
  3. * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
  4. * !! !!
  5. * !! WARNING: NOT DDK SAMPLE CODE !!
  6. * !! !!
  7. * !! This source code is provided for completeness only and should not be !!
  8. * !! used as sample code for display driver development. Only those sources !!
  9. * !! marked as sample code for a given driver component should be used for !!
  10. * !! development purposes. !!
  11. * !! !!
  12. * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
  13. *
  14. * Module Name: p2rd.h
  15. *
  16. * Content:
  17. *
  18. * Copyright (c) 1994-1999 3Dlabs Inc. Ltd. All rights reserved.
  19. * Copyright (c) 1995-2003 Microsoft Corporation. All rights reserved.
  20. \*****************************************************************************/
  21. // structure with all the direct access registers
  22. typedef struct _p2rd_regs
  23. {
  24. RAMDAC_REG RDPaletteWriteAddress;
  25. RAMDAC_REG RDPaletteData;
  26. RAMDAC_REG RDPixelMask;
  27. RAMDAC_REG RDPaletteAddressRead;
  28. RAMDAC_REG RDIndexLow;
  29. RAMDAC_REG RDIndexHigh;
  30. RAMDAC_REG RDIndexedData;
  31. RAMDAC_REG RDIndexControl;
  32. }
  33. P2RDRAMDAC, pP2RDRAMDAC;
  34. // macro declared by any function wishing to use the RGB525 RAMDAC. MUST be declared
  35. // after GLINT_DECL.
  36. //
  37. #if MINIVDD
  38. #define P2RD_DECL \
  39. P2RDRAMDAC *pP2RDRegs = (P2RDRAMDAC *)&(pDev->pRegisters->Glint.ExtVCReg)
  40. #else
  41. #define P2RD_DECL \
  42. P2RDRAMDAC *pP2RDRegs = (P2RDRAMDAC *)&(pRegisters->Glint.ExtVCReg)
  43. #endif
  44. #if P3R3DX_VIDEO
  45. #define VideoDebugPrint(arg)
  46. #endif
  47. // use the following macros as the address to pass to the
  48. // VideoPortWriteRegisterUlong function
  49. //
  50. #define P2RD_PAL_WR_ADDR ((PULONG)&(pP2RDRegs->RDPaletteWriteAddress.reg))
  51. #define P2RD_PAL_RD_ADDR ((PULONG)&(pP2RDRegs->RDPaletteAddressRead.reg))
  52. #define P2RD_PAL_DATA ((PULONG)&(pP2RDRegs->RDPaletteData.reg))
  53. #define P2RD_PIXEL_MASK ((PULONG)&(pP2RDRegs->RDPixelMask.reg))
  54. #define P2RD_INDEX_ADDR_LO ((PULONG)&(pP2RDRegs->RDIndexLow.reg))
  55. #define P2RD_INDEX_ADDR_HI ((PULONG)&(pP2RDRegs->RDIndexHigh.reg))
  56. #define P2RD_INDEX_DATA ((PULONG)&(pP2RDRegs->RDIndexedData.reg))
  57. #define P2RD_INDEX_CONTROL ((PULONG)&(pP2RDRegs->RDIndexControl.reg))
  58. // bit field definitions for the direct access registers
  59. #define P2RD_IDX_CTL_AUTOINCREMENT_ENABLED 0x01
  60. // indexed register definitions accessed via P2RD_LOAD_INDEX_REG() and P2RD_READ_INDEX_REG()
  61. #define P2RD_MISC_CONTROL 0x0000
  62. #define P2RD_SYNC_CONTROL 0x0001
  63. #define P2RD_DAC_CONTROL 0x0002
  64. #define P2RD_PIXEL_SIZE 0x0003
  65. #define P2RD_COLOR_FORMAT 0x0004
  66. #define P2RD_CURSOR_MODE 0x0005
  67. #define P2RD_CURSOR_CONTROL 0x0006
  68. #define P2RD_CURSOR_X_LOW 0x0007
  69. #define P2RD_CURSOR_X_HIGH 0x0008
  70. #define P2RD_CURSOR_Y_LOW 0x0009
  71. #define P2RD_CURSOR_Y_HIGH 0x000a
  72. #define P2RD_CURSOR_HOTSPOT_X 0x000b
  73. #define P2RD_CURSOR_HOTSPOT_Y 0x000c
  74. #define P2RD_OVERLAY_KEY 0x000d
  75. #define P2RD_PAN 0x000e
  76. #define P2RD_SENSE 0x000f
  77. #define P2RD_CHECK_CONTROL 0x0018
  78. #define P2RD_CHECK_PIXEL_RED 0x0019
  79. #define P2RD_CHECK_PIXEL_GREEN 0x001a
  80. #define P2RD_CHECK_PIXEL_BLUE 0x001b
  81. #define P2RD_CHECK_LUT_RED 0x001c
  82. #define P2RD_CHECK_LUT_GREEN 0x001d
  83. #define P2RD_CHECK_LUT_BLUE 0x001e
  84. #define P2RD_DCLK_SETUP_1 0x01f0
  85. #define P2RD_DCLK_SETUP_2 0x01f1
  86. #define P2RD_MCLK_SETUP_1 0x01f2
  87. #define P2RD_MCLK_SETUP_2 0x01f3
  88. #define P2RD_DCLK_CONTROL 0x0200
  89. #define P2RD_DCLK0_PRE_SCALE 0x0201
  90. #define P2RD_DCLK0_FEEDBACK_SCALE 0x0202
  91. #define P2RD_DCLK0_POST_SCALE 0x0203
  92. #define P2RD_DCLK1_PRE_SCALE 0x0204
  93. #define P2RD_DCLK1_FEEDBACK_SCALE 0x0205
  94. #define P2RD_DCLK1_POST_SCALE 0x0206
  95. #define P2RD_DCLK2_PRE_SCALE 0x0207
  96. #define P2RD_DCLK2_FEEDBACK_SCALE 0x0208
  97. #define P2RD_DCLK2_POST_SCALE 0x0209
  98. #define P2RD_DCLK3_PRE_SCALE 0x020a
  99. #define P2RD_DCLK3_FEEDBACK_SCALE 0x020b
  100. #define P2RD_DCLK3_POST_SCALE 0x020c
  101. #define P2RD_MCLK_CONTROL 0x020d
  102. #define P2RD_MCLK_PRE_SCALE 0x020e
  103. #define P2RD_MCLK_FEEDBACK_SCALE 0x020f
  104. #define P2RD_MCLK_POST_SCALE 0x0210
  105. #define P2RD_CURSOR_PALETTE_START 0x0303 // 303..32f
  106. #define P2RD_CURSOR_PATTERN_START 0x0400 // 400..7ff
  107. // bit field definitions for the indexed registers
  108. #define P2RD_MISC_CONTROL_OVERLAYS_ENABLED 0x10
  109. #define P2RD_MISC_CONTROL_DIRECT_COLOR_ENABLED 0x08
  110. #define P2RD_MISC_CONTROL_HIGHCOLORRES 0x01
  111. #define P2RD_SYNC_CONTROL_VSYNC_ACTIVE_LOW 0x00
  112. #define P2RD_SYNC_CONTROL_VSYNC_ACTIVE_HIGH 0x08
  113. #define P2RD_SYNC_CONTROL_VSYNC_OFF 0x20
  114. #define P2RD_SYNC_CONTROL_HSYNC_ACTIVE_LOW 0x00
  115. #define P2RD_SYNC_CONTROL_HSYNC_ACTIVE_HIGH 0x01
  116. #define P2RD_SYNC_CONTROL_HSYNC_OFF 0x04
  117. #define P2RD_DAC_CONTROL_LOW_POWER 0x01
  118. #define P2RD_DAC_CONTROL_SYNC_ON_GREEN 0x08
  119. #define P2RD_DAC_CONTROL_BLANK_RED 0x10
  120. #define P2RD_DAC_CONTROL_BLANK_GREEN 0x20
  121. #define P2RD_DAC_CONTROL_BLANK_BLUE 0x40
  122. #define P2RD_DAC_CONTROL_BLANK_PEDESTAL_ENABLED 0x80
  123. #define P2RD_PIXEL_SIZE_8BPP 0x00
  124. #define P2RD_PIXEL_SIZE_16BPP 0x01
  125. #define P2RD_PIXEL_SIZE_24_BPP 0x04
  126. #define P2RD_PIXEL_SIZE_32BPP 0x02
  127. #define P2RD_COLOR_FORMAT_CI8 0x0e
  128. #define P2RD_COLOR_FORMAT_8BPP 0x25
  129. #define P2RD_COLOR_FORMAT_15BPP 0x21
  130. #define P2RD_COLOR_FORMAT_16BPP 0x30
  131. #define P2RD_COLOR_FORMAT_32BPP 0x20
  132. #define P2RD_COLOR_FORMAT_LINEAR_EXT 0x40
  133. #define P2RD_CURSOR_MODE_REVERSE 0x40
  134. #define P2RD_CURSOR_MODE_WINDOWS 0x00
  135. #define P2RD_CURSOR_MODE_X 0x10
  136. #define P2RD_CURSOR_MODE_3COLOR 0x20
  137. #define P2RD_CURSOR_MODE_15COLOR 0x30
  138. #define P2RD_CURSOR_MODE_64x64 0x00
  139. #define P2RD_CURSOR_MODE_P0_32x32x2 0x02
  140. #define P2RD_CURSOR_MODE_P1_32x32x2 0x04
  141. #define P2RD_CURSOR_MODE_P2_32x32x2 0x06
  142. #define P2RD_CURSOR_MODE_P3_32x32x2 0x08
  143. #define P2RD_CURSOR_MODE_P01_32x32x4 0x0a
  144. #define P2RD_CURSOR_MODE_P23_32x32x4 0x0c
  145. #define P2RD_CURSOR_MODE_ENABLED 0x01
  146. #define P2RD_CURSOR_MODE_OFF 0x00
  147. #define P2RD_CURSOR_CONTROL_RPOS_ENABLED 0x04
  148. #define P2RD_CURSOR_CONTROL_DOUBLE_Y 0x02
  149. #define P2RD_CURSOR_CONTROL_DOUBLE_X 0x01
  150. // Windows format byte-packed cursor data: each byte represents 4 consecutive pixels
  151. #define P2RD_CURSOR_2_COLOR_BLACK 0x00
  152. #define P2RD_CURSOR_2_COLOR_WHITE 0x55
  153. #define P2RD_CURSOR_2_COLOR_TRANSPARENT 0xAA
  154. #define P2RD_CURSOR_2_COLOR_HIGHLIGHT 0xFF
  155. // cursor sizes
  156. #define P2RD_CURSOR_SIZE_64_MONO 0
  157. #define P2RD_CURSOR_SIZE_32_MONO 1
  158. #define P2RD_CURSOR_SIZE_32_3COLOR 5
  159. #define P2RD_CURSOR_SEL(cursorSize, cursorIndex) (((cursorSize + cursorIndex) & 7) << 1)
  160. #define P2RD_DCLK_CONTROL_LOCKED 0x02 // read-only
  161. #define P2RD_DCLK_CONTROL_ENABLED 0x01
  162. #define P2RD_DCLK_CONTROL_RUN 0x08
  163. #define P2RD_MCLK_CONTROL_LOCKED 0x02 // read-only
  164. #define P2RD_MCLK_CONTROL_ENABLED 0x01
  165. #define P2RD_MCLK_CONTROL_RUN 0x08
  166. #define P2RD_CURSOR_PALETTE_CURSOR_RGB(RGBIndex, Red, Green, Blue) \
  167. { \
  168. P2RD_LOAD_INDEX_REG(P2RD_CURSOR_PALETTE_START+3*(int)RGBIndex+0, Red); \
  169. P2RD_LOAD_INDEX_REG(P2RD_CURSOR_PALETTE_START+3*(int)RGBIndex+1, Green); \
  170. P2RD_LOAD_INDEX_REG(P2RD_CURSOR_PALETTE_START+3*(int)RGBIndex+2, Blue); \
  171. }
  172. #if 0
  173. // need a delay between each write to the P2RD. The only way to guarantee
  174. // that the write has completed is to read from a GLINT control register.
  175. // Reading forces any posted writes to be flushed out. PPC needs 2 reads
  176. // to give us enough time.
  177. #define P2RD_DELAY \
  178. { \
  179. volatile LONG __junk; \
  180. __junk = VideoPortReadRegisterUlong (FB_MODE_SEL); \
  181. __junk = VideoPortReadRegisterUlong (FB_MODE_SEL); \
  182. }
  183. #else
  184. #define P2RD_DELAY
  185. #endif
  186. // macro to load a given data value into an internal P2RD register. The
  187. // second macro loads an internal index register assuming that we have
  188. // already zeroed the high address register.
  189. //
  190. #define P2RD_INDEX_REG(index) \
  191. { \
  192. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", P2RD_INDEX_ADDR_LO, (index) & 0xff)); \
  193. VideoPortWriteRegisterUlong(P2RD_INDEX_ADDR_LO, (ULONG)((index) & 0xff)); \
  194. P2RD_DELAY; \
  195. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", P2RD_INDEX_ADDR_HI, (index) >> 8)); \
  196. VideoPortWriteRegisterUlong(P2RD_INDEX_ADDR_HI, (ULONG)((index) >> 8)); \
  197. P2RD_DELAY; \
  198. }
  199. #define P2RD_LOAD_DATA(data) \
  200. { \
  201. VideoPortWriteRegisterUlong(P2RD_INDEX_DATA, (ULONG)((data) & 0xff)); \
  202. P2RD_DELAY; \
  203. }
  204. #define P2RD_LOAD_INDEX_REG(index, data) \
  205. { \
  206. P2RD_INDEX_REG(index); \
  207. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", P2RD_INDEX_DATA, (data) & 0xff)); \
  208. VideoPortWriteRegisterUlong(P2RD_INDEX_DATA, (ULONG)((data) & 0xff)); \
  209. P2RD_DELAY; \
  210. }
  211. #define P2RD_READ_INDEX_REG(index, data) \
  212. { \
  213. P2RD_INDEX_REG(index); \
  214. data = (BYTE) (VideoPortReadRegisterUlong(P2RD_INDEX_DATA) & 0xff); \
  215. P2RD_DELAY; \
  216. VideoDebugPrint(("0x%x <-- *(0x%x)\n", data, P2RD_INDEX_DATA)); \
  217. }
  218. #define P2RD_LOAD_INDEX_REG_LO(index, data) \
  219. { \
  220. VideoPortWriteRegisterUlong(P2RD_INDEX_ADDR_LO, (ULONG)(index)); \
  221. P2RD_DELAY; \
  222. VideoPortWriteRegisterUlong(P2RD_INDEX_DATA, (ULONG)(data)); \
  223. P2RD_DELAY; \
  224. }
  225. // macros to load a given RGB triple into the P2RD palette. Send the starting
  226. // index and then send RGB triples. Auto-increment is turned on.
  227. // Use P2RD_PALETTE_START and multiple P2RD_LOAD_PALETTE calls to load
  228. // a contiguous set of entries. Use P2RD_LOAD_PALETTE_INDEX to load a set
  229. // of sparse entries.
  230. //
  231. #define P2RD_PALETTE_START_WR(index) \
  232. { \
  233. VideoPortWriteRegisterUlong(P2RD_PAL_WR_ADDR, (ULONG)(index)); \
  234. P2RD_DELAY; \
  235. }
  236. #define P2RD_PALETTE_START_RD(index) \
  237. { \
  238. VideoPortWriteRegisterUlong(P2RD_PAL_RD_ADDR, (ULONG)(index)); \
  239. P2RD_DELAY; \
  240. }
  241. #define P2RD_LOAD_PALETTE(red, green, blue) \
  242. { \
  243. VideoPortWriteRegisterUlong(P2RD_PAL_DATA, (ULONG)(red)); \
  244. P2RD_DELAY; \
  245. VideoPortWriteRegisterUlong(P2RD_PAL_DATA, (ULONG)(green)); \
  246. P2RD_DELAY; \
  247. VideoPortWriteRegisterUlong(P2RD_PAL_DATA, (ULONG)(blue)); \
  248. P2RD_DELAY; \
  249. }
  250. #define P2RD_LOAD_PALETTE_INDEX(index, red, green, blue) \
  251. { \
  252. VideoPortWriteRegisterUlong(P2RD_PAL_WR_ADDR, (ULONG)(index)); \
  253. P2RD_DELAY; \
  254. VideoPortWriteRegisterUlong(P2RD_PAL_DATA, (ULONG)(red)); \
  255. P2RD_DELAY; \
  256. VideoPortWriteRegisterUlong(P2RD_PAL_DATA, (ULONG)(green)); \
  257. P2RD_DELAY; \
  258. VideoPortWriteRegisterUlong(P2RD_PAL_DATA, (ULONG)(blue)); \
  259. P2RD_DELAY; \
  260. }
  261. // macro to read back a given RGB triple from the P2RD palette. Use after
  262. // a call to P2RD_PALETTE_START_RD
  263. //
  264. #define P2RD_READ_PALETTE(red, green, blue) \
  265. { \
  266. red = (UCHAR)(VideoPortReadRegisterUlong(P2RD_PAL_DATA) & 0xff); \
  267. P2RD_DELAY; \
  268. green = (UCHAR)(VideoPortReadRegisterUlong(P2RD_PAL_DATA) & 0xff); \
  269. P2RD_DELAY; \
  270. blue = (UCHAR)(VideoPortReadRegisterUlong(P2RD_PAL_DATA) & 0xff); \
  271. P2RD_DELAY; \
  272. }
  273. #define P2RD_SET_INDEX_CONTROL(mask) \
  274. { \
  275. VideoPortWriteRegisterUlong(P2RD_INDEX_CONTROL, (ULONG)(mask)); \
  276. P2RD_DELAY; \
  277. }
  278. // macros to set/get the pixel read mask. The mask is 8 bits wide and gets
  279. // replicated across all bytes that make up a pixel.
  280. //
  281. #define P2RD_SET_PIXEL_READMASK(mask) \
  282. { \
  283. VideoPortWriteRegisterUlong(P2RD_PIXEL_MASK, (ULONG)(mask)); \
  284. P2RD_DELAY; \
  285. }
  286. #define P2RD_READ_PIXEL_READMASK(mask) \
  287. { \
  288. mask = VideoPortReadRegisterUlong(P2RD_PIXEL_MASK) & 0xff; \
  289. }
  290. // macros to load values into the cursor array usage is P2RD_CURSOR_ARRAR_START() followed by
  291. // n iterations of P2RD_LOAD_CURSOR_ARRAY() or P2RD_READ_CURSOR_ARRAY()
  292. //
  293. #define P2RD_CURSOR_ARRAY_START(offset) \
  294. { \
  295. P2RD_DELAY; \
  296. VideoPortWriteRegisterUlong(P2RD_INDEX_ADDR_LO, (ULONG)(((offset)+P2RD_CURSOR_PATTERN_START) & 0xff)); \
  297. P2RD_DELAY; \
  298. VideoPortWriteRegisterUlong(P2RD_INDEX_ADDR_HI, (ULONG)(((offset)+P2RD_CURSOR_PATTERN_START) >> 8)); \
  299. P2RD_DELAY; \
  300. }
  301. #define P2RD_LOAD_CURSOR_ARRAY(data) \
  302. { \
  303. VideoPortWriteRegisterUlong(P2RD_INDEX_DATA, (ULONG)(data)); \
  304. P2RD_DELAY; \
  305. }
  306. #define P2RD_READ_CURSOR_ARRAY(data) \
  307. { \
  308. data = VideoPortReadRegisterUlong(P2RD_INDEX_DATA) & 0xff; \
  309. P2RD_DELAY; \
  310. }
  311. // macro to move the cursor
  312. //
  313. #define P2RD_MOVE_CURSOR(x, y) \
  314. { \
  315. VideoPortWriteRegisterUlong(P2RD_INDEX_ADDR_HI, (ULONG)0); \
  316. P2RD_DELAY; \
  317. P2RD_LOAD_INDEX_REG_LO(P2RD_CURSOR_X_LOW, (ULONG)((x) & 0xff)); \
  318. P2RD_LOAD_INDEX_REG_LO(P2RD_CURSOR_X_HIGH, (ULONG)((x) >> 8)); \
  319. P2RD_LOAD_INDEX_REG_LO(P2RD_CURSOR_Y_LOW, (ULONG)((y) & 0xff)); \
  320. P2RD_LOAD_INDEX_REG_LO(P2RD_CURSOR_Y_HIGH, (ULONG)((y) >> 8)); \
  321. }
  322. // macro to change the cursor hotspot
  323. //
  324. #define P2RD_CURSOR_HOTSPOT(x, y) \
  325. { \
  326. VideoPortWriteRegisterUlong(P2RD_INDEX_ADDR_HI, (ULONG)(0)); \
  327. P2RD_DELAY; \
  328. P2RD_LOAD_INDEX_REG_LO(P2RD_CURSOR_HOTSPOT_X, (ULONG)(x)); \
  329. P2RD_LOAD_INDEX_REG_LO(P2RD_CURSOR_HOTSPOT_Y, (ULONG)(y)); \
  330. }