Leaked source code of windows server 2003
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  1. /******************************Module*Header*******************************\
  2. *
  3. * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
  4. * !! !!
  5. * !! WARNING: NOT DDK SAMPLE CODE !!
  6. * !! !!
  7. * !! This source code is provided for completeness only and should not be !!
  8. * !! used as sample code for display driver development. Only those sources !!
  9. * !! marked as sample code for a given driver component should be used for !!
  10. * !! development purposes. !!
  11. * !! !!
  12. * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
  13. *
  14. * Module Name: p3rd.h
  15. *
  16. * Content: This module contains the definitions for the P2ST internal RAMDAC.
  17. *
  18. * Copyright (c) 1994-1999 3Dlabs Inc. Ltd. All rights reserved.
  19. * Copyright (c) 1995-2003 Microsoft Corporation. All rights reserved.
  20. \*****************************************************************************/
  21. // structure with all the direct access registers
  22. typedef struct _P3RD_regs
  23. {
  24. RAMDAC_REG RDPaletteWriteAddress;
  25. RAMDAC_REG RDPaletteData;
  26. RAMDAC_REG RDPixelMask;
  27. RAMDAC_REG RDPaletteAddressRead;
  28. RAMDAC_REG RDIndexLow;
  29. RAMDAC_REG RDIndexHigh;
  30. RAMDAC_REG RDIndexedData;
  31. RAMDAC_REG RDIndexControl;
  32. }
  33. P3RDRAMDAC, pP3RDRAMDAC;
  34. // macro declared by any function wishing to use the RGB525 RAMDAC. MUST be declared
  35. // after GLINT_DECL.
  36. //
  37. #if MINIVDD
  38. #define P3RD_DECL \
  39. P3RDRAMDAC *pP3RDRegs = (P3RDRAMDAC *)&(pDev->pRegisters->Glint.ExtVCReg)
  40. #else
  41. #define P3RD_DECL \
  42. P3RDRAMDAC *pP3RDRegs = (P3RDRAMDAC *)&(pRegisters->Glint.ExtVCReg)
  43. #define P3RX_RD_DECL \
  44. P3RDRAMDAC *pP3RDRegs = (P3RDRAMDAC *)&(pThisDisplay->pGlint->ExtVCReg)
  45. #endif
  46. #if P3R3DX_VIDEO
  47. #define VideoDebugPrint(arg)
  48. #endif
  49. // use the following macros as the address to pass to the
  50. // VideoPortWriteRegisterUlong function
  51. //
  52. #define P3RD_PAL_WR_ADDR ((PULONG)&(pP3RDRegs->RDPaletteWriteAddress.reg))
  53. #define P3RD_PAL_RD_ADDR ((PULONG)&(pP3RDRegs->RDPaletteAddressRead.reg))
  54. #define P3RD_PAL_DATA ((PULONG)&(pP3RDRegs->RDPaletteData.reg))
  55. #define P3RD_PIXEL_MASK ((PULONG)&(pP3RDRegs->RDPixelMask.reg))
  56. #define P3RD_INDEX_ADDR_LO ((PULONG)&(pP3RDRegs->RDIndexLow.reg))
  57. #define P3RD_INDEX_ADDR_HI ((PULONG)&(pP3RDRegs->RDIndexHigh.reg))
  58. #define P3RD_INDEX_DATA ((PULONG)&(pP3RDRegs->RDIndexedData.reg))
  59. #define P3RD_INDEX_CONTROL ((PULONG)&(pP3RDRegs->RDIndexControl.reg))
  60. // bit field definitions for the direct access registers
  61. #define P3RD_IDX_CTL_AUTOINCREMENT_ENABLED 0x01
  62. // indexed register definitions accessed via P3RD_LOAD_INDEX_REG() and P3RD_READ_INDEX_REG()
  63. #define P3RD_MISC_CONTROL 0x0000
  64. #define P3RD_SYNC_CONTROL 0x0001
  65. #define P3RD_DAC_CONTROL 0x0002
  66. #define P3RD_PIXEL_SIZE 0x0003
  67. #define P3RD_COLOR_FORMAT 0x0004
  68. #define P3RD_CURSOR_MODE 0x0005
  69. #define P3RD_CURSOR_CONTROL 0x0006
  70. #define P3RD_CURSOR_X_LOW 0x0007
  71. #define P3RD_CURSOR_X_HIGH 0x0008
  72. #define P3RD_CURSOR_Y_LOW 0x0009
  73. #define P3RD_CURSOR_Y_HIGH 0x000a
  74. #define P3RD_CURSOR_HOTSPOT_X 0x000b
  75. #define P3RD_CURSOR_HOTSPOT_Y 0x000c
  76. #define P3RD_OVERLAY_KEY 0x000d
  77. #define P3RD_PAN 0x000e
  78. #define P3RD_SENSE 0x000f
  79. #define P3RD_CHECK_CONTROL 0x0018
  80. #define P3RD_CHECK_PIXEL_RED 0x0019
  81. #define P3RD_CHECK_PIXEL_GREEN 0x001a
  82. #define P3RD_CHECK_PIXEL_BLUE 0x001b
  83. #define P3RD_CHECK_LUT_RED 0x001c
  84. #define P3RD_CHECK_LUT_GREEN 0x001d
  85. #define P3RD_CHECK_LUT_BLUE 0x001e
  86. #define P3RD_SCRATCH 0x001f
  87. #define P3RD_VIDEO_OVERLAY_CONTROL 0x0020
  88. #define P3RD_VIDEO_OVERLAY_XSTARTLOW 0x0021
  89. #define P3RD_VIDEO_OVERLAY_XSTARTHIGH 0x0022
  90. #define P3RD_VIDEO_OVERLAY_YSTARTLOW 0x0023
  91. #define P3RD_VIDEO_OVERLAY_YSTARTHIGH 0x0024
  92. #define P3RD_VIDEO_OVERLAY_XENDLOW 0x0025
  93. #define P3RD_VIDEO_OVERLAY_XENDHIGH 0x0026
  94. #define P3RD_VIDEO_OVERLAY_YENDLOW 0x0027
  95. #define P3RD_VIDEO_OVERLAY_YENDHIGH 0x0028
  96. #define P3RD_VIDEO_OVERLAY_KEYR 0x0029
  97. #define P3RD_VIDEO_OVERLAY_KEYG 0x002a
  98. #define P3RD_VIDEO_OVERLAY_KEYB 0x002b
  99. #define P3RD_VIDEO_OVERLAY_BLEND 0x002c
  100. #define P3RD_DCLK_SETUP_1 0x01f0
  101. #define P3RD_DCLK_SETUP_2 0x01f1
  102. #define P3RD_KCLK_SETUP_1 0x01f2
  103. #define P3RD_KCLK_SETUP_2 0x01f3
  104. #define P3RD_DCLK_CONTROL 0x0200
  105. #define P3RD_DCLK0_PRE_SCALE 0x0201
  106. #define P3RD_DCLK0_FEEDBACK_SCALE 0x0202
  107. #define P3RD_DCLK0_POST_SCALE 0x0203
  108. #define P3RD_DCLK1_PRE_SCALE 0x0204
  109. #define P3RD_DCLK1_FEEDBACK_SCALE 0x0205
  110. #define P3RD_DCLK1_POST_SCALE 0x0206
  111. #define P3RD_DCLK2_PRE_SCALE 0x0207
  112. #define P3RD_DCLK2_FEEDBACK_SCALE 0x0208
  113. #define P3RD_DCLK2_POST_SCALE 0x0209
  114. #define P3RD_DCLK3_PRE_SCALE 0x020a
  115. #define P3RD_DCLK3_FEEDBACK_SCALE 0x020b
  116. #define P3RD_DCLK3_POST_SCALE 0x020c
  117. #define P3RD_KCLK_CONTROL 0x020d
  118. #define P3RD_KCLK_PRE_SCALE 0x020e
  119. #define P3RD_KCLK_FEEDBACK_SCALE 0x020f
  120. #define P3RD_KCLK_POST_SCALE 0x0210
  121. #define P3RD_MCLK_CONTROL 0x0211
  122. #define P3RD_SCLK_CONTROL 0x0215
  123. #define P3RD_CURSOR_PALETTE_START 0x0303 // 303..32f
  124. #define P3RD_CURSOR_PATTERN_START 0x0400 // 400..7ff
  125. // bit field definitions for the indexed registers
  126. #define P3RD_MISC_CONTROL_STEREODOUBLEBUFFER 0x80
  127. #define P3RD_MISC_CONTROL_VSBOUTPUT 0x40
  128. #define P3RD_MISC_CONTROL_PIXELDOUBLEBUFFER 0x20
  129. #define P3RD_MISC_CONTROL_OVERLAYS_ENABLED 0x10
  130. #define P3RD_MISC_CONTROL_DIRECT_COLOR_ENABLED 0x08
  131. #define P3RD_MISC_CONTROL_HIGHCOLORRES 0x01
  132. #define P3RD_SYNC_CONTROL_VSYNC_ACTIVE_LOW 0x00
  133. #define P3RD_SYNC_CONTROL_VSYNC_ACTIVE_HIGH 0x08
  134. #define P3RD_SYNC_CONTROL_VSYNC_OFF 0x20
  135. #define P3RD_SYNC_CONTROL_HSYNC_ACTIVE_LOW 0x00
  136. #define P3RD_SYNC_CONTROL_HSYNC_ACTIVE_HIGH 0x01
  137. #define P3RD_SYNC_CONTROL_HSYNC_OFF 0x04
  138. #define P3RD_DAC_CONTROL_LOW_POWER 0x01
  139. #define P3RD_DAC_CONTROL_SYNC_ON_GREEN 0x08
  140. #define P3RD_DAC_CONTROL_BLANK_RED 0x10
  141. #define P3RD_DAC_CONTROL_BLANK_GREEN 0x20
  142. #define P3RD_DAC_CONTROL_BLANK_BLUE 0x40
  143. #define P3RD_DAC_CONTROL_BLANK_PEDESTAL_ENABLED 0x80
  144. #define P3RD_PIXEL_SIZE_8BPP 0x00
  145. #define P3RD_PIXEL_SIZE_16BPP 0x01
  146. #define P3RD_PIXEL_SIZE_24_BPP 0x04
  147. #define P3RD_PIXEL_SIZE_32BPP 0x02
  148. #define P3RD_COLOR_FORMAT_CI8 0x0e
  149. #define P3RD_COLOR_FORMAT_8BPP 0x25
  150. #define P3RD_COLOR_FORMAT_15BPP 0x21
  151. #define P3RD_COLOR_FORMAT_16BPP 0x30
  152. #define P3RD_COLOR_FORMAT_32BPP 0x20
  153. #define P3RD_COLOR_FORMAT_LINEAR_EXT 0x40
  154. #define P3RD_CURSOR_MODE_REVERSE 0x40
  155. #define P3RD_CURSOR_MODE_WINDOWS 0x00
  156. #define P3RD_CURSOR_MODE_X 0x10
  157. #define P3RD_CURSOR_MODE_3COLOR 0x20
  158. #define P3RD_CURSOR_MODE_15COLOR 0x30
  159. #define P3RD_CURSOR_MODE_64x64 0x00
  160. #define P3RD_CURSOR_MODE_P0_32x32x2 0x02
  161. #define P3RD_CURSOR_MODE_P1_32x32x2 0x04
  162. #define P3RD_CURSOR_MODE_P2_32x32x2 0x06
  163. #define P3RD_CURSOR_MODE_P3_32x32x2 0x08
  164. #define P3RD_CURSOR_MODE_P01_32x32x4 0x0a
  165. #define P3RD_CURSOR_MODE_P23_32x32x4 0x0c
  166. #define P3RD_CURSOR_MODE_ENABLED 0x01
  167. #define P3RD_CURSOR_MODE_OFF 0x00
  168. #define P3RD_CURSOR_CONTROL_RPOS_ENABLED 0x04
  169. #define P3RD_CURSOR_CONTROL_DOUBLE_Y 0x02
  170. #define P3RD_CURSOR_CONTROL_DOUBLE_X 0x01
  171. // Windows format byte-packed cursor data: each byte represents 4 consecutive pixels
  172. #define P3RD_CURSOR_2_COLOR_BLACK 0x00
  173. #define P3RD_CURSOR_2_COLOR_WHITE 0x55
  174. #define P3RD_CURSOR_2_COLOR_TRANSPARENT 0xAA
  175. #define P3RD_CURSOR_2_COLOR_HIGHLIGHT 0xFF
  176. // cursor sizes
  177. #define P3RD_CURSOR_SIZE_64_MONO 0
  178. #define P3RD_CURSOR_SIZE_32_MONO 1
  179. #define P3RD_CURSOR_SIZE_32_3COLOR 5
  180. #define P3RD_CURSOR_SEL(cursorSize, cursorIndex) (((cursorSize + cursorIndex) & 7) << 1)
  181. #define P3RD_DCLK_CONTROL_LOCKED 0x02 // read-only
  182. #define P3RD_DCLK_CONTROL_ENABLED 0x01
  183. #define P3RD_DCLK_CONTROL_RUN 0x08
  184. #define P3RD_DCLK_SOURCE_PLL 0x00
  185. #define P3RD_DCLK_SOURCE_VSA 0x01
  186. #define P3RD_DCLK_SOURCE_VSB 0x02
  187. #define P3RD_DCLK_SOURCE_EXTERNAL 0x03
  188. #define P3RD_MCLK_CONTROL_ENABLED 0x01
  189. #define P3RD_MCLK_CONTROL_RUN 0x08
  190. #define P3RD_MCLK_SOURCE_PCLK 0x00
  191. #define P3RD_MCLK_SOURCE_HALFPCLK 0x10
  192. #define P3RD_MCLK_SOURCE_HALFEXTMCLK 0x30
  193. #define P3RD_MCLK_SOURCE_EXTMCLK 0x40
  194. #define P3RD_MCLK_SOURCE_HALFKCLK 0x50
  195. #define P3RD_MCLK_SOURCE_KCLK 0x60
  196. #define P3RD_KCLK_CONTROL_LOCKED 0x02 // read-only
  197. #define P3RD_KCLK_CONTROL_ENABLED 0x01
  198. #define P3RD_KCLK_CONTROL_RUN 0x08
  199. #define P3RD_KCLK_SOURCE_PCLK 0x00
  200. #define P3RD_KCLK_SOURCE_HALFPCLK 0x10
  201. #define P3RD_KCLK_SOURCE_PLL 0x20
  202. #define P3RD_SCLK_CONTROL_LOCKED 0x02 // read-only
  203. #define P3RD_SCLK_CONTROL_ENABLED 0x01
  204. #define P3RD_SCLK_CONTROL_RUN 0x08
  205. #define P3RD_SCLK_SOURCE_PCLK 0x00
  206. #define P3RD_SCLK_SOURCE_HALFPCLK 0x10
  207. #define P3RD_SCLK_SOURCE_HALFEXTSCLK 0x30
  208. #define P3RD_SCLK_SOURCE_EXTSCLK 0x40
  209. #define P3RD_SCLK_SOURCE_HALFKCLK 0x50
  210. #define P3RD_SCLK_SOURCE_KCLK 0x60
  211. // Palette entries are reversed from P2
  212. #define P3RD_CURSOR_PALETTE_CURSOR_RGB(RGBIndex, Red, Green, Blue) \
  213. { \
  214. P3RD_LOAD_INDEX_REG(P3RD_CURSOR_PALETTE_START+3*(int)(14 - RGBIndex)+0, Red); \
  215. P3RD_LOAD_INDEX_REG(P3RD_CURSOR_PALETTE_START+3*(int)(14 - RGBIndex)+1, Green); \
  216. P3RD_LOAD_INDEX_REG(P3RD_CURSOR_PALETTE_START+3*(int)(14 - RGBIndex)+2, Blue); \
  217. }
  218. #if 0
  219. // need a delay between each write to the P3RD. The only way to guarantee
  220. // that the write has completed is to read from a GLINT control register.
  221. // Reading forces any posted writes to be flushed out. PPC needs 2 reads
  222. // to give us enough time.
  223. #define P3RD_DELAY \
  224. { \
  225. volatile LONG __junk; \
  226. __junk = VideoPortReadRegisterUlong (FB_MODE_SEL); \
  227. __junk = VideoPortReadRegisterUlong (FB_MODE_SEL); \
  228. }
  229. #else
  230. #define P3RD_DELAY
  231. #endif
  232. // macro to load a given data value into an internal P3RD register. The
  233. // second macro loads an internal index register assuming that we have
  234. // already zeroed the high address register.
  235. //
  236. #define P3RD_INDEX_REG(index) \
  237. { \
  238. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", P3RD_INDEX_ADDR_LO, (index) & 0xff)); \
  239. VideoPortWriteRegisterUlong(P3RD_INDEX_ADDR_LO, (ULONG)((index) & 0xff)); \
  240. P3RD_DELAY; \
  241. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", P3RD_INDEX_ADDR_HI, (index) >> 8)); \
  242. VideoPortWriteRegisterUlong(P3RD_INDEX_ADDR_HI, (ULONG)((index) >> 8)); \
  243. P3RD_DELAY; \
  244. }
  245. #define P3RD_LOAD_DATA(data) \
  246. { \
  247. VideoPortWriteRegisterUlong(P3RD_INDEX_DATA, (ULONG)((data) & 0xff)); \
  248. P3RD_DELAY; \
  249. }
  250. #define P3RD_LOAD_INDEX_REG(index, data) \
  251. { \
  252. P3RD_INDEX_REG(index); \
  253. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", P3RD_INDEX_DATA, (data) & 0xff)); \
  254. VideoPortWriteRegisterUlong(P3RD_INDEX_DATA, (ULONG)((data) & 0xff)); \
  255. P3RD_DELAY; \
  256. }
  257. #define P3RD_READ_INDEX_REG(index, data) \
  258. { \
  259. P3RD_INDEX_REG(index); \
  260. data = (BYTE) (VideoPortReadRegisterUlong(P3RD_INDEX_DATA) & 0xff); \
  261. P3RD_DELAY; \
  262. VideoDebugPrint(("0x%x <-- *(0x%x)\n", data, P3RD_INDEX_DATA)); \
  263. }
  264. #define P3RD_LOAD_INDEX_REG_LO(index, data) \
  265. { \
  266. VideoPortWriteRegisterUlong(P3RD_INDEX_ADDR_LO, (ULONG)(index)); \
  267. P3RD_DELAY; \
  268. VideoPortWriteRegisterUlong(P3RD_INDEX_DATA, (ULONG)(data)); \
  269. P3RD_DELAY; \
  270. }
  271. // macros to load a given RGB triple into the P3RD palette. Send the starting
  272. // index and then send RGB triples. Auto-increment is turned on.
  273. // Use P3RD_PALETTE_START and multiple P3RD_LOAD_PALETTE calls to load
  274. // a contiguous set of entries. Use P3RD_LOAD_PALETTE_INDEX to load a set
  275. // of sparse entries.
  276. //
  277. #define P3RD_PALETTE_START_WR(index) \
  278. { \
  279. VideoPortWriteRegisterUlong(P3RD_PAL_WR_ADDR, (ULONG)(index)); \
  280. P3RD_DELAY; \
  281. }
  282. #define P3RD_PALETTE_START_RD(index) \
  283. { \
  284. VideoPortWriteRegisterUlong(P3RD_PAL_RD_ADDR, (ULONG)(index)); \
  285. P3RD_DELAY; \
  286. }
  287. #define P3RD_LOAD_PALETTE(red, green, blue) \
  288. { \
  289. VideoPortWriteRegisterUlong(P3RD_PAL_DATA, (ULONG)(red)); \
  290. P3RD_DELAY; \
  291. VideoPortWriteRegisterUlong(P3RD_PAL_DATA, (ULONG)(green)); \
  292. P3RD_DELAY; \
  293. VideoPortWriteRegisterUlong(P3RD_PAL_DATA, (ULONG)(blue)); \
  294. P3RD_DELAY; \
  295. }
  296. #define P3RD_LOAD_PALETTE_INDEX(index, red, green, blue) \
  297. { \
  298. VideoPortWriteRegisterUlong(P3RD_PAL_WR_ADDR, (ULONG)(index)); \
  299. P3RD_DELAY; \
  300. VideoPortWriteRegisterUlong(P3RD_PAL_DATA, (ULONG)(red)); \
  301. P3RD_DELAY; \
  302. VideoPortWriteRegisterUlong(P3RD_PAL_DATA, (ULONG)(green)); \
  303. P3RD_DELAY; \
  304. VideoPortWriteRegisterUlong(P3RD_PAL_DATA, (ULONG)(blue)); \
  305. P3RD_DELAY; \
  306. }
  307. // macro to read back a given RGB triple from the P3RD palette. Use after
  308. // a call to P3RD_PALETTE_START_RD
  309. //
  310. #define P3RD_READ_PALETTE(red, green, blue) \
  311. { \
  312. red = (UCHAR)(VideoPortReadRegisterUlong(P3RD_PAL_DATA) & 0xff); \
  313. P3RD_DELAY; \
  314. green = (UCHAR)(VideoPortReadRegisterUlong(P3RD_PAL_DATA) & 0xff); \
  315. P3RD_DELAY; \
  316. blue = (UCHAR)(VideoPortReadRegisterUlong(P3RD_PAL_DATA) & 0xff); \
  317. P3RD_DELAY; \
  318. }
  319. #define P3RD_SET_INDEX_CONTROL(mask) \
  320. { \
  321. VideoPortWriteRegisterUlong(P3RD_INDEX_CONTROL, (ULONG)(mask)); \
  322. P3RD_DELAY; \
  323. }
  324. // macros to set/get the pixel read mask. The mask is 8 bits wide and gets
  325. // replicated across all bytes that make up a pixel.
  326. //
  327. #define P3RD_SET_PIXEL_READMASK(mask) \
  328. { \
  329. VideoPortWriteRegisterUlong(P3RD_PIXEL_MASK, (ULONG)(mask)); \
  330. P3RD_DELAY; \
  331. }
  332. #define P3RD_READ_PIXEL_READMASK(mask) \
  333. { \
  334. mask = VideoPortReadRegisterUlong(P3RD_PIXEL_MASK) & 0xff; \
  335. }
  336. // macros to load values into the cursor array usage is P3RD_CURSOR_ARRAR_START() followed by
  337. // n iterations of P3RD_LOAD_CURSOR_ARRAY() or P3RD_READ_CURSOR_ARRAY()
  338. //
  339. #define P3RD_CURSOR_ARRAY_START(offset) \
  340. { \
  341. P3RD_DELAY; \
  342. VideoPortWriteRegisterUlong(P3RD_INDEX_ADDR_LO, (ULONG)(((offset)+P3RD_CURSOR_PATTERN_START) & 0xff)); \
  343. P3RD_DELAY; \
  344. VideoPortWriteRegisterUlong(P3RD_INDEX_ADDR_HI, (ULONG)(((offset)+P3RD_CURSOR_PATTERN_START) >> 8)); \
  345. P3RD_DELAY; \
  346. }
  347. #define P3RD_LOAD_CURSOR_ARRAY(data) \
  348. { \
  349. VideoPortWriteRegisterUlong(P3RD_INDEX_DATA, (ULONG)(data)); \
  350. P3RD_DELAY; \
  351. }
  352. #define P3RD_READ_CURSOR_ARRAY(data) \
  353. { \
  354. data = VideoPortReadRegisterUlong(P3RD_INDEX_DATA) & 0xff; \
  355. P3RD_DELAY; \
  356. }
  357. // macro to move the cursor
  358. //
  359. #define P3RD_MOVE_CURSOR(x, y) \
  360. { \
  361. VideoPortWriteRegisterUlong(P3RD_INDEX_ADDR_HI, (ULONG)0); \
  362. P3RD_DELAY; \
  363. P3RD_LOAD_INDEX_REG_LO(P3RD_CURSOR_X_LOW, (ULONG)((x) & 0xff)); \
  364. P3RD_LOAD_INDEX_REG_LO(P3RD_CURSOR_X_HIGH, (ULONG)((x) >> 8)); \
  365. P3RD_LOAD_INDEX_REG_LO(P3RD_CURSOR_Y_LOW, (ULONG)((y) & 0xff)); \
  366. P3RD_LOAD_INDEX_REG_LO(P3RD_CURSOR_Y_HIGH, (ULONG)((y) >> 8)); \
  367. }
  368. // macro to change the cursor hotspot
  369. //
  370. #define P3RD_CURSOR_HOTSPOT(x, y) \
  371. { \
  372. VideoPortWriteRegisterUlong(P3RD_INDEX_ADDR_HI, (ULONG)(0)); \
  373. P3RD_DELAY; \
  374. P3RD_LOAD_INDEX_REG_LO(P3RD_CURSOR_HOTSPOT_X, (ULONG)(x)); \
  375. P3RD_LOAD_INDEX_REG_LO(P3RD_CURSOR_HOTSPOT_Y, (ULONG)(y)); \
  376. }