Leaked source code of windows server 2003
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  1. /******************************Module*Header*******************************\
  2. *
  3. * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
  4. * !! !!
  5. * !! WARNING: NOT DDK SAMPLE CODE !!
  6. * !! !!
  7. * !! This source code is provided for completeness only and should not be !!
  8. * !! used as sample code for display driver development. Only those sources !!
  9. * !! marked as sample code for a given driver component should be used for !!
  10. * !! development purposes. !!
  11. * !! !!
  12. * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
  13. *
  14. * Module Name: rgb525.h
  15. *
  16. * Content: This module contains the definitions for the IBM RGB525 RAMDAC.
  17. *
  18. * Copyright (c) 1994-1999 3Dlabs Inc. Ltd. All rights reserved.
  19. * Copyright (c) 1995-2003 Microsoft Corporation. All rights reserved.
  20. \*****************************************************************************/
  21. #include "rgb526.h"
  22. #include "rgb528.h"
  23. //
  24. // IBM RGB525 RAMDAC definitions
  25. // This set of registers resides at &(pCtrlRegs->ExternalVideo)
  26. //
  27. typedef struct _rgb525_regs {
  28. RAMDAC_REG palAddrWr; // loads internal register for palette writes
  29. RAMDAC_REG palData; // read/write to get/set palette data
  30. RAMDAC_REG pixelMask; // mask to AND with input pixel data
  31. RAMDAC_REG palAddrRd; // loads internal register for palette reads
  32. RAMDAC_REG indexLow; // low byte of internal control/cursor register
  33. RAMDAC_REG indexHigh; // high byte of internal control/cursor register
  34. RAMDAC_REG indexData; // read/write to get/set control/cursor data
  35. RAMDAC_REG indexCtl; // controls auto-increment of internal addresses
  36. } RGB525RAMDAC, FAR *pRGB525RAMDAC;
  37. // macro declared by any function wishing to use the RGB525 RAMDAC. MUST be declared
  38. // after GLINT_DECL.
  39. //
  40. #if MINIVDD
  41. #define RGB525_DECL \
  42. pRGB525RAMDAC pRGB525Regs; \
  43. if (pDev->ChipID == PERMEDIA2_ID || pDev->ChipID == TIPERMEDIA2_ID) { \
  44. pRGB525Regs = (pRGB525RAMDAC)&(pDev->pRegisters->Glint.P2ExtVCReg); \
  45. } else { \
  46. pRGB525Regs = (pRGB525RAMDAC)&(pDev->pRegisters->Glint.ExtVCReg); \
  47. }
  48. #else
  49. #define RGB525_DECL \
  50. pRGB525RAMDAC pRGB525Regs; \
  51. if (pGLInfo->dwRenderChipID == PERMEDIA2_ID || pGLInfo->dwRenderChipID == TIPERMEDIA2_ID) { \
  52. pRGB525Regs = (pRGB525RAMDAC)&(pRegisters->Glint.P2ExtVCReg); \
  53. } else { \
  54. pRGB525Regs = (pRGB525RAMDAC)&(pRegisters->Glint.ExtVCReg); \
  55. }
  56. #endif
  57. // use the following macros as the address to pass to the
  58. // VideoPortWriteRegisterUlong function
  59. //
  60. #define RGB525_PAL_WR_ADDR ((PULONG)&(pRGB525Regs->palAddrWr.reg))
  61. #define RGB525_PAL_RD_ADDR ((PULONG)&(pRGB525Regs->palAddrRd.reg))
  62. #define RGB525_PAL_DATA ((PULONG)&(pRGB525Regs->palData.reg))
  63. #define RGB525_PIXEL_MASK ((PULONG)&(pRGB525Regs->pixelMask.reg))
  64. #define RGB525_INDEX_ADDR_LO ((PULONG)&(pRGB525Regs->indexLow.reg))
  65. #define RGB525_INDEX_ADDR_HI ((PULONG)&(pRGB525Regs->indexHigh.reg))
  66. #define RGB525_INDEX_DATA ((PULONG)&(pRGB525Regs->indexData.reg))
  67. #define RGB525_INDEX_CONTROL ((PULONG)&(pRGB525Regs->indexCtl.reg))
  68. // need a delay between each write to the 525. The only way to guarantee
  69. // that the write has completed is to read from a GLINT control register.
  70. // Reading forces any posted writes to be flushed out.
  71. #if INCLUDE_DELAY
  72. #if MINIVDD
  73. #define RGB525_DELAY \
  74. { \
  75. volatile LONG __junk525; \
  76. __junk525 = pDev->pRegisters->Glint.LineCount; \
  77. }
  78. #else
  79. #define RGB525_DELAY \
  80. { \
  81. volatile LONG __junk525; \
  82. __junk525 = pRegisters->Glint.LineCount; \
  83. }
  84. #endif
  85. #else
  86. #define RGB525_DELAY
  87. #endif
  88. //
  89. // On rev 1 chips we need to SYNC with GLINT while accessing the 525. This
  90. // is because accesses to the RAMDAC can be corrupted by localbuffer
  91. // activity. Put this macro before accesses that can co-exist with GLINT
  92. // 3D activity, Must have initialized glintInfo before using this.
  93. //
  94. #define RGB525_SYNC_WITH_GLINT \
  95. { \
  96. if (GLInfo.wRenderChipRev == GLINT300SX_REV1) \
  97. SYNC_WITH_GLINT; \
  98. }
  99. // macro to load a given data value into an internal RGB525 register. The
  100. // second macro loads an internal index register assuming that we have
  101. // already zeroed the high address register.
  102. //
  103. #define RGB525_INDEX_REG(index) \
  104. { \
  105. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", RGB525_INDEX_ADDR_LO, (index) & 0xff)); \
  106. VideoPortWriteRegisterUlong(RGB525_INDEX_ADDR_LO, (ULONG)((index) & 0xff)); \
  107. RGB525_DELAY; \
  108. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", RGB525_INDEX_ADDR_HI, (index) >> 8)); \
  109. VideoPortWriteRegisterUlong(RGB525_INDEX_ADDR_HI, (ULONG)((index) >> 8)); \
  110. RGB525_DELAY; \
  111. }
  112. #define RGB525_LOAD_DATA(data) \
  113. { \
  114. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", RGB525_INDEX_DATA, (data) & 0xff)); \
  115. VideoPortWriteRegisterUlong (RGB525_INDEX_DATA, (ULONG)(data)); \
  116. RGB525_DELAY; \
  117. }
  118. #define RGB525_LOAD_INDEX_REG(index, data) \
  119. { \
  120. RGB525_INDEX_REG(index); \
  121. VideoDebugPrint(("*(0x%x) <-- 0x%x\n", RGB525_INDEX_DATA, (data) & 0xff)); \
  122. VideoPortWriteRegisterUlong(RGB525_INDEX_DATA, (ULONG)((data) & 0xff)); \
  123. RGB525_DELAY; \
  124. }
  125. #define RGB525_READ_INDEX_REG(index, data) \
  126. { \
  127. RGB525_INDEX_REG(index); \
  128. data = VideoPortReadRegisterUlong(RGB525_INDEX_DATA) & 0xff; \
  129. RGB525_DELAY; \
  130. VideoDebugPrint(("0x%x <-- *(0x%x)\n", data, RGB525_INDEX_DATA)); \
  131. }
  132. #define RGB525_LOAD_INDEX_REG_LO(index, data) \
  133. { \
  134. VideoPortWriteRegisterUlong(RGB525_INDEX_ADDR_LO, (ULONG)(index)); \
  135. RGB525_DELAY; \
  136. VideoPortWriteRegisterUlong(RGB525_INDEX_DATA, (ULONG)(data)); \
  137. RGB525_DELAY; \
  138. }
  139. // macros to load a given RGB triple into the RGB525 palette. Send the starting
  140. // index and then send RGB triples. Auto-increment is turned on.
  141. // Use RGB525_PALETTE_START and multiple RGB525_LOAD_PALETTE calls to load
  142. // a contiguous set of entries. Use RGB525_LOAD_PALETTE_INDEX to load a set
  143. // of sparse entries.
  144. //
  145. #define RGB525_PALETTE_START_WR(index) \
  146. { \
  147. VideoPortWriteRegisterUlong(RGB525_PAL_WR_ADDR, (ULONG)(index)); \
  148. RGB525_DELAY; \
  149. }
  150. #define RGB525_PALETTE_START_RD(index) \
  151. { \
  152. VideoPortWriteRegisterUlong(RGB525_PAL_RD_ADDR, (ULONG)(index)); \
  153. RGB525_DELAY; \
  154. }
  155. #define RGB525_LOAD_PALETTE(red, green, blue) \
  156. { \
  157. VideoPortWriteRegisterUlong(RGB525_PAL_DATA, (ULONG)(red)); \
  158. RGB525_DELAY; \
  159. VideoPortWriteRegisterUlong(RGB525_PAL_DATA, (ULONG)(green)); \
  160. RGB525_DELAY; \
  161. VideoPortWriteRegisterUlong(RGB525_PAL_DATA, (ULONG)(blue)); \
  162. RGB525_DELAY; \
  163. }
  164. #define RGB525_LOAD_PALETTE_INDEX(index, red, green, blue) \
  165. { \
  166. VideoPortWriteRegisterUlong(RGB525_PAL_WR_ADDR, (ULONG)(index)); \
  167. RGB525_DELAY; \
  168. VideoPortWriteRegisterUlong(RGB525_PAL_DATA, (ULONG)(red)); \
  169. RGB525_DELAY; \
  170. VideoPortWriteRegisterUlong(RGB525_PAL_DATA, (ULONG)(green)); \
  171. RGB525_DELAY; \
  172. VideoPortWriteRegisterUlong(RGB525_PAL_DATA, (ULONG)(blue)); \
  173. RGB525_DELAY; \
  174. }
  175. // macro to read back a given RGB triple from the RGB525 palette. Use after
  176. // a call to RGB525_PALETTE_START_RD
  177. //
  178. #define RGB525_READ_PALETTE(red, green, blue) \
  179. { \
  180. red = (UCHAR) (VideoPortReadRegisterUlong(RGB525_PAL_DATA) & 0xff); \
  181. RGB525_DELAY; \
  182. green = (UCHAR) (VideoPortReadRegisterUlong(RGB525_PAL_DATA) & 0xff); \
  183. RGB525_DELAY; \
  184. blue = (UCHAR) (VideoPortReadRegisterUlong(RGB525_PAL_DATA) & 0xff); \
  185. RGB525_DELAY; \
  186. }
  187. // macros to set/get the pixel read mask. The mask is 8 bits wide and gets
  188. // replicated across all bytes that make up a pixel.
  189. //
  190. #define RGB525_SET_PIXEL_READMASK(mask) \
  191. { \
  192. VideoPortWriteRegisterUlong(RGB525_PIXEL_MASK, (ULONG)(mask)); \
  193. RGB525_DELAY; \
  194. }
  195. #define RGB525_READ_PIXEL_READMASK(mask) \
  196. { \
  197. mask = VideoPortReadRegisterUlong(RGB525_PIXEL_MASK) & 0xff; \
  198. }
  199. // macros to load values into the cursor array
  200. //
  201. #define RGB525_CURSOR_ARRAY_START(offset) \
  202. { \
  203. VideoPortWriteRegisterUlong(RGB525_INDEX_CONTROL, (ULONG)(0x1)); \
  204. RGB525_DELAY; \
  205. VideoPortWriteRegisterUlong(RGB525_INDEX_ADDR_LO, (ULONG)(((offset)+0x100) & 0xff)); \
  206. RGB525_DELAY; \
  207. VideoPortWriteRegisterUlong(RGB525_INDEX_ADDR_HI, (ULONG)(((offset)+0x100) >> 8)); \
  208. RGB525_DELAY; \
  209. }
  210. #define RGB525_LOAD_CURSOR_ARRAY(data) \
  211. { \
  212. VideoPortWriteRegisterUlong(RGB525_INDEX_DATA, (ULONG)(data)); \
  213. RGB525_DELAY; \
  214. }
  215. #define RGB525_READ_CURSOR_ARRAY(data) \
  216. { \
  217. data = VideoPortReadRegisterUlong(RGB525_INDEX_DATA) & 0xff; \
  218. RGB525_DELAY; \
  219. }
  220. // macro to move the cursor
  221. //
  222. #define RGB525_MOVE_CURSOR(x, y) \
  223. { \
  224. VideoPortWriteRegisterUlong(RGB525_INDEX_ADDR_HI, (ULONG)0); \
  225. RGB525_DELAY; \
  226. RGB525_LOAD_INDEX_REG_LO(RGB525_CURSOR_X_LOW, (ULONG)((x) & 0xff)); \
  227. RGB525_LOAD_INDEX_REG_LO(RGB525_CURSOR_X_HIGH, (ULONG)((x) >> 8)); \
  228. RGB525_LOAD_INDEX_REG_LO(RGB525_CURSOR_Y_LOW, (ULONG)((y) & 0xff)); \
  229. RGB525_LOAD_INDEX_REG_LO(RGB525_CURSOR_Y_HIGH, (ULONG)((y) >> 8)); \
  230. }
  231. // macro to change the cursor hotspot
  232. //
  233. #define RGB525_CURSOR_HOTSPOT(x, y) \
  234. { \
  235. VideoPortWriteRegisterUlong(RGB525_INDEX_ADDR_HI, (ULONG)(0)); \
  236. RGB525_DELAY; \
  237. RGB525_LOAD_INDEX_REG_LO(RGB525_CURSOR_X_HOT_SPOT, (ULONG)(x)); \
  238. RGB525_LOAD_INDEX_REG_LO(RGB525_CURSOR_Y_HOT_SPOT, (ULONG)(y)); \
  239. }
  240. //
  241. // RGB525 internal register indexes
  242. //
  243. #define RGB525_REVISION_LEVEL 0x0000
  244. #define RGB525_ID 0x0001
  245. #define RGB525_MISC_CLK_CTRL 0x0002
  246. #define RGB525_SYNC_CTRL 0x0003
  247. #define RGB525_HSYNC_CTRL 0x0004
  248. #define RGB525_POWER_MANAGEMENT 0x0005
  249. #define RGB525_DAC_OPERATION 0x0006
  250. #define RGB525_PALETTE_CTRL 0x0007
  251. #define RGB525_PIXEL_FORMAT 0x000A
  252. #define RGB525_8BPP_CTRL 0x000B
  253. #define RGB525_16BPP_CTRL 0x000C
  254. #define RGB525_24BPP_CTRL 0x000D
  255. #define RGB525_32BPP_CTRL 0x000E
  256. #define RGB525_PLL_CTRL_1 0x0010
  257. #define RGB525_PLL_CTRL_2 0x0011
  258. #define RGB525_PLL_REF_DIV_COUNT 0x0014
  259. #define RGB525_F0 0x0020
  260. #define RGB525_F1 0x0021
  261. #define RGB525_F2 0x0022
  262. #define RGB525_F3 0x0023
  263. #define RGB525_F4 0x0024
  264. #define RGB525_F5 0x0025
  265. #define RGB525_F6 0x0026
  266. #define RGB525_F7 0x0027
  267. #define RGB525_F8 0x0028
  268. #define RGB525_F9 0x0029
  269. #define RGB525_F10 0x002A
  270. #define RGB525_F11 0x002B
  271. #define RGB525_F12 0x002C
  272. #define RGB525_F13 0x002D
  273. #define RGB525_F14 0x002E
  274. #define RGB525_F15 0x002F
  275. // RGB525 Internal Cursor Registers
  276. #define RGB525_CURSOR_CONTROL 0x0030
  277. #define RGB525_CURSOR_X_LOW 0x0031
  278. #define RGB525_CURSOR_X_HIGH 0x0032
  279. #define RGB525_CURSOR_Y_LOW 0x0033
  280. #define RGB525_CURSOR_Y_HIGH 0x0034
  281. #define RGB525_CURSOR_X_HOT_SPOT 0x0035
  282. #define RGB525_CURSOR_Y_HOT_SPOT 0x0036
  283. #define RGB525_CURSOR_COLOR_1_RED 0x0040
  284. #define RGB525_CURSOR_COLOR_1_GREEN 0x0041
  285. #define RGB525_CURSOR_COLOR_1_BLUE 0x0042
  286. #define RGB525_CURSOR_COLOR_2_RED 0x0043
  287. #define RGB525_CURSOR_COLOR_2_GREEN 0x0044
  288. #define RGB525_CURSOR_COLOR_2_BLUE 0x0045
  289. #define RGB525_CURSOR_COLOR_3_RED 0x0046
  290. #define RGB525_CURSOR_COLOR_3_GREEN 0x0047
  291. #define RGB525_CURSOR_COLOR_3_BLUE 0x0048
  292. #define RGB525_BORDER_COLOR_RED 0x0060
  293. #define RGB525_BORDER_COLOR_GREEN 0x0061
  294. #define RGB525_BORDER_COLOR_BLUE 0x0062
  295. #define RGB525_MISC_CTRL_1 0x0070
  296. #define RGB525_MISC_CTRL_2 0x0071
  297. #define RGB525_MISC_CTRL_3 0x0072
  298. // M0-M7, N0-N7 need defining
  299. #define RGB525_DAC_SENSE 0x0082
  300. #define RGB525_MISR_RED 0x0084
  301. #define RGB525_MISR_GREEN 0x0086
  302. #define RGB525_MISR_BLUE 0x0088
  303. #define RGB525_PLL_VCO_DIV_INPUT 0x008E
  304. #define RGB525_PLL_REF_DIV_INPUT 0x008F
  305. #define RGB525_VRAM_MASK_LOW 0x0090
  306. #define RGB525_VRAM_MASK_HIGH 0x0091
  307. //
  308. // Bit definitions for individual internal RGB525 registers
  309. //
  310. // RGB525_REVISION_LEVEL
  311. #define RGB525_PRODUCT_REV_LEVEL 0xf0
  312. // RGB525_ID
  313. #define RGB525_PRODUCT_ID 0x01
  314. // RGB525_MISC_CTRL_1
  315. #define MISR_CNTL_ENABLE 0x80
  316. #define VMSK_CNTL_ENABLE 0x40
  317. #define PADR_RDMT_RDADDR 0x0
  318. #define PADR_RDMT_PAL_STATE 0x20
  319. #define SENS_DSAB_DISABLE 0x10
  320. #define SENS_SEL_BIT3 0x0
  321. #define SENS_SEL_BIT7 0x08
  322. #define VRAM_SIZE_32 0x0
  323. #define VRAM_SIZE_64 0x01
  324. // RGB525_MISC_CTRL_2
  325. #define PCLK_SEL_LCLK 0x0
  326. #define PCLK_SEL_PLL 0x40
  327. #define PCLK_SEL_EXT 0x80
  328. #define INTL_MODE_ENABLE 0x20
  329. #define BLANK_CNTL_ENABLE 0x10
  330. #define COL_RES_6BIT 0x0
  331. #define COL_RES_8BIT 0x04
  332. #define PORT_SEL_VGA 0x0
  333. #define PORT_SEL_VRAM 0x01
  334. // RGB525_MISC_CTRL_3
  335. #define SWAP_RB 0x80
  336. #define SWAP_WORD_LOHI 0x0
  337. #define SWAP_WORD_HILO 0x10
  338. #define SWAP_NIB_HILO 0x0
  339. #define SWAP_NIB_LOHI 0x02
  340. // RGB525_MISC_CLK_CTRL
  341. #define DDOT_CLK_ENABLE 0x0
  342. #define DDOT_CLK_DISABLE 0x80
  343. #define SCLK_ENABLE 0x0
  344. #define SCLK_DISABLE 0x40
  345. #define B24P_DDOT_PLL 0x0
  346. #define B24P_DDOT_SCLK 0x20
  347. #define DDOT_DIV_PLL_1 0x0
  348. #define DDOT_DIV_PLL_2 0x02
  349. #define DDOT_DIV_PLL_4 0x04
  350. #define DDOT_DIV_PLL_8 0x06
  351. #define DDOT_DIV_PLL_16 0x08
  352. #define PLL_DISABLE 0x0
  353. #define PLL_ENABLE 0x01
  354. // RGB525_SYNC_CTRL
  355. #define DLY_CNTL_ADD 0x0
  356. #define DLY_SYNC_NOADD 0x80
  357. #define CSYN_INVT_DISABLE 0x0
  358. #define CSYN_INVT_ENABLE 0x40
  359. #define VSYN_INVT_DISABLE 0x0
  360. #define VSYN_INVT_ENABLE 0x20
  361. #define HSYN_INVT_DISABLE 0x0
  362. #define HSYN_INVT_ENABLE 0x10
  363. #define VSYN_CNTL_NORMAL 0x0
  364. #define VSYN_CNTL_HIGH 0x04
  365. #define VSYN_CNTL_LOW 0x08
  366. #define VSYN_CNTL_DISABLE 0x0C
  367. #define HSYN_CNTL_NORMAL 0x0
  368. #define HSYN_CNTL_HIGH 0x01
  369. #define HSYN_CNTL_LOW 0x02
  370. #define HSYN_CNTL_DISABLE 0x03
  371. // RGB525_HSYNC_CTRL
  372. #define HSYN_POS(n) (n)
  373. // RGB525_POWER_MANAGEMENT
  374. #define SCLK_PWR_NORMAL 0x0
  375. #define SCLK_PWR_DISABLE 0x10
  376. #define DDOT_PWR_NORMAL 0x0
  377. #define DDOT_PWR_DISABLE 0x08
  378. #define SYNC_PWR_NORMAL 0x0
  379. #define SYNC_PWR_DISABLE 0x04
  380. #define ICLK_PWR_NORMAL 0x0
  381. #define ICLK_PWR_DISABLE 0x02
  382. #define DAC_PWR_NORMAL 0x0
  383. #define DAC_PWR_DISABLE 0x01
  384. // RGB525_DAC_OPERATION
  385. #define SOG_DISABLE 0x0
  386. #define SOG_ENABLE 0x08
  387. #define BRB_NORMAL 0x0
  388. #define BRB_ALWAYS 0x04
  389. #define DSR_DAC_SLOW 0x0
  390. #define DSR_DAC_FAST 0x02
  391. #define DPE_DISABLE 0x0
  392. #define DPE_ENABLE 0x01
  393. // RGB525_PALETTE_CTRL
  394. #define SIXBIT_LINEAR_ENABLE 0x0
  395. #define SIXBIT_LINEAR_DISABLE 0x80
  396. #define PALETTE_PARITION(n) (n)
  397. // RGB525_PIXEL_FORMAT
  398. #define PIXEL_FORMAT_4BPP 0x02
  399. #define PIXEL_FORMAT_8BPP 0x03
  400. #define PIXEL_FORMAT_16BPP 0x04
  401. #define PIXEL_FORMAT_24BPP 0x05
  402. #define PIXEL_FORMAT_32BPP 0x06
  403. // RGB525_8BPP_CTRL
  404. #define B8_DCOL_INDIRECT 0x0
  405. #define B8_DCOL_DIRECT 0x01
  406. // RGB525_16BPP_CTRL
  407. #define B16_DCOL_INDIRECT 0x0
  408. #define B16_DCOL_DYNAMIC 0x40
  409. #define B16_DCOL_DIRECT 0xC0
  410. #define B16_POL_FORCE_BYPASS 0x0
  411. #define B16_POL_FORCE_LOOKUP 0x20
  412. #define B16_ZIB 0x0
  413. #define B16_LINEAR 0x04
  414. #define B16_555 0x0
  415. #define B16_565 0x02
  416. #define B16_SPARSE 0x0
  417. #define B16_CONTIGUOUS 0x01
  418. // RGB525_24BPP_CTRL
  419. #define B24_DCOL_INDIRECT 0x0
  420. #define B24_DCOL_DIRECT 0x01
  421. // RGB525_32BPP_CTRL
  422. #define B32_POL_FORCE_BYPASS 0x0
  423. #define B32_POL_FORCE_LOOKUP 0x04
  424. #define B32_DCOL_INDIRECT 0x0
  425. #define B32_DCOL_DYNAMIC 0x01
  426. #define B32_DCOL_DIRECT 0x03
  427. // RGB525_PLL_CTRL_1
  428. #define REF_SRC_REFCLK 0x0
  429. #define REF_SRC_EXTCLK 0x10
  430. #define PLL_EXT_FS_3_0 0x0
  431. #define PLL_EXT_FS_2_0 0x01
  432. #define PLL_CNTL2_3_0 0x02
  433. #define PLL_CNTL2_2_0 0x03
  434. // RGB525_PLL_CTRL_2
  435. #define PLL_INT_FS_3_0(n) (n)
  436. #define PLL_INT_FS_2_0(n) (n)
  437. // RGB525_PLL_REF_DIV_COUNT
  438. #define REF_DIV_COUNT(n) (n)
  439. // RGB525_F0 - RGB525_F15
  440. #define VCO_DIV_COUNT(n) (n)
  441. // RGB525_PLL_REFCLK values
  442. #define RGB525_PLL_REFCLK_MHz(n) ((n)/2)
  443. // RGB525_CURSOR_CONTROL
  444. #define SMLC_PART_0 0x0
  445. #define SMLC_PART_1 0x40
  446. #define SMLC_PART_2 0x80
  447. #define SMLC_PART_3 0xC0
  448. #define RGBCINDEX_TO_VALUE(whichRGBCursor) (whichRGBCursor << 6)
  449. #define PIX_ORDER_RL 0x0
  450. #define PIX_ORDER_LR 0x20
  451. #define LOC_READ_LAST 0x0
  452. #define LOC_READ_ACTUAL 0x10
  453. #define UPDT_CNTL_DELAYED 0x0
  454. #define UPDT_CNTL_IMMEDIATE 0x08
  455. #define CURSOR_SIZE_32 0x0
  456. #define CURSOR_SIZE_64 0x40
  457. #define CURSOR_MODE_OFF 0x0
  458. #define CURSOR_MODE_3_COLOR 0x01
  459. #define CURSOR_MODE_2_COLOR_HL 0x02
  460. #define CURSOR_MODE_2_COLOR 0x03
  461. // RGB525_REVISION_LEVEL
  462. #define REVISION_LEVEL 0xF0 // predefined
  463. // RGB525_ID
  464. #define ID_CODE 0x01 // predefined